JPH02186630A - Formation of thin film - Google Patents

Formation of thin film

Info

Publication number
JPH02186630A
JPH02186630A JP463189A JP463189A JPH02186630A JP H02186630 A JPH02186630 A JP H02186630A JP 463189 A JP463189 A JP 463189A JP 463189 A JP463189 A JP 463189A JP H02186630 A JPH02186630 A JP H02186630A
Authority
JP
Japan
Prior art keywords
film
gas
thin film
etching
sputter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP463189A
Other languages
Japanese (ja)
Other versions
JPH0828355B2 (en
Inventor
Mitsunori Fukura
満徳 福羅
Ginjiro Kanbara
神原 銀次郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP463189A priority Critical patent/JPH0828355B2/en
Publication of JPH02186630A publication Critical patent/JPH02186630A/en
Publication of JPH0828355B2 publication Critical patent/JPH0828355B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Formation Of Insulating Films (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To form a thin film in excellent stepped part covering ratio and high reliability by a method wherein sputter filming process is performed in the mixed gas atmosphere of inert gas and etching gas. CONSTITUTION:Mixed gas atmosphere of inert gas and etching gas e.g. argon and carbon tetrafluoride is preserved inside a filming chamber 1 at specified pressure. Next, the space between a cathode 2 and an a anode 4 is impressed with high voltage for discharge to crack argon gas into cations 6 and electrons 7 so that the carbon tetrafluoride may be changed to radical etching gas molecules 9. Dry etching process is advanced together with sputter filming process by high speed cations 6 attracted to the cathode 2 while in the sputtering process, sputter atoms 8 turned out of a target 3 are bonded onto the surface of a PSG film 11 and a stepped aluminum film 12 to form a silicon dioxide film 13. On the other hand, in the dryetching process, the surface of the silicon dioxide film 13 is etched but the stepped surface is hardly etched.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、半導体装置の製造に用いられる薄膜の形成方
法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for forming a thin film used in manufacturing a semiconductor device.

(従来の技術) 近年、半導体装置の製造に用いられる薄膜の形成方法と
して、再現性、信頼性、自動化および処理能力に優れて
いるスパッタリングが、多く採用されている。
(Prior Art) In recent years, sputtering, which is excellent in reproducibility, reliability, automation, and throughput, has been widely adopted as a method for forming thin films used in the manufacture of semiconductor devices.

この種の従来の薄膜の形成方法について第2図により説
明する。
A conventional method for forming this type of thin film will be explained with reference to FIG.

同図は、スパッタリングの原理を示す構成図で、スパッ
タ成膜装置は、不活性ガス供給口1aと排出口1bが設
けられた成膜室1の中に、上方に配置した陰極2にはタ
ーゲット3を、また下方に配置した陽極4には半導体基
板5をそれぞれ装着し、これらが相対向するように配設
したものである。
This figure is a configuration diagram showing the principle of sputtering. The sputtering film forming apparatus has a film forming chamber 1 provided with an inert gas supply port 1a and an exhaust port 1b, and a cathode 2 disposed above a target. A semiconductor substrate 5 is attached to the anode 3 and the anode 4 disposed below, respectively, and these are arranged so as to face each other.

このように構成されたスパッタ成膜装置を用い半導体基
板5の表面に薄膜を形成するには、まず、成膜室1を真
空にした後、不活性ガス供給口1aからアルゴンガスを
供給し、一定圧のアルゴンガス雰囲気とした後、陰極2
と陽極4の間に高電圧を印加し放電を起こさせる。アル
ゴンガスは、陽イオン6と電子7に分解され、それぞれ
陰極2に接続されたターゲット3および陽極4に接続さ
れた半導体基板5に引き寄せられる。質量を持つ陽イオ
ン6は加速されて高速となりターゲット3に衝突し、ス
パッタ原子8を叩き出す。叩き出されたスパッタ原子8
は、対向して配置された半導体基板5の表面に付着し薄
膜を形成する。
In order to form a thin film on the surface of the semiconductor substrate 5 using the sputtering film forming apparatus configured as described above, first, after evacuating the film forming chamber 1, argon gas is supplied from the inert gas supply port 1a. After creating an argon gas atmosphere at a constant pressure, the cathode 2
A high voltage is applied between the anode 4 and the anode 4 to cause discharge. The argon gas is decomposed into positive ions 6 and electrons 7, which are attracted to the target 3 connected to the cathode 2 and the semiconductor substrate 5 connected to the anode 4, respectively. The positive ions 6 having mass are accelerated to a high speed, collide with the target 3, and eject sputtered atoms 8. Spattered atoms 8
adheres to the surface of the semiconductor substrate 5 disposed facing each other to form a thin film.

(発明が解決しようとする課題) しかしながら、上記の方法では、スパッタ原子8の動き
に方向性があるため、段差を有するパターン上に形成さ
れる薄膜は、段差の側面で膜厚が薄くなり、段差被覆率
が悪く歩留りが低下し信頼性が低いという問題があった
(Problem to be Solved by the Invention) However, in the above method, since the movement of the sputtered atoms 8 is directional, the thin film formed on the pattern having the steps becomes thinner on the side surfaces of the steps. There were problems in that the step coverage was poor, the yield was low, and the reliability was low.

本発明は上記の問題を解決するもので、段差被覆率のよ
い信頼性の高い薄膜の形成方法を提供するものである。
The present invention solves the above problems and provides a method for forming a highly reliable thin film with good step coverage.

(課題を解決するための手段) 上記の課題を解決するため、本発明は、不活性ガスとエ
ツチングガスの混合ガス雰囲気中でスパッタ成膜を行う
ものである。
(Means for Solving the Problems) In order to solve the above problems, the present invention performs sputtering film formation in a mixed gas atmosphere of an inert gas and an etching gas.

(作 用) 上記のように不活性ガスとエツチングガスの混合ガス雰
囲気として、高電圧を印加すると、方向性のあるスパッ
タ成膜と同時に異方性のドライエツチングが行われ、段
差の側面ではエツチングされないため、表面と段差面の
膜厚差がなくなり、段差被覆率のよい薄膜が形成される
(Function) As described above, when a high voltage is applied in a mixed gas atmosphere of inert gas and etching gas, anisotropic dry etching is performed at the same time as directional sputtering film formation, and etching occurs on the side surfaces of the step. Therefore, there is no difference in film thickness between the surface and the step surface, and a thin film with good step coverage is formed.

(実施例) 本発明の一実施例を二酸化シリコン薄膜の形成方法を例
として、第1図(a)および(b)により説明する。第
1図(a)および(b)は本発明による薄膜の形成方法
の原理を示す構成図およびその要部拡大断面図である。
(Example) An example of the present invention will be described with reference to FIGS. 1(a) and 1(b), taking a method of forming a silicon dioxide thin film as an example. FIGS. 1(a) and 1(b) are a block diagram showing the principle of the method for forming a thin film according to the present invention, and an enlarged cross-sectional view of the main parts thereof.

第1図(a)に示す本発明による成膜装置が、第2図に
示した従来例と異なる点は、成膜室1の不活性ガス供給
口1aに並んでエツチングガス供給口1cが設けられた
点である。その他は従来例と変らないので、同じ構成部
品には同一符号を付してその説明を省略する。
The film forming apparatus according to the present invention shown in FIG. 1(a) is different from the conventional example shown in FIG. This is the point that was made. Since the rest is the same as the conventional example, the same components are given the same reference numerals and their explanations will be omitted.

このような構成の成膜装置を用いた本発明による薄膜の
形成方法について説明する。
A method for forming a thin film according to the present invention using a film forming apparatus having such a configuration will be described.

まず、第1図(a)において、成膜室1の内部を不活性
ガスとエツチングガス、例えば、アルゴンと四沸化炭素
の混合ガス雰囲気とし、その圧力を一定に保つ。次に陰
極2と陽極4の間に高電圧を印加して放電を起こさせる
。この放電により、アルゴンガスは陽イオン6と電子7
に分解され、四沸化炭素はラジカルなエツチングガス分
子9となる。陰極2に引き寄せられた高速の陽イオン6
により、ターゲット3から叩き出されたスパッタ原子8
は半導体基板5の表面に付着する。
First, in FIG. 1(a), a mixed gas atmosphere of an inert gas and an etching gas, such as argon and carbon tetrafluoride, is created inside the film forming chamber 1, and the pressure is kept constant. Next, a high voltage is applied between the cathode 2 and the anode 4 to cause discharge. This discharge causes the argon gas to become positive ions (6) and electrons (7).
The carbon tetrafluoride becomes radical etching gas molecules 9. High-speed cations 6 attracted to cathode 2
As a result, sputtered atoms 8 ejected from the target 3
adheres to the surface of the semiconductor substrate 5.

一方、ラジカルなエツチングガス分子9は、上記のスパ
ッタ原子8が半導体基板5の表面に形成した薄膜を異方
性エツチングし、被エツチング原子10を放出する。
On the other hand, the radical etching gas molecules 9 anisotropically etch the thin film formed by the sputtered atoms 8 on the surface of the semiconductor substrate 5, and release atoms 10 to be etched.

第1図(b)は、上記の半導体基板5の要部拡大断面図
で、半導体基板5の表面に形成されたPSG膜11の上
に、さらにアルミ膜12のパターンが形成されている。
FIG. 1(b) is an enlarged sectional view of the main part of the semiconductor substrate 5, in which a pattern of an aluminum film 12 is further formed on the PSG film 11 formed on the surface of the semiconductor substrate 5.

スパッタ成膜と同時にドライエツチングが進行する。ス
パッタリングでは、ターゲット3から叩き出されたスパ
ッタ原子8が、上記のPSG膜】1および段差を有する
アルミ膜12の表面に付着し、二酸化シリコン膜13を
形成する。その際、スパッタリングによる薄膜の形成に
は方向性があるため、表面に厚く段差面に薄くなる。
Dry etching progresses simultaneously with sputtering film formation. In sputtering, sputtered atoms 8 ejected from the target 3 adhere to the surfaces of the PSG film 1 and the stepped aluminum film 12 to form a silicon dioxide film 13. At this time, since the thin film formed by sputtering is directional, it becomes thicker on the surface and thinner on the stepped surface.

方、ドライエツチングでは、エツチングガス分子9の働
きも異方性があり、二酸化シリコン膜13は表面がエツ
チングされ、段差面は、はとんどエツチングされないの
で、段差被覆率のよい薄膜が得られる。
On the other hand, in dry etching, the action of the etching gas molecules 9 is anisotropic, and the surface of the silicon dioxide film 13 is etched, but the step surface is hardly etched, so that a thin film with good step coverage can be obtained. .

なお、本実施例では、エツチングガスとして四沸化炭素
を用いたが、CHF3等、二酸化シリコンを化学的にエ
ツチングし得るガスであればよい。
In this embodiment, carbon tetrafluoride was used as the etching gas, but any gas capable of chemically etching silicon dioxide, such as CHF3, may be used.

また、二酸化シリコン薄膜の形成を例としたが、アルミ
合金等、スパッタリング可能な材料の薄膜の形成でもよ
い。ただし、この場合、エツチングガスとして、ターゲ
ット材料を化学的にエツチングできるガスを使用するこ
とは言うまでもない。
Moreover, although the formation of a silicon dioxide thin film has been taken as an example, a thin film of a sputterable material such as an aluminum alloy may also be formed. However, in this case, it goes without saying that a gas capable of chemically etching the target material is used as the etching gas.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)および(b)は本発明による薄膜の形成方
法の原理を示す構成図およびその要部拡大断面図、第2
図は従来の薄膜の形成方法の原理を示す構成図である。 1 ・・・成膜室、 1a・・・不活性ガス供給口、 
1b・・・排出口、 IC・・・エツチングガス供給口
、 2・・・陰極、 3・・・ターゲット、 4 ・・
・陽極、 5・・・半導体基板、 6・・ 陽イオン、
 7・・・電子、8 ・・・原子(スパッタ原子)、 
9 ”・ エツチングガス分子、10・・・被エツチン
グ原子、11・・・PSG膜、12・・・アルミ膜、1
3・・・二酸化シリコン膜。
FIGS. 1(a) and 1(b) are a block diagram showing the principle of the thin film forming method according to the present invention and an enlarged cross-sectional view of its main parts;
The figure is a block diagram showing the principle of a conventional thin film forming method. 1... Film forming chamber, 1a... Inert gas supply port,
1b...Exhaust port, IC...Etching gas supply port, 2...Cathode, 3...Target, 4...
・Anode, 5... Semiconductor substrate, 6... Cation,
7...Electron, 8...Atom (sputtered atom),
9 ”・Etching gas molecule, 10... Atom to be etched, 11... PSG film, 12... Aluminum film, 1
3...Silicon dioxide film.

Claims (1)

【特許請求の範囲】[Claims]  スパッタ成膜装置を用い、成膜室内をスパッタリング
用の不活性ガスと、ドライエッチング用のエッチングガ
スの混合ガス雰囲気とし、スパッタ成膜を行うことを特
徴とする薄膜の形成方法。
A method for forming a thin film, the method comprising performing sputter film formation using a sputter film forming apparatus and creating a mixed gas atmosphere of an inert gas for sputtering and an etching gas for dry etching in a film forming chamber.
JP463189A 1989-01-13 1989-01-13 Thin film formation method Expired - Lifetime JPH0828355B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP463189A JPH0828355B2 (en) 1989-01-13 1989-01-13 Thin film formation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP463189A JPH0828355B2 (en) 1989-01-13 1989-01-13 Thin film formation method

Publications (2)

Publication Number Publication Date
JPH02186630A true JPH02186630A (en) 1990-07-20
JPH0828355B2 JPH0828355B2 (en) 1996-03-21

Family

ID=11589367

Family Applications (1)

Application Number Title Priority Date Filing Date
JP463189A Expired - Lifetime JPH0828355B2 (en) 1989-01-13 1989-01-13 Thin film formation method

Country Status (1)

Country Link
JP (1) JPH0828355B2 (en)

Also Published As

Publication number Publication date
JPH0828355B2 (en) 1996-03-21

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