JPH0218627B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a call route resetting method, and more particularly, to a call route resetting method after failure recovery in a time division electronic exchange.

The call path network of the time division electronic exchange includes a so-called time switch, which has a call path memory and a call path holding memory, and a call channel is set according to the contents of the call path holding memory. . In order to control whether a communication channel is busy or idle, a part of the communication path holding memory is designated as an inactive memory, and information indicating whether the communication channel is busy or idle is stored there. Prevents writing of call signals to memory and instructs busy call channels to write, thereby eliminating call signals from idle call channels and preventing inconvenience caused by unnecessary signals flowing to idle call channels. .

If a failure occurs in the time division electronic exchange,
All the information in the enact memory indicating busy/idle in the communication path holding memory is cleared, thereby controlling all communication channels as idle, stopping the communication signal from flowing, and closing one communication channel. The system is brought into a stopped state, the fault is recovered, and the communication path is reset after the fault is recovered.

Conventionally, the information in the enact memory indicating this busy/idle information was stored together in the communication path holding memory, so in order to stop the communication channel in the event of a failure, the busy/idle information in the enact memory must be cleared (cleared). (becomes idle information), the contents of the communication path holding memory are also all cleared. That is, the information for controlling the setting of the communication channel in the communication path holding memory is also cleared.

In this type of electronic exchange, failures caused by failures in the communication path holding memory itself, failures in the control system (abnormal clocks, timing signals), etc.
There is a high possibility that the call path will not be guaranteed. That is, the information for holding the communication path in the communication path holding memory is destroyed and becomes random, leaving paths unrelated to the communication.

The failure modes of electronic exchanges can be classified into two levels: the above-mentioned ``failure mode in which the call path is not guaranteed'' and the ``failure mode in which the call path is guaranteed'' as described below.

In electronic exchanges, including space switches,
If a failure occurs in a device that actually carries call current, such as a call path memory or line support section, due to the circuit configuration of a time-sharing electronic exchange, the space switch, call path memory, etc. Since the signal is constantly supplied, no information affected by the failure remains, and the call path will automatically recover if the failure in the space switch, call path memory, line support unit, etc. is recovered. This is the "call path guaranteed failure mode."

In general, switching equipment, especially electronic switching equipment, does not allow service to be interrupted even if a failure occurs.For this reason, common parts have a redundant configuration such as duplex or n+1 system, and if a failure occurs, the system immediately Reconfigure.

After the failure is recovered, the call path that was set before the failure is reset. In this case, the software refers to the map of the call status stored in the main memory and reconfigures the call path based on this map. Write necessary information to retention memory.

Conventionally, regardless of the failure mode, whether the above failure is in the ``call path guaranteed mode'' or ``the call path is not guaranteed mode,'' all call path holding memories are cleared once as described above. However, since the data had to be newly written from the main memory, a complex and large amount of software processing had to be performed, and therefore, it took a long time to re-establish the communication path after recovery from a failure. A problem also arises in that service for new calls cannot be accepted during this restart process.

SUMMARY OF THE INVENTION An object of the present invention is to improve the above-mentioned conventional drawbacks, and to complete the resetting of the communication path after failure recovery in a short time when the communication path is in a guaranteed failure mode.

Next, embodiments of the present invention will be described with reference to the drawings.
The figure is a connection diagram of one embodiment of the present invention. In the figure, SM _p and SM _i are switch modules,
Forward channel memory SPMF, respectively.
A forward time switch including a time slot counter T-CTR and a channel holding memory HLM, a backward time switch sharing a backward channel memory SPMB and the time slot counter T-CTR and a channel holding memory HLM, and a space switch S- SW and a signal reception distribution device SRD are provided, and the signal reception distribution devices SRD of each switch module SM _p and SM _i are connected to a common bus B, and via this common bus B, the main processor MPR and the main processor Connected to storage device MM.

Note that MPX is a multiplexer, DMPX is a demultiplexer, and IM is an inact memory.
Further, T is a telephone, LC is its subscriber circuit, L is an interruption line, and TRK is a trunk. Although it is normal to install a large number of telephones T and interruption lines L,
Only one of each is illustrated in the figure.

The call signals arriving from the telephone T and the interrupted line L are converted into 2-wires and 4-wires in the subscriber circuit LC and the trunk TRK, encoded (digitized), and enter the multiplexer MPX, where they are time-shared with other call signals. It is multiplexed (framed) and stored in the forward path memory SPMF.

Now, in order to connect telephone T and interrupted line L, time slots a and b are assigned to each.

The call signal from telephone T is multiplexed.
It enters address a of the forward path memory SPMF at time slot a via MPX. The time slot counter T-CTR is configured as a cyclic counter that counts clocks synchronized with the time slots and resets to 0 after counting the number of time slots in one frame, and calculates the time slot number input to the forward channel memory SPMF. The same number is output as address information in synchronization with the time slot. Time slot counter T-
The count output of CTR forwards the call signal input from the multiplexer MPX to the forward call path memory.
Used as the address when writing to SPMF.
Therefore, the speech signals of telephones T and interrupted lines L in time slots a and b are written to addresses a and b of the forward speech path memory SPMF, respectively.

Call path maintenance memory HLM and inact memory IM that controls busy/idle of the call channel
is a circular memory with as many addresses as there are time slots in one frame.

Now, in the communication path holding memory HLM, the address information (a) of the forward communication path is stored in the address [in this case, address (k)] of the address signal (ADD) sent from the signal reception and distribution device SRD at time slot k. In addition, the address information (b) is sent to the address (in this case, address (l)) of the address signal (ADD) sent at time slot l, and the signal (SP) is sent from the signal reception and distribution device SRD.
Write using.

The information read from the channel holding memory HLM is used as an address when reading the forward channel memory SPMF. Therefore, at timeslots k and l, the forward path memory SPMF is connected to the path holding memory HLM.
It is accessed by the addresses (a) and (b) read from the IHW 1 and its contents are read to the intermediate highway IHW ₁ in time slots k and l, respectively. That is, the speech signal from the telephone T carried by time slot a in time slot k and from the interrupted line L carried by time slot b in time slot l is read out to intermediate highway IHW _1. . The signal read out to the intermediate highway IHW ₁ is further input to the backward channel memory SPMB via the intermediate highway IHW ₂ via the space switch S-SW without changing the time slots.

Furthermore, in time slot b, the communication path holding memory HLM also sends address information (k) to the address [address (b)] specified by the address information (ADD) sent from the signal reception and distribution device SRD. Address information (l) is written to address (a) using the same method as described above.

The information read from the communication path holding memory HLM is also used as an address when writing to the backward communication path memory. Therefore, in the backward channel memory SPMB, the time slot k
The call signal from telephone T input at time slot 1 is written to address (b), and the call signal from trunk TRK input at time slot 1 is written to address (a).

Therefore, the count output information of the time slot counter T-CTR from the backward channel memory SPMB is used as an address, that is, from the address (a) output at time slot a, the trunk is
The call signal from TRK is also in time slot B.
The call signal from telephone T is read out from the address (b) output at
Enter into DMPX.

To summarize the above, the speech signal from telephone T is time-division multiplexed with other speech signals by multiplexer MPX, is carried by time slot a, enters the forward speech path memory SPMF, is read out at time slot k, and is transferred to the intermediate highway
It is input to the backward channel memory SPMB via IHW ₁ , IHW ₂ and the space switch S-SW, read out at time slot b, and entered into the demultiplexer DMPX. Similarly, the call signal from the trunk TRK is time-division multiplexed with other call signals by the multiplexer MPX, and is input to the forward call path memory SPMF by the time slot b.
and is read out at time slot 1, intermediate highways IHW ₁ , IHW ₂ and space switch S-
It is input to the backward channel memory SPMB via SW, further read out at time slot a, and input to the demultiplexer DMPX.

The demultiplexer DMPX separates the input time division multiplexed signals and sends the signal in time slot a to telephone T and the signal in time slot b to trunk TRK.

In the subscriber circuit LC and trunk TRK, the call signal sent from the demultiplexer DMPX is decoded, and further sent to the receiving terminal on the 4-wire side of the 2-wire 4-wire converter, and sent to the telephone T and trunk line L. do.

As described above, by writing the above data into the communication path holding memory HLM, a communication channel between the telephone T and the trunk TRK is established.

In the above, the addresses read in the time slots k and l of the inact memory IM contain information indicating that the communication channel set by the time slots of the intermediate highways IHW ₁ and IHW ₂ is busy. 1'' is written by the signal (B/I) from the signal reception distribution device SRD. Therefore, in time slots k and l, "1" is read from the inact memory IM, and this information is stored in the backward channel memory.
SPMB instructs writing of speech signals into the backward speech path memory SPMB at the appropriate time slots (ie, k and l). Therefore, as mentioned above, the telephone T
A communication channel between the trunk TRK and the trunk TRK is set up.

However, in the address of the inact memory IM that is not used for calls on the intermediate highways IHW ₁ and IHW ₂ , that is, read out in an idle time slot, information "0" indicating that it is idle is displayed during signal reception distribution. Written by the signal (B/I) from the device SRD. Therefore, in the idle time slot, the inactive memory
“0” is read from IM, this information “0” is given to backward communication path memory SPMB,
This results in a write block indication, in which the writing of the signal carried by the time slot is blocked, and the backward speech path memory SPMB does not carry any signals and therefore the call by the time slot that is idle is blocked. No channel settings are made. In this way, writing control is performed based on the contents of the inact memory IM.

A communication channel between two lines accommodated in the same switch module, for example SM _p, is set up as described above. In addition, forward call path memory
The intermediate highway IHW ₁ outputting from SPMF branches to the space switch S- of the other switch modules.
This is input to the SW, which allows you to set communication channels between lines accommodated in different switch modules.

In a time-division electronic exchange, each device including the switch module performs a parity check of each memory and a return call path test (pilot test) as a hardware autonomous monitoring function within the switch module. This is used to detect failure modes. Through these tests, it is possible to detect whether the fault that has occurred is in the above-mentioned "failure mode in which the call path is not guaranteed" or in the "failure mode in which the call path is guaranteed".

Suppose that a fault occurs in the switching equipment. If the failure is a failure mode in which the call path is not guaranteed, the main processor MPR
Sends control signals to SRD, signal reception distribution device SRD
Sends a channel clear signal (SP-CLR) from
Path keeping memory HLM and inact memory IM
Clear. Enact memory IM is cleared,
In other words, since the content of each address becomes "0", which is information indicating idle, writing of call signals for all time slots is stopped in the backward call path memory SPMB, as described above. , all communication channels are disconnected. In this state, fault recovery processing is performed, and if the fault is recovered, the call path is maintained based on this map by referring to the map of the call state held in the main memory MM, just as it was done in the past. memory
Write the necessary information to the HLM and inact memory IM and reset the communication path.

However, if this failure is a failure mode failure in which the communication path is guaranteed, the main processor MPR sends a control signal to the signal reception and distribution device SRD, and in this case, the signal reception and distribution device SRD receives the communication path clear signal (SP- CLR), but instead sends an inact memory clear signal (I-CLR) to clear only the inact memory IM. As a result, all call channels will be disconnected as described above.
In this state, failure recovery processing is performed, and if the failure is recovered, the data at the time of failure is written to the inact memory IM. Since the contents of the communication path holding memory HLM remain as they were at the time of the failure, there is no need to perform any processing. Thus, according to the present invention,
For this type of failure mode, the main processor
With MPR, communication paths can be reconfigured with an extremely small amount of processing.

The present invention is not limited to the above embodiments, and can be modified in various ways.

As explained above, in this type of time-sharing electronic exchange, conventionally, even if a failure occurs in a failure mode in which the call path is guaranteed, the contents of the call path holding memory are cleared once to handle the failure. At the time of failure recovery, the data for setting the call path was rewritten in the call path holding memory by referring to the map of the call status held in the main memory, so the amount of processing by the main processor was large. It took time to reset the communication path, but according to the present invention, in this type of failure mode, that is, in a failure mode in which the communication path is guaranteed, resetting the communication path at the time of failure recovery can be done easily. This has the effect of being able to perform the process in a short time without placing too much burden on the main processor.

[Brief explanation of drawings]

The figure is a connection diagram of one embodiment of the present invention. T...Telephone, LC...Subscriber circuit, L...Relay line, TRK...Trunk, SM _p , SM _i ...Switch module, MPX...Multiplexer,
DMPX... Demultiplexer, SPMF... Forward channel memory, SPMB... Backward channel memory, T-CTR... Time slot counter, HLM... Channel holding memory, IM...
Enact memory, S-SW...space switch,
IHW ₁ , IHW ₂ ...Intermediate highway, SRD...Signal reception distribution device, B...Common bus, MM...Main memory, MPR...Main processor.

Claims (1)

[Scope of Claims] 1. A communication path memory, an inact memory that controls writing to the communication path memory for each communication path channel and controls busy/idle status of the communication channel, and a communication path holding memory that controls communication path allocation. In a resetting method for restarting a time-division communication path after a failure occurs, the inact memory is provided independently of the communication path holding memory, and is configured to be capable of writing and clearing all addresses, so that the communication path is guaranteed. When restarting after recovery from a failure mode, all the contents of the communication path holding memory are retained, and the contents of the inact memory are once cleared and then the necessary writing is performed to reset the communication path. A call path resetting method characterized by: