JPH02184277A - Driving circuit for ultrasonic motor - Google Patents

Abstract

PURPOSE:To improve the resolution of frequency by a method wherein a dividing phase shifter, dividing and shifting the phase of the output of an oscillator, is provided to change a pulse width by a width corresponding to one period. CONSTITUTION:The driving circuit of an ultrasonic motor 5 is provided with an oscillator 1, a divider 2, a 1/4 dividing phase shifter 3 and a power amplifier 4. The driving circuit of the same is also provided with a temperature sensor 6, a temperature detector 7, an encoder 8, a frequency regulating means 10, a NAND gate 11 and an AND gate 12. The switching timing of output signals phi1-phi4 from the 1/4 dividing phase shifter 3 is determined respectively by the preset value of the divider 2 and a driving frequency is reduced when a temperature is risen. On the other hand, the frequency may be regulated by the frequency regulating means 10 independently from the correction by a temperature.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a drive circuit for an ultrasonic motor, and more specifically, to a drive circuit that always rotates efficiently even if the characteristics of the ultrasonic motor change due to external factors. The present invention relates to an ultrasonic motor drive circuit having a feedback circuit that automatically tracks frequency.

[Prior Art] In recent years, ultrasonic motors have been developed at a remarkable pace, and this is because these motors have advantages over conventional DC motors, such as being able to obtain high torque at low speeds and being quiet. This is because there is. When this type of ultrasonic motor is used, for example, to wind the film of a camera, its low speed and high torque enables direct drive without the need for gear deceleration, which makes the mechanism simple and easy to control. This has the advantage that the size of the mechanical drive system can be made smaller than before. As for the ultrasonic motor used for this purpose, for example, there is a traveling wave type ultrasonic motor disclosed in Japanese Patent Application Laid-open No. 58-148682, and a standing wave type ultrasonic motor disclosed in Japanese Patent Application Laid-Open No. 61-49670. It can be realized in any case, such as a type ultrasonic motor.

However, on the other hand, an ultrasonic motor requires a more complicated circuit as its drive circuit.

In other words, a small DC motor can be rotated by simply applying a direct current power supply voltage (usually several volts or more), but an ultrasonic motor usually has a frequency of 20 KHz.
As described above, an AC power source with a voltage amplitude of several tens of volts (effective value) or more must be applied.

Therefore, at least an oscillator and a power amplifier are required.

Furthermore, there are some motors, such as traveling wave ultrasonic motors, which require a plurality of outputs of the same frequency and amplitude with different phases, and in this case, a phase shifter is also required. Furthermore, in ultrasonic motors, the optimum driving frequency, that is, the frequency at which efficiency is high and the rotational speed and torque are sufficiently large, often changes depending on factors such as temperature, load, and voltage applied to the motor. In such cases, a monitor electrode is installed on a part of the ultrasonic motor's vibrator, and the drive frequency is corrected using the voltage signal or phase signal obtained from the monitor electrode, or a temperature sensor is attached and the drive frequency is adjusted using the signal. Needs to be corrected.

Therefore, a drive frequency correction circuit having the above-mentioned functions is required.

For example, Japanese Patent Application No. 63-33593 and Japanese Patent Application No. 1983 filed earlier by the applicant have such a function.
There is a drive circuit disclosed in Japanese Patent No.-35529. Although this circuit is exemplified for driving a traveling wave type ultrasonic motor, it is of course applicable to a standing wave type ultrasonic motor.

The device described in the above Japanese Patent Application No. 63-33593 has an oscillation frequency controlled by voltage using an up/down counter (hereinafter abbreviated as UP/DN counter) and a D/A converter, and is mainly formed of analog circuits. The detection circuit determines the tracking direction based on whether the oscillation frequency of the voltage controlled oscillator (hereinafter abbreviated as VCO) is high or low relative to the optimal drive frequency, the UP/DN counter counts up or down, and the D/A converter converts the analog voltage. The oscillation frequency is automatically tracked to the optimum drive frequency by controlling the voltage of vCo. Therefore, v
When the CO oscillation frequency reaches the upper limit frequency or lower limit frequency of the UP/DN counter, it returns to the lower limit frequency or upper limit frequency with the next clock pulse and counts up or down again, which prevents a sudden load on the ultrasonic motor. The oscillation frequency deviates from the appropriate drive frequency due to excessive or excessive drive frequency (hereinafter referred to as frequency jump)
However, the drive frequency can be returned to the proper drive frequency by repeating the operation of the UP/DN counter.

By the way, an ultrasonic motor has several vibration modes, and when driven in one mode, the highest frequency f and the lowest frequency F are set to avoid entering other modes. must be set. Moreover, unless it is possible to easily set such a frequency range, there is no point in using it industrially. Therefore, the above patent application 1986-35
The proposal in No. 529 is based on the above-mentioned patent application No. 63-33.
Similar to No. 593, a sawtooth wave oscillator is used for the VCO in the drive circuit consisting of a VCO, a detection circuit, an UP/DN counter, and a D/A converter, and the low level potential of the sawtooth wave oscillation voltage is changed. The oscillation frequency is controlled by

[Problem to be solved by the invention] However, such VCO and detection circuit 1UP/D
Conventional drive circuits composed of an N counter and a D/A converter have limitations in digitizing the circuit and automating adjustment. In other words, analog circuits still remain in the D/A converter and vCO portions of the drive circuits in the above-mentioned Japanese Patent Application Nos. 63-33593 and 1983-35529, and even if attempts are made to convert them into ICs, Since the capacitors, resistors, and variable resistors for adjustment in the analog part cannot be integrated into ICs, the external components remain as components. Therefore, a corresponding amount of space is required, and the cost increases. Furthermore, a method such as laser trimming is assumed for adjustment, and new equipment will be required to implement it. Furthermore, Japanese Patent Application No. 119987/1987, previously filed by the present applicant, discloses a method for generating a reference phase, but in this method, the reference phase is set using a variable resistor, and therefore it cannot be automated. The drawback was that it was difficult.

To summarize the above, when converting the drive circuit to digital/IC, the above-mentioned method has its limits, and it becomes difficult to further reduce the space occupied by the circuit and automate adjustment. A problem arose.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an ultrasonic motor drive circuit having a structure that solves the above-mentioned problems and allows the circuit to be integrated into an IC and the adjustment to be easily automated.

[Means and effects for solving the problems] The ultrasonic motor drive circuit of the present invention is an ultrasonic motor drive circuit that changes the frequency of an alternating current voltage applied to drive the ultrasonic motor, and includes an oscillator. A frequency dividing phase shifter that frequency-divides and phase-shifts the output of this oscillator as a plurality of pulse signals and outputs the frequency-divided phase shifter, and a power amplifier that amplifies the output of this frequency dividing phase shifter to generate the above-mentioned alternating current voltage. The frequency of the AC voltage is changed by changing at least one pulse width or the width of the OFF portion of the pulse signal every cycle of the output or frequency-divided output of the oscillator. It is something.

[Example] Prior to a detailed explanation of the present invention, the operating principle of automatic tracking of the optimum drive frequency in an ultrasonic motor will be explained using Figs. 2 to 5, and the driving principle will be explained using Fig. 6. Each frequency resolution will be explained.

FIG. 2 is a block system diagram showing an example of a digitalized ultrasonic motor drive circuit, and FIG. 3 is a timing chart showing the operation of each part in FIG. 2. In the figure, reference numeral 1 indicates an oscillator, and the optimum driving frequency f of the ultrasonic motor 5 (here, a standing wave type ultrasonic motor). A clock pulse CLKI having a sufficiently high frequency fi is generated compared to the clock pulse CLKI.

This clock pulse CLKI is converted by the frequency divider 2 into the clock pulse CLK2 shown in FIG.

This frequency divider 2 is an 8-bit presettable down counter, and its preset input terminals P5 to P5 are used as the frequency divider 2.
8 is set to a predetermined value in advance, and the preset input terminals P1 to P
4 are output signals Q51 to Q5 of the AND gate 12, which will be described later.
4 is preset. Therefore,
This frequency divider 2 starts counting down from a preset value, and when the output reaches (00...0), it is preset again. ) is the clock pulse CL
It is designed to output K2. The clock pulse CLK2 is frequency-divided by 1/4 by a 174 frequency divider/phase shifter 3 composed of a ring counter. Its outputs are phase shifter output signals φ1 to φ4 shown in FIG. 3, of which signals φ1 and φ3 are sent to the power amplifier 4. This power amplifier 4 has a configuration shown in FIG. 4, and has a signal φ1
and φ3 alternately turn on transistors Tri and Tr3, thereby increasing the optimal drive frequency f from the secondary side of transformer L1 at voltage Vo. AC voltage V. Output. This voltage V. When is applied to the motor 5, the motor 5 starts rotating.

Next, a mechanism for automatically tracking the motor drive frequency and adjusting the drive frequency will be described.

Generally, in the case of a standing wave type ultrasonic motor, the optimum driving frequency f. is often temperature dependent. Now, ultrasonic motor 5
The optimum driving frequency f. If the characteristic diagram for the motor temperature T is as shown in FIG.
It is only necessary to detect the output of the temperature sensor 6 attached to the temperature sensor 6 and change the driving frequency, for example, if the temperature is T1, the driving frequency is f2, if T2, the driving frequency is f2, and so on.

Therefore, the output signal of the temperature sensor 6 is digitized by the temperature detector 7, the signal is further encoded by the encoder 8, and is inputted to the lower 4 bits P1 to P4 of the preset input terminal of the frequency divider 2 via the adder 9. do. Here, the reason why the signal is passed through the adder 9 is for frequency adjustment. In other words, a switch.

Since the output of the frequency adjustment means 10 constituted by a digital signal setting means such as a memory is added to the output of the encoder 8 by the adder 9, the reference point of the driving frequency can be moved by operating the frequency adjustment means 10. Can be done.

Now, if the temperature rises from T1 to T2, the temperature detector 7 transmits that information to the encoder 8, and the 4-bit signal of the encoder 8 increases by 1. Then, the 4-bit signal of adder 9 also increases, and the preset value becomes 1.
will only increase. Therefore, clock pulse C
The period of LK2 becomes longer by one period of the clock pulse CLKI, and the AC voltage V is obtained by dividing the period by 1/4. The frequency f changes by Δf from f to T2 to lower force. Here, the difference Δf between fl and T2 is the resolution of this drive frequency, and is, in short, the difference in frequency that changes when the preset value changes by 1.

So, the motor temperature T is TI, T2.・・・・・・
....When T8 changes, the output of encoder 8 and adder 9, that is, the preset value of the lower 4 bits of frequency divider 2, increases by 1 in order, so the driving frequency becomes f, f
・・・・・・1 as it changes with T8
2' becomes. Conversely, if the temperature is T8. T7. . . . When the frequency changes to T1, the preset values of the lower 4 bits of the frequency divider 2 are sequentially decreased by 1, so that T8. T7゜・・・
...fl changes.

In this way, the optimal drive frequency of the ultrasonic motor 5 can be automatically tracked.

By the way, this drive circuit can be entirely digitalized except for part of the power amplifier 4, temperature sensor 6, and temperature detector 7, and therefore most of the parts can be housed in one IC. can. Further, since frequency adjustment can be performed using digital signals, if a memory function is provided inside the IC or another IC, automatic adjustment can be performed by sending and receiving electrical signals, and almost no adjustment man-hours are required.

Furthermore, since it is controlled by digital signals, it has no temperature characteristics and does not malfunction due to noise, so stable output can be expected.

However, since the above-described drive circuit has low frequency resolution, there are practical problems. Now, if the oscillation frequency of oscillator 1 is, for example, 12 MHz'z and the driving frequency is around 40 KHz, if the preset value of frequency divider 2 increases by 1, clock pulse CLK2 becomes longer by □12 x 106 seconds, and is further divided into 1/4. - Phase shifter 3 reduces to 1/4. Here, fN is the frequency at the preset value N, fN
Let il be the frequency at the preset value N+1, and the frequency resolution is Δf-fN-fN+.

When defined as becomes. Similarly, if the drive frequency is around 70KHz, This is a large value.

However, the rate of change in the optimum driving frequency with respect to temperature change is at most about 100 to 200 Hz per 10° C., or less. Therefore, around 40KHz, 30
This means that frequency correction can only be made by changing the preset input of the frequency divider 2 every 80 to 160 degrees Celsius to change the optimum drive frequency in the vicinity of 70 KHz.

Also, the drive frequency setting is 40KHz and 530H.
Since the frequency can only be set in increments of 70 KHz and 1600 Hz, there is a high possibility that the optimum drive frequency cannot be set for each motor.

Resolution can be improved by increasing the oscillation frequency, but
Generally, as the frequency increases, the current consumption of the circuit increases, and the cost increases when integrated into an IC. In addition, there is a problem that the high frequency noise generated from this circuit has a large influence on other circuits, so it cannot be made too high.

Another problem is that the upper limit of the oscillation frequency is inevitably determined by the IC. Figure 6 shows the relationship between the operating power supply voltage range and operating speed (frequency) of the IC, and according to this, 5
In V, standard C-MOS type IC is used.
30M with MH21 high speed C-MOS type IC
Since it is about 25 MHz for Hz and TTLIC, the resolution can only be improved by about 1/2 of the above-mentioned value.

Therefore, the ON time of any one or more of the outputs φ1 to φ4 of the 1/4 frequency divider/phase shifter 3, that is, the output "H" time, or the off time, that is, the output "L"
We decided to change only the time of . That is, the on-times ti, t2 . of the phase shifter output signals φ1 to φ4 shown in FIG.
t3. It was decided to configure a circuit that increases or decreases, for example, only t2 of t4 to improve frequency resolution. In this case, when the above-mentioned oscillation frequency is 12 MHz, the driving frequency is around 40 KHz, and the driving frequency is around 70 KHz.

Of course, even if not only the on-time t2 but also the on-time and t4 are changed at the same time, the resolution can be improved by about twice as compared to the conventional method.

Also on time J.

t2. t3. Even if t4 is increased or decreased by one cycle of the oscillation frequency each time in this order, the same effect as when only the on-time t2 is increased or decreased can be obtained.

In this case, since the on-times t1 to t4 have different time widths, the output V of the power amplifier 4.

is distorted to some extent, but the amount of distortion is not so large, and the ultrasonic motor itself is not very sensitive to waveform distortion, so there is no problem at all.

In addition, although the 1/4 frequency divider/phase shifter 3 is taken as an example here,
Even if it is not 1/4, it is 1/2n (n-1,2゜...
), the same effect can be obtained in any case.

There is also another method for improving resolution. That is, it is a means of changing the average frequency per unit time by switching the drive frequency at a certain period. For example, in the case of FIG. 2, assume that 9 out of 10 times a certain value around 40 KHz is used, and the remaining time the preset value is increased by one. Then, with fN' as the average frequency, the resolution of the average frequency is Δf'−f −f
' and N N+1, it becomes , and similarly at around 70KHz. In this way, m times in M mouth (m = 0.1, 2°...
..., M-1) are set to different frequencies, the resolution will be significantly improved.

Regarding the effect on the motor when driven by this method, there is no problem as long as this frequency switching cycle is sufficiently short. This is because, although the ultrasonic motor certainly has high responsiveness, there is a limit to this, and a time of at least several m5ec is required.

Conversely, this is because even if the frequency is switched within that range, there will be no noticeable effect.

FIG. 1 is a block diagram of an ultrasonic motor drive circuit showing a first embodiment of the present invention. In this first embodiment, the same constituent members as those in FIG. 2 explaining the principle of automatic tracking described above are given the same reference numerals, and the explanation thereof will be omitted.

This first embodiment differs greatly from FIG. 2 above by using a Nant gate lla instead of the adder circuit 9.

11C and the AND gate 12 are provided. Below, the operation centered on the Nant gates lla, llc and the AND gate 12 will be explained in detail.

The sensor output signal output from the temperature sensor 6 is converted into a digital signal by the temperature detector 7, and further encoded by the encoder 8. That is, as the temperature changes from low to high, the output of the encoder 8 becomes (Ql, Q2 .
Q3. Q4)-(HHHH), (LHHH),
(HLHH)・・・・・・・・・(HLLL), (
LLLL).

When the phase shifter output signal φ1 is “H#”, the Nandt gate 11a outputs (Qll, Ql2°Ql3 .
Ql4) -(drunk, summer)l nlsu■), but φ1
-'L always outputs (HHHH). Similarly, for the Nantes gate LLC, if Q61-Q64 is the output of the frequency adjustment means 10, then when φ3-H, the output is (Q31.Q32゜Q33.Q34)-(Ding,
Ding σ possible E1m, and when φB-L, always (HHH
H) is output. By the way, the phase shifter output signal φ1 is “H”
Then, φ3 is “L”, so when φ1 is “H”, the output signal of the AND gate 12 is (Q51. Q52. Q5
3゜Q54) -(Qll, Q12. Q13. Q
14) −(′0″T.

■74 pieces, acceptable T), and if it is φB-H, it will be φ1-ri, so (Q51. Q52. Q53. Q54)
-(Q31. Q32. Q33. Q34) -(?
ffr, possible shoulder.

Ding...■). Furthermore, when φ2-H or φ4-H, φ1-φ3-L, so (Q51. Q5
2. Q53. Q54) -(HHHH).

The timing of presetting to the preset input terminals P1 to P4 of the frequency divider 2 whose preset input terminals P5 to P8 are set to predetermined values in advance, and the phase shifter output signal output from the 1/4 frequency divider/phase shifter 3 Regarding the switching timing of φ1 to φ4, the frequency divider 2 is preset first, and the phase shifter output signals φ1 to φ4 are switched immediately after, so the preset value that determines the length of time 11 of φ1-H is φ4. -051~ when H
This is the value of Q54. Similarly, the time t of φ2-H
2 is φ1-H, time t3 of φ3-H is φ2-H
The time t4 of φ4-H in the case of φ3-H is determined by the values of Q51-Q54 at each time point in the case of φ3-H. Therefore, tl and t are always constant,
t2 is the output of the encoder 8, t4 is the frequency adjustment means 10
will vary depending on the output.

Therefore, as the temperature rises, the value of 'n increases, so the on time t2 also increases, and as a result, the driving frequency decreases. Conversely, when the temperature decreases, the driving frequency increases. The resolution Δf of the drive frequency at this time is 133Hz at 40Kllz and 70KHz as described above.
The frequency is 406Hz.

Further, regarding the adjustment of the driving frequency, using the same concept, outputs 081 to Q64 of the frequency adjusting means 10 are used to adjust the driving frequency at t4.
Since only the time width can be changed, correction can be made independently of temperature.

As described above, according to the first embodiment, the resolution can be improved compared to the conventional system with a simple circuit configuration.

FIG. 7 is a block system diagram of an ultrasonic motor drive circuit showing a second embodiment of the present invention. In the first embodiment, the 1/4 frequency divider/phase shifter 3 is used to obtain the phase shifted signal.
Although the frequency is divided by 1/2n, it is not necessary to divide the frequency by 1/4.
Any frequency division (n-1, 2, . . . ) is sufficient. Therefore, in this second embodiment, an example of nwal in 1/2 frequency division, that is, 1/2n frequency division, is used instead of 1/4 frequency division. Components that are the same as those in the first embodiment are given the same reference numerals and their explanations will be omitted.

The output of the 1/2 frequency divider 3A has a duty ratio of approximately 50% and a frequency of f. It is a nearby square wave. This square wave signal is filtered into frequency components by a bandpass filter 13. Only the sine wave of is passed through, the others are cut off. This sine wave output is transmitted through an excitation transformer L12°, bias resistors R11, R12, and push-pull amplification transistors Trll and Tr12.
, the power is amplified by a push-pull power amplifier 4A composed of an output transformer L11. The operations from the temperature sensor 6 to the encoder 8 are the same as in the first embodiment.

The output of the encoder 8 and the output of the frequency adjustment means 10 are added by the adder 9 as explained in FIG. 2 above. Then, by the Nant gate 11, the 1/2 frequency divider 3
Since the preset value of the frequency divider 2 changes only when the output of the frequency divider 3A becomes "H", the time for the output of the 1/2 frequency divider 3A to become "L" changes depending on the output of the adder 9. become. As a result, the drive frequency is corrected and adjusted.

By the way, 1/2n frequency division φ phase shifter (n-1, 2°...
...) other than n-1 can basically be configured with the same circuit as the first embodiment. For example, in the case of nm3, the phase shifter output signals φ1 to φ6 are obtained, so the power amplifier can be easily configured by using two outputs with a phase shift of 180@, such as signals φ1 and φ4.

FIG. 8(A) is a drive circuit for an ultrasonic motor showing a third embodiment of the present invention. Above 1. The drive circuit for the ultrasonic motor shown in the second embodiment is applied to a standing wave type ultrasonic motor, but this drive circuit can also be applied to a traveling wave type ultrasonic motor. Embodiment 3 is one example.

Also, in this third embodiment, the same constituent members as those in the first and second embodiments are given the same reference numerals and their explanations will be omitted.

Generally, the difference between the driving circuits of standing wave type and traveling wave type ultrasonic motors is that the standing wave type requires a single-phase output, whereas the traveling wave type has the same amplitude and phase output that is 90'' different. 2 of the same frequency
The point is that a phase output is required. Therefore, this third
In the embodiment, among the outputs φ1 to φ4 of the 1/4 frequency divider/phase shifter, signals φ1 and φ3 are sent to the power amplifier 4a, and signals φ2 and φ4 are sent to the power amplifier 4a.
are supplied to the power amplifier 4b to generate two-phase outputs Va and vb having a phase difference of 90°, and the ultrasonic motor 5A
is supplied to the drive electrodes 5a and 5b.

The frequency correction circuit in this third embodiment will be explained below. In this explanation, the phase disease name of the signal output from each part will be referred to as the signal name.

Several methods have been proposed for frequency correction of traveling wave ultrasonic motors, and among them, human power signals Va, V to the motor
An excellent method is to correct the frequency so that the phase difference between the feedback signal QFB from the monitor electrode and the feedback signal QFB from the monitor electrode is kept constant. Among the drive/circuits using this method, the one described in Japanese Patent Application No. 63-33593 previously filed by the present applicant has problems such as frequency jumps and start frequency setting as explained in the conventional example above. It's solved and very useful. The drive circuit of the third embodiment described here is one in which the circuit scale is reduced and the frequency adjustment is rationalized by further advancing digitalization while making the most of its advantages.

A sinusoidal feedback signal θPB taken out from the monitor electrode 5C and having a voltage VPB' and a phase angle θFB is converted by the waveform shaper 14 into a square wave signal θFB' having a voltage V' and a phase angle θFBB. The phase θFB' of this square wave signal θ' refers to the rise edge. This square wave signal θPB is compared with the rising edge of the reference phase signal θref' output from the delay device 17, and if θPB' is ahead, "
The phase comparator 15 outputs "L", and "H" if there is a delay.The reference phase 1 signal θrer is the phase of the motor drive voltage Va or vb input to the motor 5A, or V
Although the phase of a signal delayed from a and Vb may be used, here, in order to avoid analog processing as much as possible, a signal obtained by digitally delaying the phase shifter output signal φ1 is used. . That is, the rising edge of the phase shifter output signal φ1 causes the delay device 17 to output the clock pulse CLK.
I is counted, and when a certain number is counted, a one-shot pulse is output as the reference phase signal θret. This constant number can of course be set digitally,
This makes it possible to advance or delay the random quasi-phase signal θrel', and the fineness of the setting depends on the clock pulse CLKI, which has an oscillation frequency that is sufficiently high compared to the drive frequency, and the setting range is Since the present invention covers 360', it is no inferior to, for example, the patent application No. 119987/1987, which was previously filed by the present applicant and relates to the setting of the reference phase. Here, regarding the fineness of the settings, if the oscillation frequency is, for example, 12 MHz and the driving frequency is, for example, 40 KHz, then 300 steps,
That is, it can be set for every 1.2'' phase.

Now, the output signal of the phase comparator 15 is directly output from UP/D.
This becomes the UP/DN signal of the N counter 16.

In other words, 'L#' means DN count, 'H' means UP.
Do a count. UP/DN counter 16 at this time
Although the phase shifter output signal φ2 is used as the clock pulse, it may be another signal or may be a frequency-divided signal of φ2. Counter output signals Q71 to Q74 outputted from the UP/DN counter 16 are based on the above-mentioned patent application No. 1983-
In the one described in No. 33593, it was connected to a D/A converter, but in this third embodiment, the drive frequency is directly changed digitally without converting it to an analog value.

The Nant gate lla and the AND gate 12 are
As explained in the embodiment, when the UP/DN counter 16 counts up, the time t2 of φ2-H becomes shorter, and when it counts down, the time t2 becomes longer. Phase θFB' of the above square wave signal θ'
As time progresses, time t2B becomes longer and the drive frequency becomes lower;
2 becomes shorter, the driving frequency becomes higher.

In this way, frequency correction to the appropriate driving frequency of the ultrasonic motor, that is, automatic frequency tracking is performed.

By the way, due to the nature of the UP/DN counter, even if a frequency jump occurs, the output will vary from (LLLL) to (H
to (HHHH) or from (HHHH) to (L L L L
) and starts counting down or up again, reaching the optimum point f of the driving frequency. can return to. Furthermore, when the ultrasonic motor is not started, the feedback signal θ['B is not output, so the phase comparator 15 continues to output either "H" or "L" UP/DN signal. The /DN counter 16 continues to count up or down, and as a result, the driving frequency is swept exactly, and the optimal point is caught when the ultrasonic motor starts rotating and the feedback signal θFB appears, so the process starts. No need to set frequency.

In addition, the patent application filed earlier by the applicant in 1983-35
No. 529 describes a method for facilitating the setting of the maximum frequency f, then 18X and the minimum frequency fIIio, but in this third embodiment, the frequency adjusting means 10. Nantes Gate llb, And Gate 12
Accordingly, the maximum frequency f and the minimum frequency 'akin are shifted by changing the time t3.

ax Since these can be controlled by digital signals, the circuit can be further miniaturized and the adjustment can be simplified compared to the one described in Japanese Patent Application No. 63-35529.

Therefore, in this third embodiment, the power amplifier 4a,
4b and the waveform shaper 14, all of them are digitalized, so they can be integrated into a one-chip IC.As shown in FIG. 8(B), the feedback signal θPB of the waveform shaper 14 is via diode D21. D22. D23.D23 is applied to D24 to convert it into a square wave, and the transistors Tr21. By performing switching amplification using the resistor R21 to obtain the square wave signal oFB', it can be integrated into an IC.

Therefore, since all adjustments can be made using digital signals, there is no need for any external parts such as variable resistors, automatic adjustment is possible, and, of course, the power supply voltage can be operated within the range in which the IC can be driven.

FIG. 9 is a block diagram of an ultrasonic motor drive circuit showing a fourth embodiment of the present invention, which is configured to drive a traveling wave ultrasonic motor 5A similarly to the third embodiment. . This fourth embodiment differs greatly from the third embodiment in that a microcomputer is used, and the same components as those in the third embodiment are designated by the same reference numerals and their explanations will be omitted.

The microcomputer 18, which has a function of comparing both the reference phase signal θrer and the square wave signal eFB' and adjusting the frequency to an appropriate frequency, determines whether the square wave signal θPB' is ahead or behind the reference phase signal θref'. Then, read how many pulses the deviation is. Based on the amount of shift and phase lead/lag, the microcomputer 18 determines the value of the output signal QIOI-Q10B according to a predetermined rule. Output signal Q 1
01 to Q10B are code-converted by the encoder 8a and become the encoder output signals shown in Table 1 below.

This encoder output signal Qllll-Qll4.

Q121~Q124, Q131~Q134,
Q141 to Q144 are respectively Nantes Gate lla
,llb.

11c and lid, and can pass only when the phase shifter output signals φ1 to φ4 become “H”. AND gate 12a is Q51-Qll・Q21・Q
31-Q41. Q52-Q12φQ22・Q32
・Q42, Q53-Q13・Q23・Q13・Q43
, Q54-Q14, Q24, Q34, and Q44, so as described in the first embodiment, the encoder output signals Q111~
The value of Q114 determines the time t2 of φ2-H, the value of the encoder output signals Q121 to Q124 determines the time t3 of φ3-H, and the value of the encoder output signals Q131 to Q134 determines the time t4 of φ4-H. Signal Q
The time t1 of φ1-H changes depending on the values of 141-Q144. Therefore, as can be seen from Fig. 9, when the value of the microcomputer output increases one by one, the time t2
．． t3. 1 of the clock pulse CLKI in the order of t4゜tt
When the waiting time is shortened by one cycle and conversely, the microcomputer output is decreased one by one, the time is increased by one cycle of the clock pulse CLK1. That is, as the microcomputer output increases, the frequency increases, and as it decreases, the frequency decreases. Now, the microcomputer 18 reads the values of the reference phase signal θrel' and the square wave signal θPB', outputs the microcomputer output signals Q tot to Q 10B, and repeats the same process again after a certain period of time. Then, when the phase difference between the reference phase signal θrer and the square wave signal θPB' is within a certain range, that is, when the number of pulses of the shift is within a certain value, the output value is fixed.

In this method, since the maximum time difference between times t1 to t4 is one period of the clock pulse CLKI, waveform distortion is extremely small. Therefore, although the preset value of the frequency divider 2 is only 4 bits in FIG. 4, it is possible to further increase the number of bit strokes to widen the frequency range to be changed.

In the drive circuit of the fourth embodiment, the upper four bits of the preset value of the frequency divider 2 are also controlled by the microcomputer output signals QI07 to Q110. This makes it possible to switch and drive a plurality of ultrasonic motors by, for example, greatly changing the driving frequency.

Although not shown in the figure, it is also possible to provide speed control by providing a motor rotation speed detection means. That is,
Since the rotational speed of the motor changes depending on the driving frequency, a speed signal may be input to the microcomputer 18 to control the microcomputer output so as to maintain a predetermined speed.

FIG. 10 is a block system diagram of an ultrasonic motor drive circuit showing a fifth embodiment of the present invention. This fifth embodiment is
Above 1. Like the second embodiment, it is applied to the standing wave type ultrasonic motor 5, but it is useful when higher resolution is required or when you want to lower the oscillation frequency to maintain resolution. The frequency can be changed by This fifth embodiment is largely different from the first embodiment described above in that an adder 19 and a duty variable 1
Components that are the same as those in the first embodiment except that the /4 frequency divider 20 is added are given the same reference numerals, and their explanations will be omitted.

Encoder output signal Q1.supplied from encoder 8 to adder 19. Q2. Q3. Q4 has a value of 1 when it rises by 4℃
It is now decreasing. That is, as shown in Table 2, the encoder output signals Q1, Q2 . Q3.
Q4 is output as 1011 when the temperature is 1111.4 to 7°C and 0111.8 to 11°C.

Further, this encoder 8 has a variable duty 1/4 frequency divider 20 with an encoder output signal Q5. Output Q6.

Then, the variable duty 1/4 frequency divider 20 has a duty ratio of 0 when the encoder output signal Q5, Q6 is (00), that is, it is always "L", and a duty ratio of 1/4 when it is (10). , when (01), the duty ratio is 2/4, and when (11), the duty ratio is 3/4.
A variable duty ratio output signal Q7 of 4 is output. However, since it is a 1/4 frequency divider, the frequency is 1/4 of the drive frequency.
It is 4.

The adder 19 receives the encoder output signals Q1 to Q4 output from the encoder 8 and the duty variable 1/4 frequency divider 20.
and the variable duty ratio output signal Q7 outputted from the output signal Q7. Therefore, for example, the duty ratio variable output signal Q7
When the duty ratio of is 1/4, the adder output signals Ql', Q2', Q3', output from the adder 19
Q4' is (Ql, Q2.Q'3.Q4) 3 out of 4 times
However, one out of four times (Ql, Q2.Q3.Q4)
It becomes +1. That is, once every four times, the value of time t2 becomes smaller by one period of the clock pulse CLKI. Similarly,
When the duty ratio is 2/4, the value of time t2 becomes small twice out of four times, and when the duty ratio is 3/4, the value of time t2 becomes small three times out of four times. Therefore, considering the average frequency, l/4 x Δf (Δf is the resolution in Figure 1)
This means that it is changing gradually.

Now, assuming that the oscillation frequency of oscillator 1 is 12 MHz and the motor drive frequency is 40 KHz, the average frequency resolution Δf'
is Δ['-Δf XI/4-133 X 1/4Φ33H
z, and if the driving frequency is 70KHz, Δf' - Δ
f Xi/4 =406 X l/4+102 Hz. Even such an average frequency is effective in an ultrasonic motor. This is because the response speed of an ultrasonic motor is several tens of m5ee at the fastest, but it is m5ec.
Since it is sufficiently small compared to the response speed, the effect of the switching will not appear.

In this way, this duty variable 174 frequency divider 20
And the adder 19 improves the resolution of the driving frequency.

By the way, this variable duty 1/4 frequency divider 20 does not have to be 1/4, but is 1/m (m-2, 3, 4, . . .
...) is possible.

Moreover, although the drive circuit for a standing wave type ultrasonic motor has been described here, it goes without saying that the present invention can also be applied to a drive circuit for a traveling wave type ultrasonic motor.

Furthermore, the Nantes gate 11a in FIG.

Even if the 11c1 AND gate 12 is omitted and the output of the adder 19 is directly applied to the frequency divider 2 as a preset value, a sufficient effect can be expected.

Although the five embodiments have been described above, this method can be applied not only to digital circuits but also to drive circuits including analog circuits, and it is of course possible to obtain sufficient effects.

[Effects of the Invention] As described above, according to the present invention, frequency resolution can be significantly improved. Therefore, digitization of the drive circuit, which could not be realized before, can be realized at a sufficiently practical level, and the scale of the circuit can be reduced by converting it into an IC. Furthermore, since adjustments can be processed digitally, the number of adjustment steps can be reduced. Furthermore, because it is a digital signal, it is resistant to noise, and since a crystal resonator can be used as an oscillator, it has little temperature dependence, so stable operation can be expected even under adverse conditions. be done.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an ultrasonic motor drive circuit according to a first embodiment of the present invention, and Fig. 2 is a digitized ultrasonic motor for explaining the operating principle of automatic tracking of the optimum drive frequency. 3 is a timing chart explaining the operation of each part in FIG. 2, FIG. 4 is a circuit diagram showing an example of the power amplifier in FIG. 2, and FIG. , the optimum driving frequency f in the ultrasonic motor. Figure 6 shows the characteristic diagram for motor temperature T of various ICs.
FIG. 7 is a block system diagram of an ultrasonic motor drive circuit showing a second embodiment of the present invention, and FIG. FIG. 8(B) is a block diagram of a drive circuit for an ultrasonic motor showing the third embodiment, FIG. 8(B) is a circuit diagram showing a modified example of the waveform shaper, and FIG.
FIG. 10 is a block system diagram of an ultrasonic motor drive circuit according to a fifth embodiment of the present invention. 1......Oscillator 3...1/4 frequency divider/phase shifter (frequency divider phase shifter) 3A...1/2 Frequency divider (frequency division phase shifter) 4.4
a, 4b, 4A...Power amplifier 5...
...Standing wave type ultrasonic motor (ultrasonic motor) 5A...
...Travelling wave type ultrasonic motor (ultrasonic motor) 30th 40th procedure 1. Indication of the case 2, name of the invention 3, name of the location of the person making the amendment 4, agent 5, amendment subject to the amendment (voluntary) May 1, 1999 1511 Patent Application No. 002625 and above of 1999 Sonic motor drive circuit

Claims (1)

[Claims] (1) In an ultrasonic motor drive circuit that changes the frequency of the AC voltage applied to drive the ultrasonic motor, there is an oscillator and a component that divides and phase-shifts the output of this oscillator into multiple pulse signals and outputs the pulse signals. a frequency phase shifter; and a power amplifier that amplifies the output of the frequency dividing phase shifter to produce the alternating current voltage, the pulse width of at least one of the pulse signals or the width of the OFF portion of the oscillator. An ultrasonic motor drive circuit characterized in that the frequency of the alternating current voltage is changed by changing the output or frequency-divided output every cycle.