JPH02181790A - Automatic performance device - Google Patents

Abstract

PURPOSE:To easily and rapidly execute the edition of performance information by producing the performance data tone instructed by an address pointer for a prescribed period of time when the depression of a step forward key is detected. CONSTITUTION:The depression of the step forward key (STEPFD) 5 is detected by an operating element switch circuit 22 when this key is depressed. The automatic performance data instructed by the present address pointer (ADR) is then read out of a performance data memory (APM) 42 and a musical tone signal generating circuit 63 for automatic performance produces the performance data tone for the prescribed period of time. The ADR in the APM 42 is progressed up to the address of the performance data to be produced next when the transmission of the signal ends. The same performance data is again kept produced for the prescribed period of time when the depression of the STEPFD 5 is executed again within the prescribed time after the depression thereof. The edition of the performance information is, therefore, rapidly executed with the simple operation when the specific performance information is desired to be edited.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application in Industry A] The present invention relates to an automatic performance device that performs automatic performance by sequentially reading out performance data sequentially stored in a performance data memory.

[Prior Art] Conventionally, some automatic performance devices have a function of first storing performance information that has been manually performed by a performer in a storage device, and automatically performing the performance by reproducing this performance information. .

[Problems to be Solved by the Invention] By the way, in this type of automatic performance device, there are cases where it is desired to change a part of the stored performance information. However, conventional automatic performance devices are not aware of this so-called editing of performance information, and simply read the stored performance information and make it sound at the key-on timing of the performer, and then move the address pointer to the next sound. The system simply advances (steps up) to the desired performance information, and successively sounds the performance information pointed to by the address pointer. Therefore, when it is desired to edit specific performance information in the performance information, it is difficult to set an address pointer to the performance information, and it is difficult to edit the f4 back information.

SUMMARY OF THE INVENTION In view of the above-mentioned problems with the conventional type, it is an object of the present invention to provide an automatic performance apparatus that allows performance information to be edited quickly with simple operations.

[Means for Solving the Problems] In order to achieve this object, the present invention detects the depression of a step forward key in an automatic performance device having a performance data memory, and transmits the performance data sound pointed to by the address pointer for a predetermined period of time. T.

It is decided to pronounce it during the period.

Incidentally, after producing this performance data sound, it is preferable to advance the address pointer to the address of the performance data to be produced next. Further, if the step forward key is pressed again within the predetermined time 13 after the step forward key is pressed, the same performance data sound may be retriggerably continued to be produced again for the predetermined time T3.

Furthermore, in this invention, if the step forward key is kept pressed for a predetermined period of time 12 or more after the step forward key is pressed, the address pointer is advanced at intervals of a predetermined time T1, and the performance data sounds pointed to by the address pointer are sequentially played. I try to pronounce it. In this case as well, if the step forward key is pressed again within the predetermined time TI interval, the same performance data sound will continue to be produced for the predetermined time T3 from the time when the step forward key is pressed again in a retriggerable manner. be able to.

[Function] According to the above configuration, when the step forward key is lightly pressed once, the performance data is sounded during T3. Also,
If the step forward key is pressed again within 13 seconds after being pressed, the same performance data sound will continue to be produced. Further, if the step forward key is continuously pressed for a period of 13 or more, the performance data is then fast-forwarded at intervals of T and the sound is generated. In this case, T2
, it is preferable that rapid processing becomes possible.

[Example] Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram showing an external view of a keyboard section and the like and an internal configuration of a performance device 1111 according to an embodiment of the present invention. In the same figure, 1 indicates a part of the keyboard part,
This panel section is provided with various switches. 2
3 is a 7-segment LED for address display, and 3 is a tempo display LED. 4 is a REC switch for recording and inputting automatic performance sounds, 5 is a step forward (STEPFD) switch used when editing automatic performance data, 6 is a FLY switch for playing automatic performances, and 7 is for stopping automatic performances. 8 is a REW switch for rewinding automatic performance in the opposite direction, and 9 is a RESET switch. Also, 10 is the TEMPO switch for changing the tempo, 11 is the auto rhythm start/stop switch, and 12 is the auto bass chord (
ABC) switch, 20 is a performance keyboard.

21 is a key switch circuit that detects key presses and key releases on the keyboard 20, 22 is an operator switch circuit that detects on/off of various operator switches 4 to 12 on the panel, and 23 is an address display 2 and a tempo display. This is the display control circuit of No. 3. 3
1 is a timer oscillator (O3C) for performing timer interoperation at predetermined time intervals, and 32 is a tempo O3C for generating a tempo reference signal. 40 is a data storage circuit, which includes a rhythm pattern data memory (ROM) 41, an automatic performance data memory (RAM) 42, an event buffer register (RAM) 43, and a key buffer register (RA).
M) 44, an automatic accompaniment key data table 45, etc. These registers and memories will be explained in detail later.

A microcomputer 50 includes a program memory (ROM) 51, a CPU 52, and a working memory 53. 61 is a rhythm sound signal generation circuit, 62 is a musical tone signal generation circuit for a keyboard, 63 is a musical tone signal generation circuit for automatic performance, and 64 is an amplifier. Each of the above circuits, a microcomputer, a memory, etc. are connected to a bus 70.

Next, formats of various data will be explained with reference to FIG.

FIG. 2(a) is a format diagram showing the data format on the automatic performance data memory 42 of FIG. 1. The automatic performance data is stored in the array APM, and the performance data for each beat is a fixed length format record accessed in the APM (ADR). The storage capacity is set to a level that can store, for example, 100 bars of automatic performance data.

As shown in FIG. 2(a), automatic performance data of a quarter note corresponding to one beat is stored in four elements of the array APM. For example, if one measure is made up of four beats, the performance data at the beginning of the 20th measure can be calculated as 4X4X (20-1)+1=305th, that is, APM (305). 1 element AP
M (ADR) represents automatic performance data for 1/4 beat, and its 0 to 35 bits (KEYbuf) are key data,
Bits 36 to 39 are additional data. The key data is 6
One keystroke sound is represented by a bit, and six tones can be stored in one element. As additional data, the root indicating the root note of the chord, the timbre, the style indicating samba, tump, etc., and the chord type/accumulation can be stored. Chord type is data that represents the type of chord such as major or minor, accompaniment is data that represents accompaniment on/off,
is data indicating whether it is the first measure or the second measure of the style.

These additional data are set at about one beat as shown in FIG. 2(a). That is, the root data, timbre, etc. stored in the data format for one beat (data from APM (ADH) to APM (ADR+3)) are valid for all key data during that one beat.

Since the automatic performance data is stored as a fixed-length record for each beat (so-called solid storage), editing (pan-nine and punch-out) of the performance data is extremely easy. In addition, data such as key data that has a large number of events within a unit time is stored in solid form, and data such as timbre data that has a small number of events is stored in one block (one beat), so it is easy to compress the data. Become. Although the array APM for storing automatic performance data has APM(1) as the first element in the memory, it is of course possible to use APM(0) as the first element.

Figure 2(b) shows the event buffer (IVTBU) in Figure 1.
F) shows the storage format of 43. The event buffer IVTBUF is a register that stores event data when a keyboard key is pressed or released, or a changeover switch for tone, style, etc. is pressed. As shown in the figure, the first bit of the event data stored in the event buffer IVTRUF can be used to determine whether it is key data related to the keyboard or additional data such as a root or timbre. In addition, in the case of additional data, the type of root, timbre, etc. can be determined using the following two bits. Data stored in the event buffer IVTBUF upon occurrence of an event is taken into the key buffer register KEYBUF and sent to a musical tone signal generation circuit, thereby generating a musical tone.

FIG. 2(c) shows the format of the automatic accompaniment key data table 45 shown in FIG. This is a table for knowing the key data to be pronounced from the beat (data indicating the number of beats).

Other registers are shown below.

1. ADR near address pointer. Automatic performance memory APM
This is used as a pointer to point to the automatic performance data stored in the .

2. REC: A flag indicating that the mode is for recording and inputting performance data into the performance data memory.

3. RECSY: Flag indicating synchronization standby state in performance data recording input mode.

4. PLY: Play flag indicating that the mode is an automatic performance playback mode in which performance data is read and sound is produced.

5. RUN: Run flag indicating rhythm running state.

6.5TEPFD Step forward flag indicating pressing of the step forward key.

7. REW': Flag indicating pressing of the rewind key.

8. A flag indicating that by continuously pressing the REPT two-step forward key, a fast-forward mode (repeat mode) is entered in which performance data is sequentially read out and sounded at intervals of 71 seconds.

9, ABLE: Retrigger (retri, g8er)
A flag indicating the state in which this is possible.

10, T, timer counter register.

11, 71: Fixed value (0.25 seconds here).

12, T2: Fixed value (0.7 seconds here).

13, T3: Fixed value (here 1.3 seconds).

14. TCNT: Tempo counter register.

Next, the operation of the automatic performance apparatus shown in FIG. 1 will be explained with reference to the flowcharts shown in FIGS. 3 to 8.

Referring to the main routine of FIG. 3, when the automatic performance device is turned on, first initial settings are made in step S1, and in step S2 the key information of the keyboard keys 20 and/or of each of the operator switches 4 to 12 is set. Enter operation information. In step S3, if there is no event, the process returns to step S2, and if there is an event, each event is determined and the process branches to the respective processing routines (steps 84 to 515).

That is, if the event is related to a keyboard key, timbre, or style, the process branches to step S4, and the process shown in FIG. 5 is performed. This will be discussed later.

If the event is related to tempo/rhythm selection, the process branches to step S5, and the rhythm type is set or the tempo is set according to the operation of the rhythm selection operator (not shown) or the TEMPO operator switch (first blade number 10). Make settings.

If the event is related to recording input of performance data, such as pressing down of the REC switch 4, the process branches to step S6 and the process shown in FIG. 4 is performed. This will be discussed later.

If the event is FLY switch 6 press, step S
7, the play flag FLY is set to 1 to set the automatic performance playback mode, and the run flag RUN is set to 1 to set the rhythm running state. By setting these flags, automatic performance data is played back by the rhythm interwoven routine (Figure 6), which will be described later.
Rhythm sounds are also generated. Furthermore, in step S7,
The flags REC and RECSY are set to O, and the automatic performance recording input mode is canceled.

If the event is the pressing of the AP stop switch 7, the process branches to step S8, where the play flag FLY is set to 0 to cancel the automatic performance playback mode, and the run flag RUN is set to O to cancel the rhythm running state. Furthermore, the flag REC
and RECSY is set to 0 to cancel the automatic performance recording input mode.

In the event that the rhythm start/stop switch 11 is pressed, the process branches to step S9 and the run flag RLI is
Invert N. That is, if it is in a rhythm running state, it is canceled, and if it is not in a rhythm running state, it is put into a rhythm running state.

In the case of an on event of the step forward switch 5, the process branches to step S10 and processes as shown in FIG. 7 are performed. This will be discussed later.

In the case of an off event of the step forward switch 5, the process branches to step Sll, sets the flag 5TEPFD to O, and sets the flag ABLE to 1. As a result, in the timer-interrupted routine (FIG. 8), predetermined processing as described later is performed.

In the event that the reset switch 9 is pressed, the process branches to step 312 and the address pointer ADR is initialized to 1.

In the case of an on event of the rewind switch 8, the process branches to step S13, where the timer register T is cleared to 0 and the rewind flag REW is set to 1. This results in
In the timer-interrupted routine (FIG. 8), a predetermined rewind playback process is performed. Furthermore, when rewinding, it is necessary to mute the currently sounding channel, so in step S13 a key-off signal is sent to all sounding channels. And address pointer A
DR is returned by 1 and the value is displayed as address display 2.

In the case of an off event of the rewind switch 8, the process branches to step S14, and the rewind flag REW and repeat flag REPT are set to 0.

As a result, a predetermined rewind-off process is performed in the timer-interrupted routine (FIG. 8).

If the auto bass chord switch 12 is pressed, the process branches to step S15 and the accompaniment flag BANSo is inverted. That is, if it is in the auto-base running state, it is canceled, and if it is not in the auto-base running state, it is set to the auto-base running state.

As described above, after determining each event and executing predetermined processing in step S3, the process returns to step S2.

Next, with reference to FIG. 4, the RECI of step S6 in FIG.
Explain the principle A. When the REC switch is pressed, flags REC5Y and RUN are first set to 1 in step S61. This causes the device to enter a synchronized standby state.

Next, it is determined in step S62 whether the flag FLY is 1, in step S63 it is determined whether the flag RLIN is 1, and in step S64 it is determined whether any key on the keyboard has been pressed. If none of the above apply, step S6
In step S5, it is determined whether or not the REC key has been pressed, and if the REC key has not been pressed, the process returns to step S62. If RE again
If the C key is pressed, the flag R is set in step 366.
Clear EC3Y to 0, release the synchronized standby state, and return.

On the other hand, if the flag PLY is 1 in step 362 (when the REC key is pressed during automatic performance playback), the flag REC is set to 1 in step 67, and the flag REC is set to 1 in step 67.
Clear 3Y to 0. That is, the recording manual mode for automatic performance is set and the synchronization standby state is canceled. and,
In step 368, all key data in the performance data memory APM (ADR-1) pointed to by the previous address pointer ADR is converted into key-off codes, and the process returns.

This step S68 is a process for editing the automatic ¥tora performance data. In other words, from the playback status etc.
When a so-called bunch-in occurs, in which the recording state is entered by pressing a key, the previous key data may continue to sound, so set key-off for all key data in the performance data memory, and This prevents the sound from continuing to be pronounced. As a result, the automatic performance will be properly sounded no matter where the bunch-in begins in the automatic performance data that has already been input.

If the flag RUN is 1 in step S63 (when the REC key is pressed during autorhythm running), step S63 is also performed.
The process advances to step 67 to enter automatic performance record input mode. Furthermore, if any keyboard key is pressed in step 364, the process similarly advances to step S67.

From the above, according to this embodiment, first the REC switch is set to 1.
By pressing twice, synchronization standby state (REC3Y=
1) From this state, by pressing the PRY switch, pressing the Start/Stop switch, pressing any key on the keyboard, or pressing the REC switch again, the standby state will be exited and the REC state will be entered, and from that point on, the key code will suddenly be changed. can be written. Furthermore, if you press the RFC switch during play, you can bunch-in from that position.

Next, referring to the flowchart in FIG.
The operation when there is an event related to timbre or style (step S4 in FIG. 3) will be explained.

First, in step S41, it is determined whether or not the synchronization standby state is present. If so, in step S42, the flag REC3Y and the register TCNT are cleared to 0, and the flags RUN and REC are set to 1. Next, in step S43, the event data is stored in the event buffer register IVTBUF.
In step S44, it is determined whether the flag REC is 1 or not. If the flag REC is not 1, it means that the performance data recording mode is not manually performed, and in step S45, the data in the event buffer register VTRUF is sent to the musical tone signal generation circuit for the keyboard. This includes panel SW operation events. Further, in step S46, the event buffer IVTBtJF is cleared and the process returns.

If the flag REC is 1 in step S44, it is necessary to record the event data in the performance data memory, so the process branches to step S47. In step S47, the number of bars is displayed based on the value of the address pointer ADR. Then, in step 348, one event data is extracted from the event buffer IVTBUF, and in step S49, the event data is identified.

If it is key data, it is determined in step S50 whether it is an accompaniment key or a melody key based on the pitch.

If it is an accompaniment key, the root note is determined in step 351 and written in bits 39 to 36 of the performance data memory APM (ADR). If it is a melody key in step S50, the flag BANSO is checked in step S53, and if it is 1 (that is, in the case of automatic accompaniment), step S54
Write the keystroke code in bits 11 to 0 of the performance data memory APM (ADR). Note that a storage area for two notes is reserved for accompaniment. In step S53, the flag B
If ANSO is not 1, the keystroke code is written in bits 35 to 0 of the performance data memory APM (ADR) in step S55. When automatic accompaniment is not performed, keystroke codes for six notes are stored.

On the other hand, if the event data is timbre data in step S49, the timbre data is written in bits 39 to 36 of the performance data memory APM (ADR+1) in step 358. If it is style data, the style data is stored in the performance data memory APM in step S59.
(ADR+2), and if the data is chord type, accumb, etc., those data are written to the performance data memory APM (,
Write to bits 39 to 36 of ADH+3).

Next, in step S52, the event buffer IVTBUF
Clear the retrieval event data in step 356.
It is determined whether there is any remaining event data, and if there is, the process returns to step 34B and the above process is repeated. When there is no more event data, the address pointer ADR is incremented in step S57 and the process returns.

Through the processing described above, automatic performance data is recorded and input, and each event is stored in the performance data memory APM. In this embodiment, a timer-interrupted routine in the performance data recording input mode (not shown)
t and ADH are stepped at predetermined intervals. Data (silence data) from the key-off event to the key-on event is also recorded in the APM. Furthermore, any timbre change in the middle of a beat is written on the next beat.

Next, the sum interaction process will be explained with reference to the flowchart of FIG. Rhythm Interrupt is an interrupt process performed at time intervals of 1/3 of a 16th note, which is the resolution (1/4 of a quarter note) of the automatic performance memory APM.

First, in step 5201, the flag PLY is checked to determine whether or not an automatic performance is being reproduced.

If it is being played, the AP screen shown in FIG. 6(b) is called, and if it is not being played, the process directly advances to step 5203. In step 3203, the run flag RUN is checked, and if the rhythm running is not in progress, the process returns. If it is in the rhythm running state, it is determined in step 5204 whether it is in the synchronized standby state, and if so, a claves sound (metronome sound) is produced every beat in step 5205, and if it is not in the synchronized standby state, the set rhythm is activated in step 5206. Based on the type and tempo counter TCNT, rhythm pattern data is read out and output to the rhythm sound signal generation circuit 61. After that, in step 5207, the tempo counter TCNT
Then, in step 3208, it is determined whether TCNT is at the end of the second measure. If TCNT is the end of the second bar, TCNT is cleared to O in step 5209 and the process returns.

The AP screen shown in FIG. 6(a) will be explained with reference to FIG. 6(b). First, in step 5211, the tempo counter T
It is determined whether CNT is at the beginning of a quarter note, and if not, the process advances to step 5218. If the tempo counter TCNT is at the beginning of a quarter note, it is determined in step 5212 whether automatic accompaniment is being performed, and if so, in step 5213 the root, style, and chord type accumulator (APM) of the automatic performance data memory APM are stored.
(ADH) 39-36 bits, APM (ADR+2)
39-36 bits, APM (ADR+3) 39-36
Automatic accompaniment key data table (
Referring to FIG. 2(C)), the corresponding key data is taken into the key buffers KEYBUF3 to KEYBUF6. This is the data that should be generated for automatic accompaniment. Next, in step 3214, the tone color data (APM (ADR+1) 39-36 bits) is sent to the automatic performance musical tone signal generation circuit 63 to set the tone color. Then, in step 5215, the register BEET is incremented, and in step 5216, it is determined whether or not BEET is 8, that is, whether the second bar has been reached. If it is 8, BEET is cleared to 0 in step 5217.

In step 5218, it is determined whether the tempo counter TCNT is at the beginning of a 16th note, and if not, the process returns directly. If it is the beginning timing of a 16th note, the flag BAN is set in step 5219.
It is determined whether automatic accompaniment is being performed by checking SO, and if not, in step 5220, four notes of 12-35 bit key codes of performance data APM (ADR) are set in key buffers KEYBUF3-6. Then, in step 5221, the performance data APM (
ADR) 0 to 11 bit key code for 2 notes is set in the key buffer KEYBUF1.2, and step 522
At step 2, the key buffers KEYBUFI to 6 are sent to the automatic performance musical tone signal generation circuit 63 for sound generation, and at step 5223, the address pointer ADR is incremented and the process returns.

Next, the pressing of the step forward key and the accompanying sound generation process will be described with reference to the flowchart in FIG. 7.8.

First, when the step forward key 5TEPFD is pressed, the step forward routine 5TEPFD shown in FIG. 7 is called from step s10 in FIG.

Referring to FIG. 7, in step 5lot, a timer counter T is initialized to O, a flag 5TEPFD indicating pressing of the step forward key is set to 1, and a flag AB
Clear LE to 0. Then, in step 5102, similar to step 5118 in FIG. 8, which will be described later, the performance data pointed to by the current address pointer ADH is sounded, and the process returns.

Thereafter, when the timer is interrupted, the process shown in FIG. 8 is executed. First, in step 5111, flag 5TEPF is set.
Check D. If the step forward key is pressed and flag 5TEPFD is set to 1,
Proceeding to step 5112, it is determined whether the time from the time of pressing the step forward key is TIJ<72=0.7 seconds.

If not, in step 5113 the flag REPT
Determine whether or not is 1. The flag REPT is a flag that is set when the step forward key is kept pressed for 72=0.7 seconds.

If the flag REPT is not 1, the process branches to step 5114, where the timer counter T is incremented and the process returns.

If the flag REPT is 1 in step 5113 (if the step forward key continues to be pressed 12 or more times), then in step 5119 T-T2 is set to 1 for a predetermined time T, =
Check if it is a multiple of 0.25 seconds. If it is not a multiple, the process branches to step 5114, and if it is a multiple, step 5116 sets all channels of the key buffer KEYBUF as key-off data and sends this KEYBUF data to the automatic performance musical tone signal generation circuit 63 to mute the sound. Then, in step 5117, the address pointer ADR is incremented, and in step 5118, the performance data APM (ADH) is
The key data is taken into the KEYBLJF and sent to the automatic performance musical tone signal generation circuit 63 for sound generation. Note that at the address at the beginning of the beat, additional data other than key data is also taken into KEYBUF, and the musical tone signal generation circuit 6
After step 3, send to step 3 and set the tone etc.
Proceed to 114.

If the flag 5TEPFD is not 1 in step 5111 (if the step forward key is turned off),
At step 5120, the flag ABLE is checked. The flag ABLE is set to 1 in step Stt in FIG. 3 when the step forward key is turned off, and while it is set, the performance data sound pointed to by the current address pointer ADR continues to be generated. If the flag ABLE is 1 in step 5120, the timer count T is incremented in step 3121, and it is checked in step 5122 whether the timer count T is equal to the predetermined time T3=1.3 seconds. When it is equal to T3, the timer count T is cleared to O in step 5123, and the flag ABLE is reset to zero. Then, in step 5124, the sound currently being produced is muted, and in step 5125, the address pointer A is
Step DH and return.

If the flag ABLE is not 1 in step 5120, or if the timer counter T is T, "1" in step 5122,
．． If it is not equal to 3 seconds, the process branches to step 126 and flag REW is checked.

When the flag REW is 1, it is determined in step 5127 whether the timer count T is equal to a predetermined time T4=0.2 seconds, and if so, the process proceeds to step 3128. Then, in step 3128, address pointer ADR is set to 1.
Return to display, clear timer count T to 0, and return.

If the flag REW is not 1 in step 5126, or if the timer count T is not 1 in step 5127,
If it is not equal to 4=0.2 seconds, it is checked in step 5129 whether the flag REPT is 1, and if it is 1, the process advances to step 5130, and if it is not 1, it returns. In step 3130, it is checked whether the timer count T exceeds 1 second and T-T2 is a multiple of T, -0.25 seconds. If the check is positive, step 5
At step 131, the flag REPT, timer counter T, and flag ABLE are cleared to 0, the sound is muted, and the process returns. If the check in step 5130 is negative, step 51
The process branches to step 14 and performs the processing described above.

FIG. 9 is a conceptual diagram showing the timing of pressing the step forward key and the state of sound generation.

First, FIG. 9(a) shows the step forward key 5TEP.
The case is shown in which the FD is pressed and turned off (stopped being pressed) within a predetermined time T2=0.7 seconds. At this time, if the current address pointer ADR is n, this ADR=n
The performance data indicated by is sounded for a predetermined time T, = 1.3 seconds, and the address pointer ADR is incremented to n+1. After that, step forward key 5T in the same way.
If you press EPFD, 73=IJ
The pronunciation is executed for seconds.

The internal processing procedure for carrying out the operation shown in FIG. 9(a) is as follows. First, when the step forward key 5TEPFD is pressed, the 5TEPFD process in FIG. 7 is called in step S10 of the main routine in FIG. 3, the automatic performance data pointed to by the current address pointer ADH is read out, and sound generation starts (step 5102). Thereafter, the process shown in FIG. 8 is performed by the timer interrupt. Here, immediately after pressing the step forward key, the sequence is step 5111-? Step 5112 → Step 5113 → Step 5114 →
The return is repeated and the pronunciation continues. Still 1 from pressing
If the step forward key is turned off before 2 seconds have elapsed, a predetermined flag is changed in step 311 of the main routine in FIG.
→ Step 5121 → Step 5122 → Step 31
26→Step 5129→Return is repeated to continue sounding. Then, when 13 seconds have elapsed, the sequence is step 5111 - step 5120 - step 5
121 - step 5122 -> step 5123 - step 5124 -> step 5125 -> return and mute the address pointer ADH at step 3125
progress has been made. Therefore, when the same operation is performed, the performance data pointed to by ADR=n+1 is sounded and muted in the same way.

Next, the case of FIG. 9(b), that is, the case where the step forward key 5TEPFD is pressed again within 13 seconds after being pressed will be described.

In this case, the step forward key is first pressed and the performance data pointed to by the current address pointer ADRxn is sounded, and until the step forward key is turned off and the sound continues, it is the same as in the case of FIG. 9(a) above. The same is true. However, the step forward key is pressed again before 13 seconds have elapsed since the step forward key was pressed for the first time. At this time, the 5TEPFD process shown in FIG. 7 is executed. Further, the timer-interrupted sequence is step 5111→step 5112→step 5113→step 5114→return, and the sound generation continues. Furthermore, if the step forward key is pressed again within 13 seconds after the second press of the step forward key, the sound generation continues in the same manner.

By repeating this, the same address pointer ADR
The sound of the performance data indicated by =n continues to be produced.

Next, the case of FIG. 9(c), that is, the case where the step forward key 5TEPFD is continuously pressed for 13 seconds or more will be explained.

In this case, the process is the same as that shown in FIG. 9(a) above until the step forward key is first pressed and the performance data pointed to by the current address pointer ADR=n is sounded. However, when 12 seconds have elapsed after the step forward key was first pressed, the timer-interrupted routine continues as follows: step 5111 → step 5112 → step S115 → step 3116 → step 5117 →
Step 5118→Step 5114→Return is processed, and the performance data indicated by ADR=n+1 is sounded.

After that, step 5111 → step 5112 → step 3113 → step 5119 → step 5114 →
It becomes a return, and the sound continues, and then T-72 becomes T.
, step 5111 → step 5
112→Step 5113→Step 5119→Step 5116-Step 5117→Step 5118→Step 5114→Return, and the performance data indicated by ADR=n+2 is generated. Thereafter, in the same way, if the step forward key is continuously pressed (that is, without being pressed), the addresses are stepped at intervals of T=0.25 seconds and are sounded one after another. When the step forward key is turned off, step 5111 → step 512
0 → Step 5121 → Step 5122 → Step 5
126→Step 5129→Step 5130→Step 5114→Return After continuing the pronunciation, step 5
111→Step 5120→Step 5121→Step 5122→Step $126→Step 5129→Step 5130-Step S13! -Mute the sound with return.

If the step forward key is turned off and pressed again during T1 (when ADR=n+5 in FIG. 9(C)), the step forward key remains at ADR=n+5 and the sound is produced for 13 seconds.

According to this embodiment, the current address pointer ADH
If you want to hear the sound indicated by , press the step forward key once lightly as shown in Figure 9 (a) to set T3 = 1.3.
You can make the sound sound for seconds, so if you want to hear it for a longer time,
As shown in FIG. 9(b), by pressing the button again within 73=1.3 seconds, the same performance data sound can be continuously heard. This is especially true if the data is code data, etc.
This is effective when you want to observe which sounds are pronounced overlappingly.

Furthermore, if you want to fast-forward, if you continue inserting for 12 seconds, which is shorter than T3, the repeat mode will be set and the performance data will be fast-forwarded, so you can quickly start the fast-forwarding operation.

Note that in this embodiment, after sound generation, the address pointer AD
Although R is assumed to be incremented, the address pointer ADR may be incremented as shown in FIG. 9(C) when the press is repeatedly pressed.

Furthermore, it goes without saying that data for one beat may be read out and the address for one beat may be incremented by one turn-on operation of the step forward SW.

[Effects of the Invention] As explained above, according to the present invention, an automatic performance device has a function of making the performance data pointed to by the address pointer sound for a predetermined time T55 seconds, a function of continuing the sound of the same data sound, and a function of making the sound of the same data sound continuously. The automatic performance data can be quickly edited with simple operations.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the external view and internal configuration of the keyboard section, etc. of an automatic performance device according to an embodiment of the present invention, FIG. 2 is a format diagram of each data, and FIG. 4 is a flowchart for explaining the operation of the performance data recording switch pressing process, and FIG. 5 is a main routine flowchart for explaining the main operation of the device. FIG. FIG. 6 is a flowchart for explaining the processing of rhythm interwoven and automatic performance routines; FIG. 7 is a flowchart for explaining the processing when the step forward key is pressed. FIG. 8 is a flowchart for explaining the operation of timer interconnected, and FIG. 9 is a conceptual diagram showing the timing of pressing the step forward key and the state of sound generation. 1: Keyboard panel section, 2: LED for near address display, 3: LED for tempo display. 4: R-EC switch, 5 step forward (STEPFD) switch, 8: PLY switch, 7: AP stop switch, 8: REWEC switch; Reset (RESET) switch, 10: TE
MPO switch, 11 start/stop switch, 12: auto bass chord (ABC) switch, 20: performance keyboard, 21: 11 switch circuit, 22: operator switch circuit, 23: display control circuit, 31; timer oscillator (O20) , 32: Tempo OSC. 40: Data storage circuit, 41: Rhythm pattern data memory (ROM), 42: Automatic performance data memory (RAM), 43: Event buffer register (RAM), 44: Key buffer register (RAM), 45: Automatic accompaniment key Data table 45.50: Microcomputer, 51 Niprogram memory (ROM), 52: CPU. 53: Working memory, 61: Rhythm sound generation circuit, 62: Musical sound signal generation circuit for 11th board, 63: Musical sound signal generation circuit for automatic performance, 64: Amplifier, 70: Bus.

Claims (5)

[Claims] (1) In an automatic performance device that performs automatic performance by sequentially reading out performance data stored in a performance data memory sequentially, a step forward key and means for detecting its depression; and performance data to be produced in the performance data memory. An automatic performance device comprising: an address pointer pointing to the step forward key; and means for generating a performance data sound pointed to by the address pointer for a predetermined time T_3 when the step forward key is detected to be pressed. (2) The automatic performance device according to claim 1, wherein the address pointer is advanced to the address of the performance data to be generated next after the performance data sound is generated. (3) If the step forward key is pressed again within the predetermined time T_3 after the step forward key is pressed, the same performance data will be played again for the predetermined time T_3 from the time when the step forward key is pressed again. 3. The automatic performance device according to claim 1, further comprising means for continuing to produce sound. (4) In an automatic performance device that performs automatic performance by sequentially reading out performance data stored in a performance data memory sequentially, a step forward key and means for detecting its depression; and performance data to be produced in the performance data memory. an address pointer pointing to the step forward key; means for generating a performance data sound pointed to by the address pointer when the step forward key is detected to be pressed; an automatic performance apparatus characterized by comprising means for advancing an address pointer at intervals of a predetermined time T_1 and sequentially producing performance data tones pointed to by the address pointer. (5) If the step forward key is pressed again within the predetermined time interval T_1, a retriggerable means is provided to continue producing the same performance data sound for the predetermined time T_3 from the time when the step forward key is pressed again. The automatic performance device according to claim 4, comprising: an automatic performance device according to claim 4;