JPH02176791A - Automatic player - Google Patents

Abstract

PURPOSE:To make necessary corrections through easy operation by resetting a storage-enabled state by operating an operation element, stepping back an address by a specific number and starting playback performance, and performing switching from the playback performance state to the storage-enabled state again. CONSTITUTION:A CPU 1 receives performance information on a keyboard 4 by turning on a real-time storage switch 5-1 and stores it in a storage means RAM 6 in real time and when a storage correction switch 5-2 is turned on during the real-time storing operation, the storag-enabled state is reset, the address is stepped back by a specific section, and performance is started automatically at the stepped-back address. The state is switched to the storage- enabled state automatically when the reproduction of the section is finished. Then, when performance for correction is performed for the keys of a keyboard 4, its correction performance information is re-stored in a RAM 6 newly. Consequently, the storage contents of the performance information by the real-time storage are easily corrected through easy operation and stored again in real time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to an automatic performance device that corrects and stores performance information stored in real time again in real time.

[Prior art and its problems] In a conventional automatic performance device, when performance information stored in a predetermined storage area in so-called real time is to be stored in real time by performing the performance again for correction, the back playback switch is turned on. Continuing to operate the performance information stored in the above storage area is played back in reverse, confirming the stored content with your ears, and turning off the back playback switch after passing the point that needs to be corrected. Normal playback (forward playback) The state changes to Then, while listening to the performance content using forward playback, turn on the pause switch before the point to be corrected, and then turn off the stop switch at that point to cancel the pause, making it possible to memorize again in real time. A system is being considered in which the performance is stored in memory and corrections are performed in real time.

However, such conventional automatic performance devices have a problem in that many switch operations must be repeated before real-time storage for correction, making the operations extremely complicated. Furthermore, since the tempo of the performance before correction is interrupted by a pause, it is difficult to grasp the same tempo when restarting the performance for correction, and it is difficult to smoothly connect the performance for correction. There is a problem.

In addition, in other conventional automatic performance devices, when similarly performing correction memory in real time, if the back playback switch is continuously turned on and the back playback switch is turned off at the appropriate point while checking the memorized content, normally In some cases, if the player enters the forward playback state and resumes the performance for correction without stopping, the playback automatically switches to the storage state, and the corrected performance is stored in real time.

However, in such other conventional automatic performance devices,
For example, pressing a key on the keyboard (playing operation) also serves as an instruction to switch to the memorized state, that is, to start memorizing, so it is not possible to perform a trial performance before correcting memorization. The problem is that it is difficult to connect the performances smoothly.

[Purpose of the Invention] This invention has been made to solve the above-mentioned problems, and it is possible to easily modify and re-memorize the performance information stored in real time with a simple operation. The purpose is to obtain an automatic performance device.

[Summary of the Invention J In order to achieve the above-mentioned object, the present invention is an automatic performance device that corrects and stores the performance information stored in real time again in real time. While it is being memorized, you can temporarily release the memorization state by operating the controller, and
The main point is that the address is returned by a predetermined number of addresses, the playback performance is automatically started from the returned address, and then the playback performance state is switched again to the memorizable state.

Further, the main point of the present invention is that the playback performance section is set based on a predetermined number of bars.

Further, the main point of the present invention is that the reproduction performance section is set based on a predetermined number of notes.

Furthermore, the main point of the present invention is that the reproduction performance section can be changed and set depending on the number of times the operator is operated.

[Examples] Examples of the present invention will be described below with reference to the drawings.

FIRST EMBODIMENT> FIG. 1 is an overall circuit configuration diagram of an automatic performance device according to a first embodiment of the present invention. and control this entire circuit according to its program. With the real-time memory switch 5-1 provided in the switch unit 5 turned on, the CPU receives performance information based on key presses on the keys of the keyboard 4, and stores the performance information in R, which is a storage means.
Memory is stored in AM6 for real-time storage.

When modifying the content of the performance information stored in real time, use the memory modification switch 5- provided in the switch section 5.
Turn on 2 during real-time storage. As a result, the memorizable state is released (stopped), the address returns to a predetermined section, for example, the beginning of the previous bar by one bar, and playback immediately starts automatically from the returned address. Then, when the playback of that one measure is finished, the state is automatically switched to a memorizable state, and when a key is pressed on the t11 board 4 to perform a correction performance, the correction performance information is stored in the RAM 6. The measure to be corrected is newly memorized starting from the measure to be corrected for which the memory correction switch 5-2 was first turned on.

Furthermore, the display section 7 displays various switches 5 in the switch section 5.
-1 to 5-3, and is made of, for example, an LED (light emitting diode).

In addition, when performing a playback based on the stored performance information, when the playback start/stop switch 5-3 provided in the switch section 5 is turned on, the CPU transfers the stored performance information from the RAM 6 via the pass line 3. reading,
A sound generation instruction based on the performance information is issued to the sound IIA section 8, and the musical tone signal output from the sound source section 8 is converted into an analog signal by the D/A converter 9, and then passed through the amplifier IO and the speaker 11 as a musical tone. A sound is emitted. It should be noted that even in the reproduction of one measure during the above-mentioned memory correction, the CPU functions in the same manner as in normal reproduction performance, and gives the same sound generation instruction to the sound source section 8.

Next, regarding the operation of this embodiment, the CPU shown in FIG.
The explanation will be based on the real-time storage correction switching process flowchart in . The flowchart shown in FIG. 2 starts repeatedly at a predetermined period with respect to the main flow, but after the start, the real-time memory switch 5 of the switch unit 5 is turned on to check whether the real-time memory mode is set or not. Check (Step S1
). If it is determined to be YES, the process proceeds to step S2, and it is checked whether or not a measure counter provided in the CPUI for counting the progress within a measure has issued a carry. If YES is determined in step S2, it is necessary to move from the current measure to the next measure, so the measure number is incremented by 1 (step S3), and a sound for counting the length of notes built into the CPUI is added. The count data of the long counter is incremented by 1 (step S4). Also, if it is determined No in step S2,
Since it is not yet time to advance the measure to the next measure, the measure counter is incremented by 1 (step S5) and the process proceeds to step S4 described above.

Next, check whether there is an on/off change in the key depression operation for the keys on the keyboard 4 (step S6). If YES is determined, new performance information has been input for real-time storage, so the The key press data and the count data of the tone length counter are taken in (step S7). Then, the address counter in the CPU 1 is incremented by 1, and the address for specifying the storage area in the RAM 6 is incremented by 1 (step S8), and the note length counter is reset in preparation for importing the next performance information ( Step S9).

Next, check whether the count data of the measure counter indicating the progress point within the measure is equal to the first data of the measure (step 510), but normally it is not the beginning, so NO
When it is determined that the memory correction switch 5-2 has been turned on, it is then checked (step 5ll).

If the memory is to be corrected during real-time storage, the memory correction switch 5-2 is turned on. Then, it is determined YES in step 311, and the current bar number data is decremented by 1, and the address of the beginning of the bar moved back by one bar is set in the RAM 6 (step 512).

When making corrections in this way, press the memory correction switch 5-2.
The address is moved back by one measure from the measure where the button was turned on. Then, the memory correction switch-on flag is set to make it clear that the memory is currently being corrected (step 313), and the memory mode is once cleared (step 514). After that, the playback mode is set to play back the one-measure performance that was returned earlier and prepare to start the correction performance (step 515).
After the playback performance is started (step 316), the process returns to the main flow. During this one-measure playback performance, it is a preparation period for correction performance. During this period, all you need to do is grasp the tempo of the performance and prepare for the correction performance from the next measure. You can play or just listen to the replay.

Then, in the next scanning, proceed to step Sl, and this time, since the playback mode is set, it is determined NO, and then check whether the time data number of the time counter built in the CPUI is equal to the count data of the note length counter mentioned above. It is checked whether or not (step 520). If it is determined No in step S20, it is necessary to continue playing the remaining note lengths because the notes have not yet been played back for the length corresponding to the note length counter data to be played. The determination process in step S20 is repeated until the determination is YES.

If YES is determined in step S20, it means that the reproduction of musical tones for the required note length has been completed, and it is necessary to reproduce the next stored data (data corresponding to the next note). The value of is incremented by 1 and the address for reading in the RAM 6 is incremented (step 521), and the musical tones are generated and muted based on the stored performance information (step 522).
), proceed to step 310 described above. and step S
Stellarab S20, S21.
The process of S22 is repeated to continue the playback performance.

If it is determined YES in step 310, then 1
It is the beginning of the next measure after the playback performance for the measure has finished, and the memory correction switch-on flag has already been set in step 313, so Y is selected in step S17.
ES, the current playback mode is immediately switched to the storage mode (step 518), the memory correction switch flag is reset to prepare for the next correction storage (step 519), and the performance information for correction is After switching to the memorizable state, the process proceeds to step S11 described above, and if No.
After that, processing for real-time storage is performed.

The modification storage processing operation of the first embodiment will be further explained with reference to FIG. 3. During real-time memorization, if memorization progresses from the 1st measure to the 6th measure, and you stop playing while memorizing the 6th measure (measure number 6) and you need to make corrections, immediately press the memory correction switch 5-. Turn on 2.

Then, the address for reading out the RAM 6 returns to the beginning of the previous measure (measure number 5), and playback performance is automatically started from the beginning of this fifth measure (measure number 5). This one
When the playback of the previously stored performance information in the musical tone section of a measure is finished, the device is automatically switched back to the storage mode (memory enabled state) for real-time storage from the beginning of the next 6th measure (measure number 6). Therefore, perform the performance for correction from the beginning of the 6th measure to the point where the memory correction switch 5-2 was turned on, and then turn on the memory correction switch 5-2.
The performance will continue from the point where you turned it on, and real-time memory will continue.

Returning again to the flowchart shown in FIG. 2, step 31
If it is determined No in step 1, there is no need to modify the memory currently being performed in real time, so the process returns to the main flow.

Moreover, if it is determined NO in step 317, the memory correction switch 5-2 is still not used in the previous scanning.
Since this is the case where the on operation has not been performed, the process proceeds to step Sll described above.

Immediately after the start of the flow, N
If it is determined as O, it means that the real-time memory switch 5-1 has not been turned on and the real-time memory mode has not been set, so steps S20 and S2 described above are executed.
1. In S22, the reproduction of the previously stored performance information is continued until the storage mode is set.

In this manner, according to the first embodiment, if it becomes necessary to modify the memory during real-time storage of performance information, the memory modification switch 5-2 is immediately turned on, and the memory mode is canceled and the memory mode is turned on. It returns to the beginning of the measure one measure before the one in which the operation was performed, automatically switches to playback mode from the beginning of the measure it returned to, and plays the playback performance. When the playback performance for one measure is finished, it automatically returns to the start of the measure. Switches to storage mode and enables real-time storage.

Therefore, when the memory correction switch 5-2 is turned on, one measure of playback is performed, and key press operations are possible during this playback performance, making it easy to grasp the tempo and connect the playback and recorded parts. It can be done smoothly.

Second Embodiment Next, a second embodiment of the present invention will be described. The overall circuit configuration of the automatic performance device according to the second embodiment is the same as that of the first embodiment shown in FIG. 1, except for the function of the memory correction switch 5-2 of the switch section 5. I will only talk about.

In the first embodiment, when the memory correction switch 5-2 is turned on during real-time storage, the address for accessing the RAM 6 is returned to the previous one for one measure, and the playback performance for that one measure is automatically started. However, in this second embodiment, when it becomes necessary to correct the memory during real-time memorization and the memory correction switch 5-2 is turned on, the address is moved forward by a section of 4 measures. Returning, the playback performance is also configured to start automatically in the same way.

The operation of the second embodiment of Embodiment 1 will be described based on the flowchart of the real-time storage correction switching process in the CPUI shown in FIG. Since the flowchart shown in FIG. 4 is a continuation of the real-time storage correction flowchart in the first embodiment shown in FIG. 2, a description of the processing from the start of the flow will be omitted.

In Fig. 4, first check whether the current position is at the beginning of a measure (step T1), and normally it is determined as NO since it is not at the beginning of a measure. Instead, memory correction switch 5-
2 is turned on (step T2). If it is determined No in step T2, it is not the time to correct the memory, and the process returns to the main flow. However, if it becomes necessary to correct the memory during real-time storage, the memory correction switch 5-2 is immediately turned on. Therefore, YES in this step T2
I judge that. Then, the data of the current measure number is decremented by 4, and the address corresponding to the beginning of the measure moved back by this 4-measure section is set in the RAM 6 as the start address for reading data (step T3).
.

Subsequently, the bar counter is set to 5 in preparation for the next memory correction (step T4), and the memory correction switch-on flag is set to clarify that the memory correction is currently being performed (step T5). After clearing the memory mode once (step T6), set the playback mode to perform the playback of the previous four measures (step T7), and start playback of the four measures (step T8). ), return to the main flow.

When this flow is entered again in the next scanning, if YES is determined in step T1 mentioned above, the memory modification switch-on flag is currently 1, and since it is the first part of a measure, the count data of the measure counter is is decremented by 1 (step T9, Tl0
), it is checked whether the count data of the bar counter becomes 0) or not (step Ti1). If it is determined NO here, the playback performance for the four measures that started earlier in step T8 has not yet been completed, and the time at which corrective memorization should start has not yet been reached, and the process directly proceeds to step T2 described above. After that, the playback performance for those four measures continues. And if it is determined YES in step TlO,
This means that the playback performance of four measures that started earlier in step T8 has been completed. Since it is necessary to immediately perform correction storage, the storage mode is switched from the current playback mode (step T12), the memory correction switch-on flag is reset to prepare for the next memory correction (step Tl3), and then the correction is performed. The state is switched to a state in which performance information for the first time can be stored, and the process proceeds to step T2 described above, where the same processing is repeated.

In this way, the second embodiment can be considered as a modification of the first embodiment, and when the need for correction arises during real-time storage, if the correction storage switch 5-2 is immediately turned on, the
The address designation of the RAM 6 is returned to the beginning of the previous bar, and playback performance is automatically started from the beginning of the bar four bars before. Then, when the playback performance for four measures is completed, it automatically enters the memorizable state. Since this four-measure reproduction performance becomes a preparation period for the corrected performance, it is possible to grasp the tempo, prepare for the performance, and then correct the memory with sufficient time.

Third Embodiment Next, a third embodiment of the present invention will be described. The overall circuit configuration of the automatic performance device according to the third embodiment is the same as that of the first embodiment shown in FIG. Since only the function of the memory correction switch 5-2 of the switch section 5 is different, only that point will be described.

In the first and second embodiments, when the memory correction switch 5-2 is turned on during real-time storage, the address corresponding to the bar unit is returned and the predetermined small portion is automatically played back. , in this third embodiment, when the memory correction switch 5-2 is turned on in the same way,
The address moves back by a predetermined number of notes (in this embodiment, 10), and playback starts automatically in the same way, and then the address moves back by a predetermined number of notes (in this embodiment, 5). The CPU is configured to switch to a memorizable state when the number of notes played is played back, and the CPU has a built-in note counter that counts the number of notes.

The operation of this third embodiment will be described based on the flowchart of real-time storage correction switching processing in the CPUI shown in FIG. The flowchart shown in FIG. 5 is a continuation of the flowchart shown in FIG. 2 for the first embodiment, so a description of the processing from the start of the flow will be omitted.

In FIG. 5, it is determined whether the memory correction switch-on flag is 1 (step Ul). If the memory mode is currently selected, then it is checked whether the memory correction switch 5-2 is turned on (step U2). If NO is determined in this step U2, it is not the time to correct the memory, and the process returns to the main flow. However, if it becomes necessary to correct the memory during real-time storage, the memory correction switch 5-2 is turned on. Therefore, YES is determined in this step U2. Then, the current address counter value is decremented by 10 to move the address forward by 10 notes, and the decremented address value is set in the RAM 6 as the start address for data reading (step U3).

Subsequently, the value of the note counter is set to 11 in preparation for the next memory correction (step U4), and the memory correction switch-on flag is set to indicate that the memory correction is currently being performed (step U5). Then, after clearing the memory mode and canceling the memory mode (step U6), switch to the playback mode (step U7), read out the performance information from the address in RAM6 that was returned according to the number of 10 notes, and play it back. Start the performance (step U8) and return to the main throw.

When entering this flow again in the next scanning, first, after determining YES in step Ul mentioned above,
In step U9, the note counter data is decremented by 1, and in step 2 UIO, it is determined whether the note counter data is equal to 5 or not. If it is determined NO in step U10, it means that the playback performance that started earlier in step U8 has not yet finished playing back the five notes, and it is not yet the point at which corrective memorization should start, so the process described above is continued. The program advances to step U2 and continues playing. However, when the performance for five notes is completed, YES is determined in step U10. Then, it is necessary to immediately perform corrective memorization, so
After switching the mode from the current playback mode to the memory mode (step Ull) and resetting the memory correction switch-on flag to prepare for the next memory correction (step U12)
), the state is switched to a state in which real-time storage of performance information for correction is possible, and the process proceeds to step U2 described above, after which processing for real-time storage is performed.

In this way, in the third embodiment, when the correction storage switch 5-2 is turned on during real-time storage, the address of the RAM 6 is returned by the number of 10 notes, that is, the number of 10 notes as the playback performance section. The playback performance is automatically started from the returned address, and when the playback performance for five notes is completed, the mode is automatically switched to the storage mode. Since the period during which these five notes are being reproduced becomes the preparation period for the correction performance, the preparation period can be set in detail.

Other Embodiments> The position to which the address of the RAM 6 is returned may be set depending on the number of times the memory correction switch 5-2 shown in FIG.
It is also possible to set the address to the beginning of the previous measure when the ON operation is performed once, and to the beginning of the previous measure when the ON operation is performed one more time. Furthermore, the playback performance section may be freely settable.

In each of the above embodiments, performance information is input by pressing keys on the keyboard 4, but the means for inputting performance information is not limited to this, and a fret switch or pitch can be used as a pitch specifying means. It can also be applied to other types of electronic musical instruments, such as electronic stringed instruments equipped with an extraction section and tensioned strings for picking operations, and electronic wind instruments equipped with breath sensors that detect blowing input for multiple pitch specification keys. It is possible. Furthermore, various performance input means and sound source section 8 which can input performance information in real time may be provided externally and connected to the main body of the apparatus by communication means according to the MIDI standard.

[Effects of the Invention] As described above, according to the invention as set forth in claim 1, when performance information is stored in the storage means in real time, when the memorizable state is canceled by operating the operator, the storage means returns a predetermined number of addresses currently being accessed,
The reproducing means is controlled to automatically start reproducing performance from this returned address, and the reproducing performance state is switched again to the memorizable state. Therefore, key presses can be performed during playback of a predetermined section, making it easy to grasp the tempo for correction performance, and correction performance can be smoothly connected, allowing you to easily correct parts that do not need to be corrected. To obtain an automatic performance device in which necessary corrections can be made by performing simple operations without damaging memory.

Further, according to the invention as claimed in claim 2, since the playback performance section can be set based on the predetermined number of bars, the address is returned in units of predetermined bars from the point where correction is required.
In order to listen to the replay performance of the predetermined number of measures, an automatic performance device is obtained that allows the user to easily grasp the replay performance section.

Further, according to the third aspect of the invention, since the playback performance section can be set based on the predetermined number of notes, an automatic performance device that can set more detailed sections can be obtained.

Furthermore, according to the invention set forth in claim 4, the playback performance section can be changed and set according to the number of times the operator is operated, so that the player can perform the performance according to his/her performance skill or for correction. Since the length of the reproducing performance section can be arbitrarily set according to the difficulty level of the performance, an automatic performance device can be obtained in which the memory can be modified even more easily.

Itch, RAM.

2...Memory correction switch, 6... Casio Computer Co., Ltd.

[Brief explanation of the drawing]

FIG. 1 is an overall circuit configuration diagram of an automatic performance device according to a first embodiment of the present invention, FIG. 2 is a flowchart showing the operation of the CPUI memory correction switching process in FIG. 1, and FIG. 3 is a similar diagram. An explanatory diagram for explaining the operation of the memory correction switching process, FIG. 4 is a flowchart showing the operation of the memory correction switching process of the CPU in the automatic performance apparatus according to the second embodiment of the present invention, and FIG. FIG. 9 is a flowchart showing the operation of memory correction switching processing of the CPU in the automatic performance device according to the third embodiment of the present invention.

Claims (4)

[Claims] (1) In an automatic performance device having a storage means capable of storing performance information in real time, and a reproduction means for reproducing performance based on the performance information stored in the storage means, an operator; a release means for canceling a state in which the performance information can be stored in the storage means when the operator is operated while the performance information is stored in the storage means in real time; and a release means that releases the state in which the performance information can be stored in the storage means by the release means When this is released, the address currently being accessed in the storage means is returned by a predetermined number, playback performance is started from this returned address, and after a predetermined section playback performance is performed,
An automatic performance device comprising: control means for switching from the playback performance state to the memorizable state again. (2) The automatic performance device according to claim 1, wherein the playback performance section from the start of the playback performance to the end of the playback performance is based on a predetermined number of bars. (3) The automatic performance device according to claim 1, wherein the reproduction performance section from the start of the reproduction performance to the end of the reproduction performance is based on a predetermined number of notes. (4) The control means is capable of changing and setting the playback performance section from the start of the playback performance until the end of the playback performance in accordance with the number of times the controller is operated. 1. The automatic performance device according to 1.