JPH02175154A - Semiconductor wafer marking device - Google Patents
Semiconductor wafer marking deviceInfo
- Publication number
- JPH02175154A JPH02175154A JP33011788A JP33011788A JPH02175154A JP H02175154 A JPH02175154 A JP H02175154A JP 33011788 A JP33011788 A JP 33011788A JP 33011788 A JP33011788 A JP 33011788A JP H02175154 A JPH02175154 A JP H02175154A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- marking
- wafer
- side wall
- pulse motor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 50
- 239000000463 material Substances 0.000 abstract description 4
- 230000002950 deficient Effects 0.000 abstract description 3
- 235000012431 wafers Nutrition 0.000 description 36
- 238000010586 diagram Methods 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 5
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野〕
本発明は半導体装＠製造において個々の半導体ウェハー
の処理条件、Ｂ歴等の管理のために半導体ウェハーに管
理コード等を記入する半導体ウェハーのマーキング装置
の改良に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention is directed to semiconductor wafers in which management codes, etc. are written on semiconductor wafers in order to manage processing conditions, B history, etc. of individual semiconductor wafers in semiconductor device manufacturing. This invention relates to improvements in marking devices.
従来、この種のマーキング装置は第３図に示すように、
Ｘ−Ｙステージ１４に真空チャック２を介して真空吸着
された半導体ウェハー１の表面ないし裏面に対して集束
させたレーザビーム８を当てスポット加熱により半導体
ウェハー１を部分的に蒸発させる動作を、Ｘ−Ｙステー
ジ１４及びシャッタ６を制御機構４により連動させるこ
とにより、マーキングを行っていた。７はＹＡＧ レー
ザー、９はレンズ、１０は排気ダクト、１３はミラーで
ある。Conventionally, this type of marking device, as shown in Fig. 3,
The operation of partially evaporating the semiconductor wafer 1 by applying a focused laser beam 8 to the front or back surface of the semiconductor wafer 1 vacuum-chucked to the X-Y stage 14 via the vacuum chuck 2 by spot heating is referred to as X. - Marking was performed by interlocking the Y stage 14 and the shutter 6 with the control mechanism 4. 7 is a YAG laser, 9 is a lens, 10 is an exhaust duct, and 13 is a mirror.
上述した従来の半導体ウェハーマーキング装置はスポッ
ト加熱により半導体ウェハーを蒸発させるため、半導体
ウェハーに凹凸が生じ、また蒸発した半導体ウェハー材
料の一部が半導体ウェハーへパーティクルとなって再付
着する現象があり、この凹凸及びパーティクルにより発
生する基板のうねり及びホトレジスト等の塗布膜厚の変
化は半導体ウェハー表面へ微細なパターンを形成するた
めの障害となる問題があった。The conventional semiconductor wafer marking device described above evaporates the semiconductor wafer by spot heating, which causes unevenness on the semiconductor wafer, and also causes some of the evaporated semiconductor wafer material to re-adhere to the semiconductor wafer in the form of particles. Waving of the substrate and changes in the thickness of a coated film of photoresist or the like caused by these irregularities and particles pose a problem in that they become obstacles to forming fine patterns on the surface of a semiconductor wafer.
また、半導体ウェハー表面にマーキングを行った場合、
マーキング領域の半導体素子は不良となる問題がある。In addition, when marking is performed on the surface of a semiconductor wafer,
There is a problem that semiconductor elements in the marking area become defective.
本発明の目的は前記課題を解決した半導体ウェハーマー
キング装置を提供することにある。An object of the present invention is to provide a semiconductor wafer marking device that solves the above problems.
上述した従来の半導体ウェハーマーキング装置に対して
、本発明は半導体ウェハー側壁に対してマーキングを行
うという相違点を有する。The present invention differs from the conventional semiconductor wafer marking apparatus described above in that it marks the sidewall of the semiconductor wafer.
前記目的を達成するため、本発明は半導体ウェハーにマ
ーキングするマーキング機構を備えた半導体ウェハーマ
ーキング装置において、半導体ウェハーを固定する固定
機構と、該固定機構を回転駆動するパルスモータとを有
し、さらに前記マーキング機構を、半導体ウェハーの側
壁にマーキングする位置に配設したものである。In order to achieve the above object, the present invention provides a semiconductor wafer marking device equipped with a marking mechanism for marking semiconductor wafers, which includes a fixing mechanism for fixing the semiconductor wafer, and a pulse motor for rotationally driving the fixing mechanism, and further comprises: The marking mechanism is arranged at a position for marking a side wall of a semiconductor wafer.
以下、本発明の実施例を図により説明する。 Embodiments of the present invention will be described below with reference to the drawings.
（実施例１） 第１図は本発明の実施例１を示す構成図である。(Example 1) FIG. 1 is a configuration diagram showing a first embodiment of the present invention.
図において、本発明の半導体ウェハーマーキング装置は
半導体ウェハー１を固定する真空チャック２と、真空チ
ャック２を回転駆動するパルスモータ５と、半導体ウェ
ハー１の側壁にレーザービーム８にてマーキングするＹ
ＡＧ レーザー７と、制御機構４と、シャッタ６と、レ
ンズ９と、＃１′気ダクトｌＯと、 ＯＦ検出機構３と
を有する。In the figure, the semiconductor wafer marking apparatus of the present invention includes a vacuum chuck 2 that fixes a semiconductor wafer 1, a pulse motor 5 that rotationally drives the vacuum chuck 2, and a Y marking device that marks the side wall of the semiconductor wafer 1 with a laser beam 8.
It has an AG laser 7, a control mechanism 4, a shutter 6, a lens 9, a #1' air duct 1O, and an OF detection mechanism 3.
半導体ウェハー１を真空チャック２に中心軸を合せて真
空吸着した後、ＯＦ （オリエンテーションフラット）
検出機構３により半導体ウェハー１のＯＦ位置を検出し
、検出されたＯＦ位置を原点として制御機構４により真
空チャック２に直結されたパルスモータ５を１パルス単
位で０．７２’回転させ。After aligning the central axis of the semiconductor wafer 1 with the vacuum chuck 2 and vacuum suctioning it, OF (orientation flat)
The detection mechanism 3 detects the OF position of the semiconductor wafer 1, and the control mechanism 4 rotates the pulse motor 5 directly connected to the vacuum chuck 2 by 0.72' in units of one pulse, using the detected OF position as the origin.
パルスモータ５の回転停止と連動して、シャッタ６を開
くことによりＹＡＧレーザ−７より発するレーザービー
ム８をレンズ９にて半導体ウェハー１の側壁１ａに集束
させることにより半導体ウェハー１の側壁１ａをスポッ
ト加熱し、半導体ウェハー材料の一部を蒸発させること
により、マーキングを行い、又はシャッタ６を閉じたま
まとすることによりマーキングを行わない動作を半導体
ウェハー１に割り当てられた２進数コードに対応して実
施する。In conjunction with the stoppage of rotation of the pulse motor 5, the shutter 6 is opened, and the laser beam 8 emitted from the YAG laser 7 is focused onto the side wall 1a of the semiconductor wafer 1 by the lens 9, thereby spotting the side wall 1a of the semiconductor wafer 1. The operation of marking by heating and evaporating part of the semiconductor wafer material or non-marking by keeping the shutter 6 closed corresponds to the binary code assigned to the semiconductor wafer 1. implement.
（実施例２） 第２図は本発明の実施例２を示す構成図である。(Example 2) FIG. 2 is a configuration diagram showing a second embodiment of the present invention.
本実施例は半導体ウェハー１の側壁１ａへのマーキング
をホトレジストを含ませたフェルトペン送り機構１２に
より駆動して行うものであり、実施例１に対して適用す
る時期がウェハー１を側壁を含めてエツチングする工程
の直前に限定される欠点を有する反面、半導体ウェハー
１の受けるダメージが少ないという利点を有する。In this embodiment, marking is performed on the side wall 1a of the semiconductor wafer 1 by driving the felt-tip pen feeding mechanism 12 containing photoresist, and the period of application to Embodiment 1 is when the wafer 1 is marked on the side wall 1a including the side wall. Although it has the disadvantage that it is limited to just before the etching process, it has the advantage that the semiconductor wafer 1 suffers less damage.
以上説明したように本発明は半４体ウェハーの側壁にマ
ーキングを行うことにより、スポット加熱により蒸発し
た半導体材料の半導体ウェハー表面あるいは裏面への再
付着を防止し、またスポット加熱の際に生ずる凹凸も側
壁にあるために特に問題とならず、半導体ウェハー表面
の半導体素子を不良にすることなく、半導体ウェハーに
マーキングを行うことができる効果を有する。As explained above, the present invention prevents the semiconductor material evaporated by spot heating from re-adhering to the front or back surface of the semiconductor wafer by marking the side walls of the semi-quadramid wafer, and also prevents the unevenness that occurs during spot heating. Since it is located on the side wall, it does not pose a particular problem, and has the effect that the semiconductor wafer can be marked without making the semiconductor elements on the surface of the semiconductor wafer defective.
第１図は本発明の実施例１を示す構成図、第２図は本発
明の実施例２を示す構成図、第３図は従来の半導体ウェ
ハーマーキング装置を示す構成図である。FIG. 1 is a block diagram showing a first embodiment of the present invention, FIG. 2 is a block diagram showing a second embodiment of the present invention, and FIG. 3 is a block diagram showing a conventional semiconductor wafer marking apparatus.
Claims (1)
を備えた半導体ウェハーマーキング装置において、半導
体ウェハーを固定する固定機構と、該固定機構を回転駆
動するパルスモータとを有し、さらに前記マーキング機
構を、半導体ウェハーの側壁にマーキングする位置に配
設したことを特徴とする半導体ウェハーマーキング装置
。(1) A semiconductor wafer marking device equipped with a marking mechanism for marking a semiconductor wafer, which has a fixing mechanism for fixing a semiconductor wafer and a pulse motor for rotationally driving the fixing mechanism, and further includes a marking mechanism for marking a semiconductor wafer. A semiconductor wafer marking device characterized in that it is arranged at a position for marking on a side wall of a semiconductor wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33011788A JPH02175154A (en) | 1988-12-27 | 1988-12-27 | Semiconductor wafer marking device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33011788A JPH02175154A (en) | 1988-12-27 | 1988-12-27 | Semiconductor wafer marking device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02175154A true JPH02175154A (en) | 1990-07-06 |
Family
ID=18228988
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33011788A Pending JPH02175154A (en) | 1988-12-27 | 1988-12-27 | Semiconductor wafer marking device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02175154A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001196280A (en) * | 1999-10-26 | 2001-07-19 | Komatsu Electronic Metals Co Ltd | Method of marking semiconductor wafer |
| US6777820B2 (en) | 1999-01-28 | 2004-08-17 | Komatsu Electronic Metals Co., Ltd. | Semiconductor wafer |
| US6877668B1 (en) | 1999-10-26 | 2005-04-12 | Komatsu Electronic Metals Co., Ltd. | Marking method for semiconductor wafer |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS582018A (en) * | 1981-06-26 | 1983-01-07 | Toshiba Corp | Manufacture of wafer and semiconductor device |
| JPS58197815A (en) * | 1982-05-14 | 1983-11-17 | Nec Corp | Forming device for discriminating symbol of semiconductor wafer |
| JPS5923512A (en) * | 1982-07-30 | 1984-02-07 | Toshiba Corp | Laser marking method for semiconductor wafer |
-
1988
- 1988-12-27 JP JP33011788A patent/JPH02175154A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS582018A (en) * | 1981-06-26 | 1983-01-07 | Toshiba Corp | Manufacture of wafer and semiconductor device |
| JPS58197815A (en) * | 1982-05-14 | 1983-11-17 | Nec Corp | Forming device for discriminating symbol of semiconductor wafer |
| JPS5923512A (en) * | 1982-07-30 | 1984-02-07 | Toshiba Corp | Laser marking method for semiconductor wafer |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6777820B2 (en) | 1999-01-28 | 2004-08-17 | Komatsu Electronic Metals Co., Ltd. | Semiconductor wafer |
| JP2001196280A (en) * | 1999-10-26 | 2001-07-19 | Komatsu Electronic Metals Co Ltd | Method of marking semiconductor wafer |
| US6877668B1 (en) | 1999-10-26 | 2005-04-12 | Komatsu Electronic Metals Co., Ltd. | Marking method for semiconductor wafer |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2004098091A (en) | Laser marking device | |
| JPWO2003023836A1 (en) | Board defect repair equipment | |
| TWI288431B (en) | Method and apparatus for marking in identification mark in a wafer | |
| JPH02175154A (en) | Semiconductor wafer marking device | |
| JPH09260263A (en) | Peripheral exposure device | |
| JP2000164555A (en) | Substrate drying device and method therefor | |
| JPS5811744B2 (en) | Method for manufacturing a photocathode source and apparatus for selectively irradiating accurately positioned areas on the main surface of a substrate | |
| KR20010030429A (en) | Resist applying and developing device, and edge cutting method of lower layer anti-reflection film | |
| JPH053153A (en) | Exposing device for unnecessary resist on wafer | |
| JP2696973B2 (en) | Pattern exposure apparatus and peripheral exposure method | |
| JPH0523875A (en) | Laser marking device | |
| JPH1012696A (en) | Substrate carrying device | |
| JPH02288326A (en) | Apparatus for exposing periphery of wafer to light | |
| JPH07161628A (en) | Peripheral exposure device | |
| JP2601335B2 (en) | Wafer periphery exposure system | |
| JPH06151271A (en) | Aligner | |
| JP2674237B2 (en) | Board cutting method | |
| JP2610481B2 (en) | Exposure apparatus, processing apparatus, and processing method | |
| JPH02114630A (en) | Peripheral exposure unit of wafer | |
| JPH04299332A (en) | Film exposing method | |
| JPH02114629A (en) | Peripheral exposure of wafer | |
| KR100350923B1 (en) | Wafer edge lighting method and apparatus | |
| TW202326302A (en) | Mask treatment apparatus and substrate treatment apparatus | |
| US20020137353A1 (en) | Method and device for delacquering an area on a mask substrate | |
| JPH11265842A (en) | Charged particle beam exposure system |