JPH02172190A - Discharge lamp lightup device - Google Patents

Abstract

PURPOSE:To have sure sensing of the emi-less condition of each discharge lamp and protect circuit elements by furnishing a failure sensor circuit to sense abnormality in the discharge lamp, and providing an output limiting means to restrict output of an inverter with the aid of a plurality of timer circuits. CONSTITUTION:In case a discharge lamp l is in emi-less lighting, an output is given by a failure sensing circuit 5 to actuate No.1 timer circuit 7, and at the same time, an output limiting means 6 restricts the output from an inverter 1. When this timer circuit 7 has come to time-up, the failure sensing circuit 5 resumes operation, and at the same time, No.2 timer circuit 8 starts operating. Now the limiting means 6 is put off, and the lamp l is put in emi-less lighting. Now the sensing circuit 5 senses abnormality again, and the above procedure is repeated. When the sensing circuit 5 generates an output, a No.3 timer circuit 9 is actuated. The timer time of this timer circuit 9 is longer than the sum of timer times of the No.1 and No.2 timer circuits. After time-up of this timer circuit 9, the output limiting means 6 is controlled in the direction of further limiting the lighting of the lamp l.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field 1] The present invention relates to a discharge lamp lighting device for lighting multiple discharge lamps at high frequency using an inverter.

[Prior art 1] In recent years, many discharge lamp lighting devices have adopted the famous type, in which a discharge lamp is lit by an inverter using a semiconductor element, because of its high efficiency, small size, and light weight. vf, recently FL2
For 0x4 lights or FL20x5 lights, or FCL3
Inverter type discharge lamp lighting devices are now being used in ceiling type illuminators incorporating multiple fluorescent discharge lamps such as 0x4 lamps.

FIG. 11 shows an illuminator for three FL20X lamps in which a conventional discharge lamp lighting device for one lamp is incorporated. i in the diagram
, n, and m are discharge lamp lighting devices each for lighting one discharge lamp l at high frequency. This discharge lamp fish light equipment f? tl, IL
III uses a single-stone inverter 1 that operates using a DC power source obtained by rectifying and smoothing an AC power source AC using a diode DB and a smoothing capacitor C1.

The operation of this inverter 1 will be briefly explained. When DC voltage is applied, the discharge lamp L and the current limiting choke coil L
A current flows through Q1, and the voltage induced in the secondary winding of the current transformer CT by this current forward biases the transistor Q, and current begins to flow through the switching cable Q1. When switching element Q is turned on in this way,
Since current flows through the transistor Q through the series circuit of the discharge lamp I and the choke fill L2 and the oscillation choke fill L, the bias state of the transistor Q1 becomes deeper and quickly reaches the saturation state. In this way, when the transistor Q1 is saturated, the voltage induced in the secondary winding of the current transformer CT is reversed, so that the transistor Q is reverse biased and the transistor Q1 is turned off. When the transistor Q is turned off in this way, the choke coil L
, ,L, due to the IF product of energy, capacitor C3
Current flows into the capacitor C,t, ::
The electric charge multiplied by W is discharged into the series circuit of the chiroke coil L2 and the discharge lamp l. Then, when the charge of this capacitor C3 is discharged, a discharge lamp! and chiroku coil L2
A current flows in the series circuit with the transistor Q in the direction of turning on the transistor Q, and thereafter the above-described operation is repeated. Here, a capacitor C2 connected to the non-power supply side of the discharge lamp l is provided for preheating the filament of the discharge lamp l, and constitutes a series resonant circuit with the choke coil L2. Also, the diode attached is a reflux diode.

By the way, when the above-mentioned discharge lamp 1 reaches the end of its life, it enters an emissive state in which the emitter (thermionic emitting material) applied to the filament is scattered, and it enters a state in which preheating starts or a half-wave discharge state, and the transistor Q I 1 chiro - A large abnormal current flows through each of the coils L + * L z, causing abnormal heat generation. Therefore, in this discharge lamp lighting device, abnormal heat generation in the transistor Q, etc. is detected and the oscillation operation of the inverter 1 is stopped f. , a thermal protector PT is provided. This is intended to prevent damage to the transistor Q1 and the like and decrease in reliability.

A discharge lamp lighting device for lighting other multiple discharge lamps is shown in Fig. 12, and this discharge lamp lighting fi! 1 uses a separately excited type push-pull inverter 1', a current-limiting choke coil, and series circuits of . . . and a discharge lamp I+ . . . are connected in parallel.

This inverter 1' has a rectified and smoothed output by the guide block DB of the AC power supply AC and the smoothing capacitor C3,
The transistors Q,,Q, are connected in series, and the control circuit 2 controls the transistors Q,,Q.

is turned on and off alternately to cause a high-frequency current to flow through the discharge lamp l. Here, the capacitor C0 is used to cut off direct current, and also has the function of supplying the charge charged when the transistor Q1 is on as a power source when the transistor Q2 is on. The preheating capacitor C21 connected to both ends of the discharge lamp 11 is connected to the current limiting choke coil L,...
By selecting the oscillation frequency of the inverter 1 to be close to the natural oscillation frequency of the series circuit, the voltage across the capacitors CZ+, -, is increased, and the discharge lamp 1 is activated.

Start the light and then turn it on. Note that this has almost no effect on the capacitor oscillation circuit.

In this discharge lamp lighting device, the current transformer CT2 detects the current flowing in the load circuit of the inverter 1', and the voltage induced in the secondary winding of this current transformer CT is the reference voltage (2). A protection circuit 3 consisting of a comparator CP1 that detects the above condition is provided, and the discharge lamp! , . . . is at the end of its life, an abnormal current flowing through the inverter 1 is detected, and the protection circuit 3 stops the oscillation operation of the inverter 1.

The operation of this protection circuit 3 is shown in FIG.

However, with this protection circuit 3, all discharge lamps...
Since the current is detected at the point where the current flows, the protection circuit 3 has the advantage of being simple and inexpensive; The lights go out, and the performance of the multi-lamp illuminator cannot be fully satisfied, and it is not known which discharge lamp has reached the end of its life. Furthermore, when only one lamp becomes abnormal, the detection level changes by only about 1% compared to when it is normal, so there is a problem that the detection accuracy for abnormality is poor.

Therefore, a method has been proposed in which, for example, the oscillation frequency of the inverter 1' is increased in accordance with the number of discharge lamps 1 in the emissionless state, and the light output is sequentially reduced, thereby reducing the abnormal current.

However, in this case, when both filaments become emisless, a current or temperature abnormality will be detected for the two discharge lamps in which one filament is emisless. If the state is detected and the light output is sequentially reduced, there is a possibility that the illuminator will no longer be able to satisfy the necessary optical characteristics.

[Problems to be Solved by the Invention] The present invention has been made in view of the above-mentioned points, and its purpose is to be able to reliably detect the emissionless state of each discharge lamp, and to improve the reliability of circuits such as inverters. An object of the present invention is to provide a discharge lamp lighting device that can protect elements.

[Means for Solving the Problems] In order to achieve the above object, the present invention includes an abnormality detection circuit that detects abnormality in each discharge lamp, and a timer operation from the time when the abnormality detection output of this abnormality detection circuit occurs. At the same time, a first timer circuit controls the abnormality detection circuit to be inactive during timer operation, and a first timer circuit controls the inverter from the time when the abnormality detection output of the abnormality detection circuit occurs to the time of time-up of the first timer circuit. Output limiting means for limiting output;
a second timer circuit that starts the timer operation with the time-up output of the first timer circuit and controls the output limiting means to be inactive during the timer time; It has a timer time longer than the sum of the timer times, starts timer operation from the time when the abnormality detection output of the abnormality detection circuit occurs, and has a timer time longer than the output limit state of the inverter during the timer time of the first and second timer circuits. and a third timer circuit for controlling the output control means upon time-up to substantially impose more restrictions. It is also possible to provide a total extinguishing means that finally extinguishes all the discharge lamps when the number of the discharge lamps that are emitted without emission reaches a predetermined number or more.

[Function] As described above, the present invention detects an abnormality in each discharge lamp using an abnormality detection circuit, thereby making it possible to reliably detect an abnormality in each discharge lamp. When an abnormality is detected, the first and second timer circuits repeat the state in which the output of the inverter is limited and the state in which it is not limited during the timer time of the third timer circuit, thereby notifying the abnormality in the discharge lamp. Furthermore, when the third timer circuit times up,
By controlling the output control means to be substantially more restrictive than the inverter's output limiting state during the timer time, the inverter's output is brought to a state where no stress is applied to the circuit elements while the discharge lamp is lit. It is designed to be restricted.

[Example 11 FIG. 1 shows a schematic configuration of an embodiment of the present invention.

The discharge lamp lighting device of this embodiment includes a rectifier/smoothing circuit 4 that rectifies or rectifies and smoothes an AC power source 1, an inverter 1 that converts the output of the rectifier/smoothing circuit 4 into a high frequency, and a discharge lamp lighting device.
an abnormality detection circuit 5 that detects an abnormality in the discharge lamp 1; and a timer operation is started when an abnormality detection output of this abnormality detection circuit 5 occurs, and the abnormality detection circuit 5 is activated during the timer operation. a first timer circuit 7 for controlling the inoperable state; and an output limiting means 6 for regulating the output of the inverter 1 from the time when the abnormality detection output of the abnormality detection circuit 5 occurs until the time of the first timer circuit 7 time-up. , a second timer circuit 8 that starts a timer operation upon the time-up output of the first timer 7 and controls the output limiting means 6 to be inactive during the timer time; the first and second timer circuits 7; It has a timer time longer than the sum of the timer times of 8 and 8, and starts the timer operation from the time when the abnormality detection output of the abnormality detection circuit 5 occurs, and the timer operation of the inverter 1 during the first and second timer periods. A third timer circuit 9 is provided for controlling the output control means 6 at time-up so as to impose substantially more restrictions than in the output restriction state. In this discharge lamp lighting device, the inverter 1 is preheated by a preheating control section 10 and a preheating timer circuit 11 in consideration of the lifespan of the discharge lamp l. *In addition, a thermal protector TP43 is provided which detects abnormal heat generation in the elements of the inverter 1 and stops the oscillation operation of the inverter 1 when the EMIRES lighting state progresses.

Hereinafter, the operation of this embodiment will be explained by case.

■ When a normal discharge lamp l is installed When the AC power supply 1 is turned on, the inverter 1 is operated by the output of the rectifier/smoothing circuit 4, and after preheating, the discharge lamp l is lit. In this case, since the lighting state of the discharge lamp l is normal, the abnormality detection circuit 5 does not output an abnormality detection output, and therefore the first and third timer circuits 7 and 9 and the output limiting means 6 operate. Hana 1,%.

■ When the discharge lamp 1 reaches the end of its life and emits less light, in this case, an abnormality detection output is generated from the abnormality detection circuit 5,
The first timer circuit 7 operates based on this output, and the output limiting means 6 operates to limit the output of the inverter 1.

Note that during the timer time T of the first timer circuit 7, the abnormality detection circuit 5 is inoperative. In addition, the output limiting means 6
Therefore, the output of the inverter 1 is limited as shown in period T in FIG. Then, when the first timer circuit 7 times out, the abnormality detection circuit 5 restarts the abnormality detection operation with the output of this $1 timer circuit 7, and the second
The timer circuit 8 starts timer operation. At this time, the output limiting means 6 is turned off and the discharge lamp 1 is turned on without emitting light. Here, since the operation of the abnormality detection circuit 5 is restarted and the discharge lamp l is turned on with EMIRES, the abnormality detection circuit 5 is restarted.
detects an abnormality and repeats the above operation.
When the abnormality detection output of this abnormality detection circuit 5 occurs,
The third timer circuit 9 operates. Note that the timer time T of the third timer circuit 9 is longer than the sum of the timer time T1 of the first timer circuit 7 and the second timer time T2. After the time-up of this third timer circuit 9, the above-mentioned first and second timer circuits 7
, 8 controls the output limiting means 6 in a direction that substantially limits the lighting state of the discharge lamp l more than the operation of repeating the preheating state and the emission lighting state. Note that the operation of the output limiting means 6 is maintained in this state. That is, during the timer time T, the operation repeats the preheating state and the EMIRES lighting state to notify that there is an abnormality in the discharge lamp 1, and after the timer time T has elapsed, the output of the inverter 1 is further restricted. It is something to be done. Note that Tp in FIG. 2 indicates the advance preheating period.

An example of a state in which the output of the inverter 1 is substantially limited after the timer time T will be described with reference to FIGS. 3(b) to 3(e). Note that this FIG. 3 shows the voltage across the discharge lamp I. Moreover, FIG. 3(a) shows the repeated operation performed during the timer time T3.

Further, level 1 indicates a state in which the output limiting means 6 is operating, and level 2 indicates a state in which the output limiting means 6 is not operating and the emission control unit 6 is turned on. Figure 3(b)? is an example in which the level of all the outputs of the inverter 1 is lowered during repeated operation. In FIG. 2(e), the duty of the repetitive operation is changed, and the timer time of the first timer circuit 7 is lengthened.

The F(d) is set to the EMIRES lighting state and lowers the overall level, thereby limiting the output more than during repeated operation. In the figure (e), the timer time T of the first timer circuit 7,
The oscillation operation of inverter 1 is stopped and ! This is an example in which the EMIRES is turned on at the same level as in the above-described repeated operation at the timer time T2 of the timer circuit 8 of 1llS2, and this is repeated. In addition to this, it is also possible to stop the oscillation operation of the inverter 1 after the timer time T has elapsed.
This is inappropriate because it has the drawbacks described in the conventional example.

Further, FIG. 2 shows a method in which the output of the inverter 1 is substantially limited after the timer time T using the method shown in FIG. 3(d).

Then, the EMIRES lighting state progressed, and multiple discharge lamps appeared!
When the state of one side of the discharge lamp becomes abnormal, the abnormal temperature rise of the elements of the inverter 1 is detected by the thermal protector PT, the inverter 1 is disconnected from the rectifier/smoothing circuit 4, the oscillation is stopped, and the discharge lamp is turned off. Step 2: Turn off all lights.

Hereinafter, specific examples will be described. FIG. 4 is a diagram showing a specific circuit, and the inverter 1 is a separately excited type push-pull inverter. In the description of the circuit of FIG. 4, the portions explained with respect to the circuit of FIG. 12 will be omitted.

In this discharge lamp lighting device, individual abnormality detection units 1 are provided at both ends of each discharge lamp l, and each individual abnormality detection fBK,
The output of ... is the reference voltage■. comparator C to compare with
P2 constitutes the abnormality detection circuit 5.

The reason for using such an abnormality detection circuit 5 will be explained below. In other words, in such a multi-discharge lamp lighting device, each discharge lamp! , . . . , the abnormality detection accuracy is poor, as explained in the section on the problems of the circuit in FIG. 12. Therefore, in this embodiment, the voltage across each discharge lamp p is detected.

Another reason is that when preliminary preheating is performed as in this embodiment, the abnormality detection circuit 5 considers the preheating mode to be an abnormality in the discharge lamp l, so the abnormality detection circuit 5 is disabled during this preliminary preheating period. Therefore, there is a problem that the circuit becomes complicated and the cost of the device increases. In this respect, it is advantageous in terms of configuration and cost to detect the voltage across each discharge lamp l.

The detection operation at the end of the life of the discharge lamp 1 will be explained. Each discharge lamp1. 1 in the individual abnormality detection section of ... is the discharge lamp l
A capacitor Ck and a resistor Rk connected across the
A series circuit of Rk2 detects the voltage across the discharge lamp l, and this detected voltage is divided into voltages Vk by resistor Rkl t Rk2.
diode Dk, and capacitor Ck! It is then rectified and smoothed to obtain the detection output Vk''.

The voltages of each part of this individual abnormality detection section are shown in FIG.
Here, the voltage of each part of discharge lamp 1 is shown in the individual abnormality detection section of discharge lamp 1. If discharge lamp 1 is normal as shown in Figure 5 (A), the voltage across both ends of discharge lamp 1 is The waveform is symmetrical in positive and negative directions as shown in (,), and the divided voltage Vk at this time is the same as U!
The detected voltage Vk' obtained by rectifying and smoothing the divided voltage Vk is as shown in FIG. 2(e).

Now, when the discharge lamp 1 reaches the end of its service life and the emitter of the discharge lamp fz comes off, the discharge lamp 11 causes a half-wave discharge. The voltage across both ends is (a) in the same figure (b).
), the waveform has seven positive and negative balances. Since the DC component of this divided voltage Vk is cut by the capacitor Ck, the divided voltage Vk has a symmetrical waveform and is higher than the normal voltage. Therefore, the detection output Vk' becomes high as shown in (c) of FIG. Also, filament f2
If the emitter is peeled off, the voltage across the discharge lamp l becomes an unbalanced waveform with the polarity opposite to that shown in FIG. 3(b), as shown in (,) of FIG. 3(c). This divided voltage Vk
As shown in FIG. 3(c)(b), the waveform becomes symmetrical in positive and negative as in the case of FIG. If the discharge lamp is peeled off, the voltage waveform at both ends of the discharge lamp becomes a symmetrical waveform, but the discharge lamp 11 enters a slight discharge state, so the voltage at both ends becomes high.Therefore, the detection output Vk' in this case is It becomes even higher as shown in (e) of Figure (d).In this way, when the discharge lamp l reaches the end of its life, the detection output (2) increases more than in the normal case.

The detection output Vk' of each individual abnormality detection section is applied to the capacitor C4 via the diode Dk, . . . and held in the capacitor C1. This capacitor C
Comparator CP2 converts the voltage across 4 to the reference voltage ■. An abnormality in the discharge lamp 11 is detected by comparing with the discharge lamp 11. Therefore,
The reference voltage V0 of this comparator CP2 is the detection output Vk' in the normal state and the detection output Vk' in the one-side emitter state.
If you set it between , it will be a discharge lamp! ,... can be detected.

Next, the control circuit 21. First to third timer circuits 7 to 9
, the specific circuits of the output limiting means 6, the advance preheating control unit 10, and the advance preheating timer circuit 11 will be explained.

These circuits include a timer IC12 with two built-in circuits, and a general-purpose PW such as μPC494 (manufactured by NEC).
It is composed of an M control ICl3, logic ICs 14 and 15, and the like. ICl3 uses as a power supply the control power supply Vl created by a constant voltage circuit 16 composed of a Zener diode ZD, a resistor Rz, and a capacitor Cz, and the other ICIs 2 and 14゜15 are created inside ICI 3. The reference power source v2 is used as the power source.

When the alternating current power supply AC is turned on, the control power supply V , , V2 rises, and the resistor R7 and capacitor C are connected from the timer ICI 2.
A signal A that remains "H" for a period determined by the resistor Rs and the capacitor Cs is output, and a signal B that remains "H" for a period determined by the resistor Rs and the capacitor Cs is output. The "H" period of the signal A is the advance preheating period Tp.

Each logic ICI 4, 15 has a plurality of logic dates 14. ~14. ,15. ~15. and each logical date 14. ~14. ,15. ~153 are combined as shown in Fig. 4, and when the discharge lamp l is normal and fully lit, as shown in (c) = (d) of Fig. 6 (a),
In addition, in the dimming mode, (, L (d) in Fig. 6 (b)
Signals C and D as shown below are created from signals A and B and the output of a lighting state switching circuit 17, which will be described later. The above signal A,
C and D are input to transistors Q and ~Q, respectively, and when the respective signals A, C, and D are H'', resistors R6 to R6 are connected to both ends of the capacitor Cs. That is, resistors R5 to R
Depending on the connection state of ICI 6, the oscillation frequency of ICI 3 is determined together with resistor RT and capacitor CI. Note that when Q transistors are turned on and resistor R is connected,
The frequency for preliminary preheating of the discharge lamp L is set, and when the transistor Q is turned on and the resistor R7 is connected, the lighting frequency in the full lighting mode is set, and the transistor Q is turned on and the resistor R7 is connected. When R6 is connected, the lighting frequency in dimming lighting mode is set. At this time, the output of TCl 3 is alternately supplied to each transistor Q, , Q, via a drive transformer T. *
Further, when the signal A is "H", the transistor Q8 is turned on, the abnormality detection circuit 5 is made inactive, and the voltage Vk across the capacitor C1 is made approximately zero. Then, the advance preheating period T
After p has elapsed, the signal A becomes Ov, and the operation of the abnormality detection circuit 5 is started. Here, assuming that the discharge lamps 11 are normal, the voltage Vk across the capacitor C1 is the reference voltage ■. Since it is lower than , the output E becomes OV. In addition, in the full lighting mode, the advance preheating period Tp after turning on the AC mAc
It preheats only a few times, and then turns on completely. In the dimming lighting mode, after the AC power supply AC is turned on, advance preheating is performed for the advance preheating period Tp, and then the full lighting mode is set (To-Tp), and then the dimming lighting mode is entered.

By turning on the dimmer switch SW, the lighting state switching circuit 17 changes the logic rc14. Input "H" signal to
The signal is set to "H" to switch to the dimming and lighting mode described above. The reset circuit 18 short-circuits both ends of the capacitor C1 that determines the signal A to reset the IC 12.

Note that the reset when the AC power supply AC is turned on is performed by the transistor Q6, and the reset when the output E of the abnormality detection circuit 5 becomes H'' is performed by the transistor Q.
The third timer circuit 19 operates in response to the output E of the abnormality detection circuit 5, and does not operate when the discharge lamp 1 is normal.

Next, a case where there is an abnormality in any one of the discharge lamps 11 will be described. When the preliminary preheating period Tp elapses, the transistor Q is turned off, so if there is an abnormality in the discharge lamp, the voltage across the capacitor C1 becomes higher than the reference voltage V0, and the abnormality detection circuit 5 output E is H''
'. When an abnormality is detected in this manner, the transistor Q7 is turned on by the output E, and the charge in the capacitor C1 is discharged via the resistor R3. In this example,
The circuit is simplified by using both the first timer circuit 7 and the advance preheating timer circuit 11. In addition, the second timer circuit 8
The timer time T2 is determined by the discharge level of the capacitor C3 when the transistor Q is turned on, and is the time it takes for that level to go from (2/3) V of the timer IC 12 to (1/3) V2, This discharge time is determined by resistor R13. In other words, the timer circuit 8 of this wIJ2 is also a timer IC.
This makes effective use of the characteristics of No. 12 and simplifies the circuit.

Here, a case where the i-th discharge lamp 1k is abnormal will be described. In addition, the discharge lamps 11... are all lit, and T
O> T p
When the discharge lamp starts and lights up after preheating during the advance preheating period Tp shown in b), the discharge lamp! Since i is abnormal, the detection output Vki' of the individual abnormality detection gKi increases as described above, and the reference voltage ■
. exceed. Therefore, the output E of the comparator CP2 becomes 'H' as shown in Figure 7(g).This turns on the transistor Q7 and discharges the capacitor C1 as shown in Figure 7(,). .Until the voltage of this capacitor C1 reaches (1/3) V2 of timer IC12,
As shown in FIG. 7 (11), normal oscillation control is performed, and the inverter 1 outputs a normal high frequency output. At this time, the discharge lamp 11 becomes emissive lighting. Capacitor C
When the voltage of the timer IC 6 becomes lower than (1/3) V2 of the timer IC 12, the IC 12 is reset and the signal A becomes H'' as shown in FIG. 7(b), so the abnormality detection circuit 5 becomes inoperable. Since transistor Q is turned off, capacitor C
1 is charged again as shown in FIG. 7(a). Then, the voltage of this capacitor C1 is the (2/
3) Signal A is held at H'' level for time T1 until reaching V2. At this time, the output of inverter 1 is:
Since the signal A becomes "H", a preheating state is entered during the above-mentioned time-open period T as shown in FIG. 7(h), and the output is limited. Incidentally, here, time T and time Tp are almost the same time, but capacitor C2 is O~(1/3)
T1 is shorter than time opening Tp by the time until V2 is reached.

Then, after darkness T has elapsed, the signal A IJf is reversed from H to L. In this case, since the transistor Q8 is turned off, the abnormality detection circuit 5 operates and turns on the transistor Q, thereby repeating the above-described operation. by the way,
The third timer circuit 19 of this embodiment charges the capacitor C9 via the resistor RI5 when the output EfJt of the abnormality detection circuit 5 is "H", and the voltage across the capacitor C9 is the reference for the comparator CP. When the voltage reaches V,
The output F becomes H'' as shown in FIG. 7(i).
The state of this output "H" is determined by diode D2, resistor R+st
It is held at R+s.

The output F of this third timer circuit 19 is input to the lighting state switching circuit 17, which sets the inverter 1 to dim lighting mode and turns on the transistor Qll via the diode D6, thereby disabling the abnormality detection circuit 5. Make it. Here, in the EMIRES dimming lighting mode, the output of the inverter 1 is substantially more limited than in the repeated operation. In other words, as shown in (h) in Figure 7,
It can be seen that the output is substantially limited because the area of the hatched portion A in the figure is larger than the area of the hatched portion.

In addition, FIG. 8 shows the waveforms of various parts during dimming.
The cases of <T, +T, and <Tp+T are shown. If the period during which the inverter 1 outputs the normal high-frequency output after the advance preheating period To during dimming is T2, then the EMIRES will be fully turned on in the first hour of the period T2, as shown in FIG. 8(h). At the same time, the EMIRES dimming is turned on at time t2. After that, preheating is performed for a time T, with the output of inverter 1 being limited,
Thereafter, the above operation is repeated. Then, as shown in FIG. 8(i), when the timer T of the third timer circuit 19 elapses, the operation of the inverter 1 is switched to substantially limit the output compared to the above-described repeated operation. . In this case as well, the area of the hatched portion A is larger than the area of the hatched portion.

In this way, in this embodiment, by repeating preheating and emissive lighting at the end of the lifespan M, the discharge lamp! , . . . can inform that one is at the end of life. In addition, the preheating and Emires 7α lamp time T + ,
Since T2 can be set arbitrarily, the above abnormality notification can be made easy to understand.

Moreover, since the above-mentioned repeated operations are performed without stopping oscillation, stress on a normal discharge lamp can be reduced. Further, after an arbitrary time T from the point of time when the abnormality is detected, the output of the inverter 1 is substantially limited compared to the above-described repeated operation, so that the protection of the inverter 1 ends. In this embodiment, the first timer circuit 7 and the advance preheating timer circuit 11 are also used, and the second timer circuit 8 is configured by utilizing the characteristics of the advance preheating capacitor C1 and the timer ICI 2. Therefore, the circuit configuration can also be simplified. Furthermore, if this operation is repeated for multiple lamps, which discharge lamp 1. It is possible to recognize whether ... is abnormal. Moreover, since it enters the output limiting mode after time T, it is possible to maintain the lighting without causing any trouble to the circuit even when the EMIRES lighting is performed. In addition, if the emissionless state progresses, the thermal protector PT will shut down all the discharge lamps as described above. ...Turns off the lights.

In addition, in this embodiment, a modified half-pristine inverter is used as the inverter 1, but a full bridge inverter, a seven-bar bridge inverter, an L
It can also be applied to push-pull inverters.

[Embodiment 21 FIG. 9 shows another embodiment of the present invention. In this embodiment, the individual abnormality detection part K of the discharge lamp l is connected to the DC cut capacitor C0.
The system operates by detecting the ripple component. In addition, in this individual abnormality detection section, capacitor C8
The voltage is divided, rectified and smoothed to obtain a detection output, and this detection output is compared with the reference voltage by the respective comparators CP 3 r CP 4 for the emires polarity of the filament L-fz. , , cp, are configured to be off to output E. In other words, when the filament r is emissive, the voltage of the capacitor C0 increases, so the output of the comparator CP3 becomes OV.

The output of the comparator CP becomes "H" and when the filament f2 is emissive, the voltage of the capacitor C0 decreases, so the output of the comparator CP becomes "H" and the output of the comparator CP becomes OV.

Embodiment 31 FIG. 10 shows still another embodiment, in which the individual abnormality detection section K detects the current of one load circuit. That is, a change in the resonant current is detected by a current transformer CT, the secondary output of this current transformer CT is rectified and smoothed, and this rectified and smoothed output is converted to a reference voltage (2) by a comparator CP. In comparison, an output E which becomes H'' is obtained in the event of an abnormality.

Note that the discharge lamp 11 has the same configuration as the individual detection unit.
It is also possible to configure a total extinguishing means that extinguishes all the discharge lamps 11 when the number of discharge lamps 1 that are turned on without emitting light reaches a predetermined number or more.

[Effect of the Invention 1] As described above, the present invention includes an abnormality detection circuit that detects an abnormality in each discharge lamp, and a timer operation that starts when the abnormality detection output of this abnormality detection circuit occurs, and also a first timer circuit that controls the abnormality detection circuit to be inactive; and an output that limits the output of the inverter from a point when the abnormality detection output of the abnormality detection circuit occurs until a time-up point of the first timer circuit. a limiting means, a second timer circuit that starts a timer operation based on the time-up output of the first timer circuit, and controls the output limiting means to be inactive during the timer time; and the first and second timer circuits. has a timer time longer than the sum of the timer times of , and starts the timer operation at the time when the abnormality detection output of the abnormality detection circuit occurs, and the inverter operation during the timer time of the first and C/second timer circuits. and a third timer circuit that controls the output control means at time-up so as to apply substantially more restriction than the output restriction state of the discharge lamp. ,
It is possible to reliably detect that there is an abnormality in each discharge lamp, and when an abnormality in the discharge lamp is detected, the first and second timer circuits can be used to determine whether the output of the inverter is restricted or not. By repeating this during the timer period of the third timer circuit, it is possible to notify of an abnormality in the discharge lamp.Furthermore, when the third timer circuit times out,
By controlling the output control means to be substantially more restrictive than the inverter's output limiting state during the timer time, the inverter's output is brought to a state where no stress is applied to the circuit elements while the discharge lamp is lit. It has a limiting effect.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a schematic circuit configuration of an embodiment of the present invention, FIG. 2 is an explanatory diagram of the same operation, FIG. 3 is an explanatory diagram of an output limiting method, and FIG. 4 is a specific circuit diagram of the same, FIG. 5 is an explanatory diagram of the operation of the individual abnormality detection section, FIGS. 6 to 8 are explanatory diagrams of the same operation as above, FIG.
0 is a circuit diagram of a main part of another embodiment, FIG. 11 is a circuit diagram of a conventional example, FIG. 12 is a circuit diagram of another conventional example, and FIG. 13 is an explanatory diagram of the same operation. 1 is an inverter, 4 is a rectifier/smoothing circuit, 5 is an abnormality detection circuit, 6 is an output limiting means, 7 is a first timer circuit, 8 is a second timer circuit, 9 is a third timer circuit, AC is an alternating current A power supply, L is a load circuit, and l is a discharge lamp. Agent Patent Attorney Ishi 1) Ai Figure 71 Figure 3 1 Gil 2--------- Figure 2 Chassis Z---+-ybz---- ℃ Φ

Claims (3)

[Claims] (1) A rectifier/smoothing circuit that rectifies or rectifies and smoothes AC power, an inverter that converts the output of this rectifier/smoothing circuit to high frequency, a load circuit consisting of multiple discharge lamps, and detects abnormalities in each discharge lamp. a first timer circuit that starts a timer operation when the abnormality detection output of the abnormality detection circuit is generated and controls the abnormality detection circuit to be inactive during the timer operation; Output limiting means for limiting the output of the inverter from the time when the abnormality detection output of the detection circuit occurs to the time up of the first timer circuit; a second timer circuit that controls the output limiting means to be inactive during the time;
and the second timer circuit, and starts the timer operation from the time when the abnormality detection output of the abnormality detection circuit occurs, and
and a third timer circuit that controls the output control means at time-up so as to impose substantially more restriction on the output of the inverter than during the timer time of the timer circuit. (2) The discharge lamp lighting device according to claim 1, further comprising a total extinguishing means for extinguishing all the discharge lamps when a predetermined number or more of the discharge lamps are illuminated without emission. (3) Claim 2 in which the fact that a predetermined number or more of the discharge lamps are illuminated without emission is detected from the temperature rise of the elements constituting the inverter or the current of the load circuit.
The discharge lamp lighting device described.