JPH02171819A - Tablet - Google Patents

Abstract

PURPOSE:To improve operability, to reduce the number of parts and to decrease a fault by automatically starting coordinate detection operation when the output signal of a pen is a prescribed level, or more. CONSTITUTION:A scanning pulse, which is successively supplied from a row driver 2 to the row coordinate of a matrix panel 1, is detected by a pen 5 and supplied to a row coordinate detecting part 10 and a row coordinate is detected. The scanning pulse, which is successively supplied from a column electrode driver 3 to the column electrode of the panel 1, is detected by the pen 5 and supplied to a column coordinate detecting part 11 and a column coordinate is detected. A comparator 7 is provided to compare the output signal of the pen 5 with a reference voltage and when the output signal of the pen 5 is the prescribed level or more, the coordinate detection operation is started.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is applied to a display-integrated tablet in which a tablet that performs coordinate manual operation is integrated with a display, thereby creating a suitable tablet.

[Conventional Technique WI] Conventionally, as shown in FIG. 9, a display-integrated tablet is constructed by forming a display 51 and a tablet 52 separately and independently, and then bringing them into close contact with each other to form an integral unit. . Here, for example, an EL (electroluminescence) display element is used as the display 51, and a capacitive coupling type is used as the tablet 52. In addition, in Fig. 9, 5
3 is a pen for detecting scanning holes.

[Problem A to be Solved by the Invention] By the way, according to the device configured as described above, for example, by embedding the tip of the bevel 53 in the glass surface of the tablet 52, the mechanical switch built in the bevel 53 can be turned on. The coordinate detection operation is performed as follows, and the operation is cumbersome.
In addition, the number of parts increased, making it more expensive, and the presence of moving parts also raised the risk of failure.

Therefore, the object of this invention is to provide a tablet that has improved operability, reduced the number of parts to make it cheaper, and eliminates the risk of failure by roughly eliminating moving parts.

Means for Solving Problem C14] This invention has a matrix panel, 1 row 71fil driver, and 1 column! By combining the pole driver, row coordinate detection section, column-like detection section, and detection conductor, 1Ill! is sent from the row electrode driver to the row electrode of the panel! The next supplied scanning pulse is detected by the detection conductor and supplied to the row coordinate detection unit to detect the row coordinate, and the scanning pulse sequentially supplied to the column electrodes of the panel from the column electrode driver is used for detection. The tablet detects the row seat by being detected by a conductor and supplied to the row seat detection unit, and is provided with a comparator that compares the output signal of the detection conductor with the base i1t ffi pressure, and the output signal of the detection conductor is The coordinate detection operation is started when the output signal exceeds a predetermined level.

[Function] In the above configuration, when the output signal of the detection conductor 5 exceeds a predetermined level, the coordinate detection operation is automatically started. There is no need to press the pen against a surface and turn on a built-in shield switch to detect coordinates, making the operation easier.

In addition, the detection conductor 5 does not require a mechanical switch,
Since the number of parts is reduced, it can be constructed at low cost. In general, since there is no moving part such as a mechanical switch in the detection conductor 5, there is no fear of failure.

[Example] Hereinafter, referring to FIG. 1, an example of the practical application of this invention will be explained.

In the figure, l is a thin film EL matrix panel, and 5'+! 3'2+ . . . + yn is the row electrode, Xi, x2. ..., the Y layer is a column electrode.

Further, 2 is a row electrode driver, and its plurality of output terminals are %Vl, y2 of the panel 1, respectively.

..., connected to yn. 3 is a column electrode driver, and its plurality of output terminals are connected to the column electrodes r1, . x2. 11!・Connected to X111.

The operations of these row 1i pole drivers 2 and column electrode drivers 3 are controlled by a timing generation circuit 4.

As shown in FIG. 2, in the display mode, row electrodes 5/1, 5/2, . ..., 5/1
To 1! 1lli with single electrode 11'2! Next scanning pulse p y
At the same time, the column ? is supplied from the column electrode driver 3. ll'
The t pressure ■SD corresponding to the display data SD is simultaneously supplied to lXl, X2, . . . , xm for one scanning line.

In addition, in the row coordinate (X coordinate) detection mode, the row electrode driver 2 sends electric currents iyl, y2, . . . . A scanning pulse Py' is sequentially supplied to yn. In this case, the pulse width of the scanning pulse Py' is widened, and the electric power Fiy l,
y2. ..., yn, a plurality of adjacent electrodes, for example, 20 electrodes, are simultaneously supplied with the scan pulse PV', and the next scan is performed.

In addition, in the detection mode of row seat (X coordinate), row i! From the pole driver 3, the column electrodes X1. x2. . . . A scanning pulse Px' is sequentially supplied to X11. In this case, the pulse width of the scanning pulse Px' is also widened, and the column electrodes xl, x2 .
..., a plurality of adjacent electrodes, for example, 20 electrodes among xm, are sequentially scanned with the scanning pulse Px' being simultaneously supplied.

The period of the display mode, the interval of the row coordinate detection mode, and the period of the column rJA mark detection mode are provided in each frame in a time-sharing manner. Note that the order is not limited to the illustrated example and is arbitrary.

Here, the polarity of the scanning pulse Py in display mode is:
It is inverted every frame.

In addition, the scanning pulse Py'Px' when in the coordinate detection mode
The polarity of each! Although it is desirable to invert the frame, a unipolar pulse may be used to simplify the circuit. In this case, lower voltage is better, but
If the S/N is too low, the scanning pulses Py', Px'
becomes unable to be detected.

For example, in display mode, the light emission dark value voltage is ±20
0■, row electrode yL 3/2. ...yll
+215V or -165V as scanning pulse Py
, column electrodes XI, x2. ...+50V or Ov is selectively supplied as the x111 voltage VSD, and ±215V is supplied to the light-emitting pixel portion, and ±165V is supplied to the non-light-emitting pixel portion.
The polarity is alternately inverted and supplied for each frame. In addition, in the row coordinate detection mode, the row electrodes y1.
+2 as scanning pulse Py' to yL...t yll
5V is supplied, and in the column coordinate detection mode, +25V is supplied to the column electrodes x l + x 2 + . . . , XI as a scanning pulse PX'.

In the above configuration, in the display mode, the row electrodes y1.
y2. Scanning pulses PV are sequentially supplied to the column electrodes XI and yn on a per-electrode basis.

x2. Since the voltage vS corresponding to the display data SD is simultaneously supplied to *X1ll for each scanning line, display driving is performed by line sequential scanning, and an image corresponding to the display data SD is displayed.

Further, 5 is a pencil-shaped conductor (hereinafter referred to as "pen"), and when this pen 5 is brought into contact with any position on the panel 1, a scanning pulse is detected by capacitive coupling.

In this case, as mentioned above, in the coordinate composition mode,
Scanning pulses Py' and Px are applied to multiple adjacent electrodes simultaneously.
Since scanning is performed sequentially with ' being supplied, the level of the detection signal of the pen 5 increases compared to a case where the scanning pulse Py'Px' is supplied to only one electrode. This will be explained in detail with reference to FIG.

In the figure, 41 is a pencil-shaped conductor (hereinafter referred to as "pen"), and 42 is a glass plate of a thin 11EL matrix panel. Reference numeral 43 denotes a matrix electrode, which originally consists of two layers, a row electrode and a column electrode, but for the sake of simplicity, only one layer is shown. 44 is a switching switch for scanning, 45
is the power supply for the scanning pulse, and 46 is the human power impedance of the amplifier (amplifier 6 in FIG. 1) for lateral output of the scanning pulse.

As shown, a capacitor exists between the pen 41 and the electrode 43, and its capacitance is set to 01 corresponding to electrode number 1. Further, the electrode 43 is grounded when J≦1-1 or J≧i+4, and ! ≦J≦Ten # in Hoju 3! 45. Note that the number of electrodes 43 is n, and l
≦J≦n.

FIG. 4 shows an equivalent circuit in this case. Here, CVS = Ci+ Ci+1+ Ci+:2+ Ci
+:3CGNO= CI+ C2+=-+ Ci-1+
Ci+4+.-+Cn, and the detection signal VS by the pen 41 is as follows if Zinl>>1/ωcGN (1) is selected. 1Zinl is the magnitude of the human power impedance 46.

Here, VS is the voltage value of the electrode R45, Co is the total capacitance formed between the pen 41 and the electrode 43, and CvS+ CGN
It is D.

As is clear from equation (1), in the method of supplying the electrode 45 with 114 poles each, when n is several hundred, CVS (Co) is obtained, so the detection signal VS is small;
Detection of scanning pulses becomes difficult.

However, as in this example, the power supply 45 is supplied at the same time as the power P
When the number 543 is increased, CvS increases accordingly, the detection signal VS increases, and scanning pulses can be easily detected.

In this case, the capacitance Ci of the capacitor formed by the electrodes 43 becomes smaller as the distance from the pen 41 increases, as shown in FIG. In the case of 4+++m, the effect can be ignored in areas farther away than near the 10 left and right electrodes. Therefore, the number of electrodes 43 to which the power source 45 is simultaneously supplied only needs to be 20, and even if the number is increased beyond that, the effect of increasing the level of the detection signal will not be long enough.

In FIG. 1, the detection signal of this pen 5 is supplied to an amplifier 6 and amplified, and the detection signal VS from this amplifier 6 is supplied to a comparator 7 and compared with a reference voltage Vr. The output voltage VS of the amplifier 6 of the detection signal of the pen 5 is
As shown in the figure, it decreases in approximately inverse proportion to the distance Md between the ben 5 and the glass plate.

Reference voltage ■ is the detection signal V when distance d is do
It is set equal to the level of S. As described later, the distance Il
l d o is the position at which the coordinate detection operation begins, is determined in advance in consideration of operability, and is set to, for example, room. Ben 5 is on glass (glass thickness = 2.4 as), i.e. d
=2. When 4m+s, the detection signal vs is 3■, d=4-
When the food is served, the detection signal VS becomes 1v. Therefore, in this case, Vr = 2V and d.

=3. 4mm, which is a distance of 1ms+ from the glass plate surface.

This comparator 7 outputs a signal with a high level ``1'' when the detection signal VS is greater than the reference voltage Vr, and a signal with a low level ``0'' 1 when the force detection signal VS is smaller than the reference voltage Vr. is output. The output signal of this comparator 7 is then supplied to an AND circuit 8.

Further, the detection signal VS from the amplifier 6 is supplied to a peak point detection circuit 9, and from this peak point detection circuit 9,
At the peak of the detection signal vs, a high level signal is output, and at the peak time, a low level signal of "0'' is output. This peak point detection circuit 9
Output number 8 is supplied to AND circuit 8.

The AND circuit 8 outputs a high level "1" when the detection signal VS is higher than the reference voltage Vr and at the peak of the detection signal VS.
A signal of "40" is output, and at other times a signal of low level "40" is output. The output signal of this AND circuit 8 is supplied to a row coordinate detection section 10 and a column coordinate detection section 11. In this case, the row coordinate detection section 10 is configured, for example, as a counter, and is reset by being supplied with a reset signal from the timing generation circuit 4 before going into the row coordinate detection mode, and at the same time, the row coordinate detection section 10 is reset.

y2. ◆..., a clock is supplied and counted at the timing when the sequential scanning pulse Py' is supplied to yn, and the counting operation is stopped at the timing when the output signal of the AND circuit 8 becomes high level "1". . Therefore, the row coordinate detection unit 10 determines the position of the panel 1 that the pen 5 touches. A count value corresponding to the position is obtained as a row coordinate output.

The column coordinate detection section 11 is also configured with a counter, for example, and is reset by being supplied with a reset signal from the timing generation circuit 4 before entering the column coordinate detection mode.゜x2. ···pot,
A clock is supplied and counted at the timing when the sequential scanning pulse Px' is supplied to xm, and the counting operation is stopped at the timing when the output signal of the AND circuit 8 becomes a high level "1". Therefore, a count value corresponding to an arbitrary position on the panel l touched by the ben 5 is obtained as a row seat type output from the row coordinate detection unit ll.

FIG. 7 is a diagram showing a specific configuration of the embodiment.

In FIG. 7, parts corresponding to those in FIG. 1 are designated by the same reference numerals.

In the same figure, 21 is the 1st electric field Fjyl of panel 1.

S/2. ...c corresponding to the number of electrodes tyn
A shift register having a number of q, 22 is an AND circuit 2A1 to 2An corresponding to the number of electrodes, an exclusive NOR circuit 2El to 2En, and an N-channel FET 2N) to
2Nn and a driver having P channel FETs 2PI to 2Pn, etc., 23 is a voltage iavν+ (+215V),
A selector switch for switching between ground (OV) and electric i1+/2 VO (+25V), 24 is the power supply Viz-(-
165V) and 11! ! (OV), and these shift register 21, driver 22, and changeover switches 23 and 24 constitute a row electrode driver 2.

That is, the n-stage output terminals of the shift register 21 are connected to the human power side of the AND circuits 2AI to 2An of the driver 22, respectively, and the AND circuits 2A! The output side of ~2An is connected to the human power example of Excluse 1 Nor circuit 2E1~2En, respectively, and this Excluse -9127 times R2E
The output side of I~2En is each N-channel FET2N1
~2N11 gate and P channel F
ET2Pl~2P “Connected to the gate of 1.

Further, the sources of the P-channel FETs 2Pl to 2Pn are each connected to the movable terminal of the changeover switch 23, the fixed terminal on the a side of this changeover switch 23 is connected to the power supply Vv+, the fixed terminal of the bm is grounded, and the fixed terminal of the changeover switch 23 is connected to the power supply Vv+. The fixed terminal is connected to the power supply 1/2Vl'l. The switching of the changeover switch 23 is controlled by the timing generation circuit 4.

Also, N channel FET2N! ~2Nn sources are each connected to a movable terminal of the changeover switch 24. The fixed terminal on the a side of this changeover switch 24 is connected to the electric power RV w-, and the fixed terminal on the b side is grounded. This switching of the changeover switch 24 is controlled by the timing generation circuit 4.

The drains of the N-channel FETs 2N1 to 2Nn are connected to the drains of the P-channel FETs 2Pl to 2Pn, respectively, and the respective connection points are connected to the row electrodes y1. y2. Conflict...◆, connected to yn. In addition,
N-channel FET2N1~2Nn, P-channel FET2
A diode is connected between the drain and source of each of PI to 2Pn.

In this case, in the display mode, an enable signal (shown as y-enable in FIGS. 8C and Q) is supplied from the timing generation circuit 4 to the AND circuits 2A1 to 2A11. In one frame, the switching switch 23 is connected to all, and the voltage RV w÷ is supplied to the sources of the P-channel FETs 2P1 to 2Pn (as shown in FIG. 8E), and the switching switch 24 is connected to bm. N-channel FET2N1~
The source of 2Nn is grounded (shown in Figure 8F) and the inverting/
The non-inverting control signal (shown as y-inverting/non-inverting in the eighth diagram) is taken to a low level "QII".Meanwhile, in the next frame, the changeover switch 23 is connected to bII and the P-channel FETs 2PI~2P The source of FET n is grounded (shown in FIG. 8E), the selector switch 24 is connected to altl, and the source of N-channel FETs 2N1 to 2Nn is connected to the voltage RV w- (shown in FIG. 8F). The inversion/non-inversion control signal is set to a high level 111 Jl.

Further, data for the scanning pulse Py (shown as y data in FIG. 8A) is supplied from the timing generation circuit 4 to the shift register 21, and clocks (shown as y data in FIG. 8B,
(shown as y clock) is supplied to N. The data for this scanning pulse Py includes the electric power Fjy1. y2゜
・In order to sequentially scan 3/11 one by one, 1
The high level "111" continues as long as the number of hits.

Therefore, in a certain frame, P channel FET2P
A low-level signal "lO" is sequentially supplied to the gates of l to 2Pn to turn them on, and the row electrodes yl+3/ of panel l are turned on.
2.・Red...+yn is sequentially supplied with voltage Rv-÷ in units of l electrodes as a scanning pulse Py.

In the next frame, high-level "1" signals are sequentially supplied to the gates of N-channel FETs 2N1 to 2Nn to turn them on, and the power outputs 1y1. The electric current Rvsu is sequentially supplied to y2°..., yn in one electrode amount as a scanning pulse py.

In addition, in the row coordinate detection mode, the timing generation circuit 4
The enable signal (the eighth
(shown as y enable in Figure C) is provided. The selector switch 23 is connected to cll and the P channel F
$11/2VD is supplied to the sources of ET2Pl to 2Pn (as shown in Figure 8E), the selector switch 24 is connected to the b side, and the sources of N-channel FETs 2N1 to 2Nn are grounded (as shown in Figure 81!IF). , an inversion/non-inversion control signal (
(shown as inverted/non-inverted in diagram 8) is low level j40
Is.

In addition, data for the scanning pulse Py' (shown as y data in FIG. 8A) is supplied from the timing generation circuit 4 to the shift register 21, and the data for the scanning pulse Py' (shown as y data in FIG. 8A) is supplied to the shift register 21.
(shown as y clock). The data for this scanning pulse Py' is for row electrodes yl, y2 .・・◆
, y-1, for example, 20 electrodes, are simultaneously scanned, so that the high level "1"" continues for 20 clocks.

Therefore, the low level "θ" is simultaneously applied to 20 adjacent gates of P channel Fil: T2Pl to 2Pn.
is supplied and turns on, and the row electrode yL of panel 1
y2. ..., adjacent 20 of yll
A voltage [1/2V
D is supplied and sequential scanning is performed in this state.

In addition, in the column coordinate detection mode, the timing generation circuit 4
The enable signal (shown as X enable in FIG. 8C) supplied to the AND circuits 2A1 to 2An is set to a low level "0". The changeover switch 23 is connected to the b side, and the sources of the P-channel FETs 2PI to 2Pn are grounded (as shown in FIG. 8E), and the changeover switch 24 is connected to the b side, and the sources of the N-channel FETs 2N1 to 2N11 are grounded. (as shown in FIG. 8F), and the inverting/non-inverting control signal is set to a low level "0". Therefore, the N-channel F
A high level °°1pa signal is supplied to the gates of ET2N1 to 2Nn, turning them on, and the power transmission iy1.
y2. ..., yll are all grounded.

Further, 31 is the column electrode x! of panel 1! , x2゜...,X
A shift register having a number of stages corresponding to the +W electric field FIIPi, 32 a latch circuit having a number of stages corresponding to the number of electrodes, and 33 a NAND circuit 3A1 to 3A1 corresponding to the number of electrodes.
3Am, a driver with N-channel FET3NI ~3Nm and P-channel FET3PI ~3Pm, etc., 3
4 is a variable Ml source circuit, and these shift registers 31
, latch circuit 32, driver 33, variable wi source circuit 34
The column electrode driver 3 is configured by:

That is, the output terminals of the shift registers 310m stages are connected to the input sides of the NAND circuits 3AI to 3Am of the driver 33 via the latch circuits 32, respectively, and the output terminals of the NAND circuits 3A1 to 3A- are connected to the N channel FETs 3, respectively.
It is connected to the gates of N1 to 3Nm, and also to the gates of P channel FETs 3PI to 3Ps.

Further, the sources of the P-channel FETs 3P1 to 3PI are connected to the output side of the variable power supply circuit 34.
t#1/2VD is connected to the input side of 4. This variable power supply circuit 34 is controlled by the timing generation circuit 4, and outputs VD in the display mode and outputs 1/2VD in the coordinate detection mode (as shown in FIG. 8K). Also, N
The sources of channel FETs 3N1 to 3Nn+ are each grounded.

The drains of P-channel FETs 3PI to 3Pm are connected to the drains of N-channel FETs 3N1 to 3Nm+, respectively, and each connection point is connected to the column electrode x of panel l.
L x2. ..., connected to XI. In addition,
N channel FET3N1~3Ng+, P channel FET
A diode is connected to the drain and source of each of 3PI to 3Pi. In this case, in the display mode, the timing generation circuit 4 outputs the NAND circuits 3A1 to 3A+.
An enable signal (shown as X enable in FIG. 8J, Q) is supplied to a.

Further, data (shown as X data in FIG. 8 H and O) is supplied from the timing generation circuit 4 to the shift register 31, and a clock (shown as X data in FIG.
．． (shown as an X-lock) is supplied to P. In this case, in a certain frame in which the voltage 1Jff V v÷ is supplied as the scanning pulse Py to the row electrode ylt yL conflict/'l 3/, the inverted data of the display data SD is supplied, while the voltage is supplied as the scanning pulse Py. In the next frame to which RV w- is supplied, display data SD is supplied as is.

Then, each time data is sequentially supplied to the shift register 31 and n1 pieces of data for one scanning line are set, the timing generation circuit 4 sends a load signal (
In Fig. 8, N is supplied with the data (shown as an It is held between scan lines. This ensures a sufficient period for the EL to emit light, for example about 40 μsec.

Therefore, the row electrodes y+, S/2. −・・、
In a certain frame in which the electric current Rνν+ is supplied to yn as the scanning pulse py,
A high level "1" signal is supplied to the gate of one of the P-channel FETs 1 to 3NII+ corresponding to the display pixel section to turn it on, and a low level signal is supplied to the gate of one of the P-channel FETs 3PI to 3Pm corresponding to the non-display pixel section. “□ The IT signal is supplied and turned on, and the column electrode x1.x of panel 1
2. ..., xm, the electrode corresponding to the display pixel portion is grounded, and the voltage VD is supplied to the electrode corresponding to the non-display pixel portion.

On the other hand, in the next frame in which power is supplied as scanning pulse Py, P channel FET3Pl to
A low level "0" signal is supplied to the gate of the 3P+e corresponding to the display pixel section to turn it on, and
A signal of high level "1" 9 is supplied to the gate of the N-channel FET 3Nl-z3N+a corresponding to the non-display pixel portion to turn it on, and the column electrodes X1 . x2.
...The voltage VD is supplied to the it electrode corresponding to the display pixel portion of the X-axis, and the electrode corresponding to the non-display pixel portion is grounded.

In addition, in the row coordinate detection mode, the timing generation circuit 4
The enable signal (shown as X enable in FIG. 8J) supplied to the NAND circuits 3A1 to 3Am is set to a low level "0'". Therefore, the N-channel FET 3N
A high level "41" signal is supplied to the gates of 1 to 3Nm+ to turn them on, and all column electrodes of panel 1 are grounded.

In addition, in the detection mode of the row seat image, the timing generation circuit 4
The enable signal (8th
(shown as X enable in Figure J) is provided. Then, the timing generation circuit 4 supplies the data for the scanning pulse Px' (shown as X data in FIG. 8H) to the reshift register 31, and also supplies the clock (shown as the X clock in FIG. 8I). be done. This scanning pulse Px'
The data for column electrode x1. x2. =*,
In order to simultaneously scan multiple adjacent electrodes of the xrs, for example 20 electrodes, the high level “1” is applied for 20 clocks.
``'' will be followed. Note that the timing generation circuit 4
The load signal (shown as X load in the eighth diagram) continues to be supplied to the latch circuit 32, and the latch circuit 32 is placed in the through mode.

Therefore, a signal of low level "0'' is simultaneously supplied to the gates of 20 adjacent P-channel FETs 3Pl to 3Pm to turn them on, and the column electrodes x1.x of the panel 1 are turned on.
2. A voltage of 172 VD is simultaneously supplied as a scanning pulse Px' to 20 adjacent electrodes of X2, and sequential scanning is performed in this state.

Thus, in display mode, row electrode yl+ 372
. . , yn are sequentially supplied with scanning pulses Py for each electrode, and the column electrodes X1 . ! 2. ...A voltage corresponding to the display data SD is simultaneously supplied to xm for each scanning line, the display is driven by line sequential scanning, and the display data SD
The corresponding image will be displayed.

Further, the detection signal of the pen 5 is supplied to an amplifier 6, the detection signal VS from this amplifier 6 is supplied to a comparator 7 and a peak time detection circuit 9, and the respective output signals are supplied to an AND circuit 8. The AND circuit 8 outputs a signal in which the detection signal VS is greater than the reference voltage V and has a high level "1"' at the peak of the detection signal VS, and a low level "0" signal when the detection signal VS is used. ” signal is output.

The output signal of this AND circuit 8 is supplied as a count stop signal to a row coordinate detecting section 10 and a column coordinate pinching section 11 which are constituted by a counter.

The row coordinate detection unit 10 is supplied with the same clock as the clock supplied to the shift register 21 (shown as the X clock in 81B) from the timing generation port n4, and a reset signal (y A counter reset (shown as a counter reset) is supplied and reset before entering the row coordinate detection mode. Therefore, when the row coordinate detection mode is entered, the clock starts counting, and the detection No. 18 vs is higher than the reference voltage Vr, and the detection signal V
The counting operation ends at the peak point of S, and the row coordinate detection unit 10 obtains a count value corresponding to an arbitrary position on the panel 1 touched by the pen 5 as a row coordinate output.

Further, the row-and-row detection unit 11 is supplied with the same clock as the clock supplied to the shift register 31 (shown as X clock in FIG. 8I) from the timing generation circuit 4, and a reset signal ( M is supplied with an X counter reset (shown as an X counter reset) and is reset before entering the column coordinate detection mode. Therefore, when the column coordinate detection mode is entered, the clock starts counting, and the counting operation ends when the detection signal VS is greater than the reference voltage V' and the detection signal VS is at its peak, and the row-coordinate detection unit 8 detects A count value corresponding to an arbitrary position on the panel l that is touched by the pen 5 is obtained as a row seat type output.

In addition, in the 71st, 4a is RA, M in which the display data SD is written.

According to this example, when the pen (pencil-shaped conductor) 5 is brought close to the glass surface of the panel l, the output signal of the comparator 7 becomes a high level "1 + 1", and the AND circuit 8 detects the row coordinate detection unit 10, Since the row-like detection unit 11 starts counting and dynamically enters the coordinate detection operation, compared to the conventional method in which pressing the pen tip against the display turns on a mechanical switch built into the pen and enters the coordinate detection operation. , operation becomes easy.Furthermore, since the pen 5 does not require a mechanical switch, the number of parts can be reduced and the configuration can be made at low cost.Furthermore, since the pen 5 does not have any moving parts such as a mechanical switch, there is no need for the pen 5 to malfunction. There is no need to worry.

In addition, since the panel 1 is used for both display and coordinate detection, the display surface of the display and the manual surface of the tablet are reliably matched over the entire surface with an accuracy of one display pixel, making it easy to manufacture. can.

In addition, since the panel l is used for both display mode and coordinate detection mode, and the row tl'l driver 2 and column electrode driver 3 are used in common, unnecessary circuits can be omitted and the configuration can be made at low cost. , it can be advantageous in terms of space.

In addition, since the display mode interval and the coordinate detection mode 1 open are provided alternately in a time-division manner, the scanning pulse Py is not affected by interference signals caused by various signals necessary for display drive during the coordinate detection mode period. 'Px' can now be detected, and coordinates can be detected satisfactorily.

In addition, in the coordinate detection mode, the level of one word detected by the pen 5 becomes large because scanning pulses Py'Px' are simultaneously supplied to a plurality of adjacent N1s, for example, 20 N1s, and the scanning pulses Py'Px' are sequentially scanned. , scanning pulses Py', Px' can be easily detected, and coordinates can be detected satisfactorily.

Note that, unlike the above-mentioned embodiment, as shown in FIG. 9, the display 51 and the tablet 52 are formed separately and are integrated into one by bringing them into close contact with each other. Of course, the invention can be applied in the same way.

[Effects of the Invention] As explained above, according to the present invention, the coordinate detection operation is automatically started when the output signal of the detection conductor exceeds a predetermined level. There is no need to press the tip of the pen against the glass surface of the tablet and turn on a mechanical switch built into the pen to detect coordinates, making the operation easier. In addition, the number of parts is reduced because a mechanical switch is not required for the detection conductor.
Can be configured at low cost. Furthermore, the detection conductor does not have any moving parts such as a switch (contract switch), so there is no need to worry about it breaking down.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing one embodiment of the present invention, Figs. 2 to 6 are diagrams for explaining its operation, Fig. 7 is a concrete block diagram of the example in Fig. 1, and Fig. 8 is its operation. For explanatory purposes, FIG. 9 is a block diagram of a conventional 1 chestnut. I ・ 2 φ 3 ・ 4 ◆ 5 ・ 7 8 ・ 9 ・ 10 ・ 11 ・ 1lll EL matrix panel ・ Row electrode driver ・ Column electrode driver ・ Timing generation circuit ・ Pencil-shaped conductor φ comparator ・ AND circuit ・ Peak point detection Circuit/row coordinate detection section/column coordinate detection section

Claims (1)

[Claims] (1) Comprising a matrix panel, a row electrode driver, a column electrode driver, a row coordinate detection section, a column coordinate detection section, and a detection conductor, which is sequentially supplied from the row electrode driver to the row electrodes of the panel. A scanning pulse is detected by the detection conductor and supplied to the row coordinate detection section, thereby detecting the row coordinate, and a scanning pulse sequentially supplied from the column electrode driver to the column electrode of the panel is detected by the detection conductor and supplied to the row coordinate detection section. In a tablet in which column coordinates are detected by being detected by a detection conductor and supplied to the column coordinate detection section, a comparator is provided to compare an output signal of the detection conductor with a reference voltage, and an output of the detection conductor is provided. A tablet characterized in that the coordinate detection operation starts when the signal reaches a predetermined level or higher.