JPH0216629A - Displaying screen confirming system - Google Patents

Abstract

PURPOSE:To execute the correct and redundant inspection by reading bit data developed at a frame memory, compressing the data with a bit data compressor, and comparing the result with the reference compressed data obtained by a normal device beforehand. CONSTITUTION:A main control device 1 sends the displaying command of a prescribed test pattern to a display device 2, a bit is developed in a frame memory 2a by various functions by the device 2 and displaying is executed at a displaying picture 2b. At this time, bit data are read from the memory 2a, and compressed for the bit column blocked by a bit data compressor 3. The comparison of the compressed data and reference compressed data 4 held beforehand is executed. The data 4 is the compressed data obtained by the same data compressor while they are the same test patterns in a normal display device and thus, the bit data in the memory 2a are inspected.

Description

[Detailed Description of the Invention] [Summary] Compare the displayed content with a test pattern to check whether it is correct or not during mass production inspection of bitmap display devices! With regard to the display screen confirmation method used in the test, the system is equipped with a bit data compression means to compress bit data, with the aim of eliminating the inefficiency of visual inspection, being effective even in long-term continuous running tests, and ensuring accurate performance.
When displaying a test pattern, the bit data developed in the frame memory is read out, the bit data is compressed by the bit data compression means, and the test is performed by comparing it with standard compressed data obtained in advance with a normal device. Configure.

[Industrial application field]

The present invention relates to a display screen confirmation method that compares display contents with a test pattern to confirm whether they are correct during mass production inspection of bitmap display devices, and in particular,
Concerning a confirmation method that does not rely on visual inspection.

[Conventional technology]

Currently, during mass production inspection of bitmap display devices, many test patterns are displayed on the display screen to confirm whether the displayed contents are correct or not, and to guarantee the normality of the device. This confirmation is performed by human visual inspection.

In high-performance bitmap display devices such as engineering workstations, the characters, figures, images, etc. drawn on the CRT display screen are ISO, ASCII.

A function that converts character codes such as EBCDIC to character dot fonts, 70 functions that generate vectors of circles and line segments in figures, a CEP function that compresses/expands image data, a color conversion function of image data, etc. , a lot of hardware and firmware (microprograms)
The dot pattern that is finally displayed on the CRT screen is created by this function, the bit data is expanded into the frame memory, and the contents of the frame memory are displayed on the CRT screen. The central processing unit issues commands to the display device, which has many of these functions, and checks the final interrupts for various orders and various statuses at the time of completion, but the final result is output to the frame memory. The bit data cannot be visually inspected by humans because output-only devices such as CRTs and printers do not have a function to read output data.

[Problem to be solved by the invention]

However, visual confirmation of the display screen is
One inspector can only inspect one device, and it takes considerable skill to judge the quality of continuously displayed patterns in a short period of time. Also, temperature.

Even in the case of long-term tests that require continuous running for more than four hours, such as frequency, vibration, and radio wave margin tests, visual confirmation is impossible and results in a lack of accuracy.

The present invention was created in view of these problems, and
The purpose of this invention is to provide a display screen confirmation method that eliminates the inefficiency of visual inspection, is effective even in long-term continuous running tests, and can be performed accurately.

[Means to solve the problem]

FIG. 1 is a diagram explaining the principle of the present invention. Means for achieving the above object in the present invention are as shown in FIG.
Bitmap display device 2 that performs heavy expansion of frame memory 2a and displays according to commands from main controller 1
This display screen confirmation method includes bit data compression means 3 for compressing bit data, and when displaying a test pattern, reads the bit data developed in the frame memory 2a, and converts the bit data into the bit data compression means 3. This is based on a display screen confirmation method in which the data is compressed using the following methods and tested by comparing it with reference compressed data 4 obtained in advance using a normal device.

[Effect]

In the present invention, as shown in FIG. 1, the main controller 1 issues a command to display a predetermined test pattern to the display device 2, and as a result, the display device w2 stores bits in the frame memory 2a through various functions. It is expanded and displayed on the display screen 2b. At this time, the bit data is read out from the frame memory 2a, divided into blocks, for example, in units of bit strings of one rask in the frame memory 2a, and compressed by the bit data compressing means 3 into, for example, about 1 byte for each bit string.

This compressed data is then compared with reference compressed data 4 held in advance. This reference compressed data 4 is compressed data obtained by the same data compression means using the same test pattern in a normal display device. As a result, the bit data in the frame memory 2a, which is the finally generated display screen data, is inspected.

The bit data compression means 3 uses, for example, CRC (Cycli
c Redundancy Check). Figure 2 shows C.
Signature analysis (sig-n) is a method of RC.
FIG. In the same figure, ■ is EOR (exclusive OR), 20~
26 is a shift register, and the arrow indicates its shift direction. In this method, a block of bit data read from the frame memory is serially inputted as (Input), and when all the data has been shifted in, the bits DO to D6 remaining in each shift register 20 to 26 are This is the signature value of the block and is compressed data. If the input data is different, the signature value will be different, and an error in the block data will be detected.

FIG. 3 is an explanatory diagram of data compression. The data shown in the figure is compressed using the signature analysis method, which is the bit data compression means described above, using 2048 bits for one raster in the frame memory consisting of 1024×2048 dots as one block. To explain the procedure, ■ Set the initial value of each shift register to all 0.
shall be.

■ Read bit data from frame memory.

■ Read out data bit by bit (Input)
Enter. Then, each register is shifted by the following process. Here, DXn- is 1 of DXn
Shows the data in the shift register before shifting.

DOn=(Input) ■D 6n-.

D1n=DOn.

D6n- of D2r+=Dln-+.

D 3n = D 2n-+ D4n=D3n--■D6n-.

D5n=D4n-+ D6n=D5n-1■D6n-.

■ When the input for l rasters (2048 bits) and the above shift operation are completed, DO to D6 of each register at that time
is retained as the signature value.

■Repeat the above processes from ■ to ■ for all rasters.

FIG. 4 is an explanatory diagram of shift processing in the above method.

In the same figure, TO~T7... shows the time series of the shift state, and '101011' is (Input)-.
When a bit data string of 00...'' is input sequentially, the data in each register (
Do to D6).

Through the above processing, 1024 signature values of each raster consisting of 7 bits are obtained, and by comparing them with signature values previously created in the same way with a normal device, it is determined whether the bits in the frame memory are correct or incorrect.

Note that there may be soft errors in the frame memory, and an inversion of about 1 dot on the actual display screen does not appear to be a problem, so determine the allowable number of discrepancies. There is a need.

In addition, signature values created with a normal device are retained as reference compressed data, but if the 1024 signature values above are viewed as bit data, they can be further compressed, reducing the signature value as compressed data. be able to.

Furthermore, in the data compression described above, in order to obtain the signature value in the horizontal direction, 64 32-bit registers are used and shift operations are performed 2048 times. This is executed for 1024 lines to obtain the signature.

With this method, the number of instruction executions is 64 x 2048 x 1024 = 134217
It becomes 728.

If this is done vertically, 7 32-bit registers will be used to read the memory 1024 times vertically, and 64
Repeat (2048Bit + 32Bit = 64) times.

With this method, the number of instruction executions is 1024 x 7 x 6
4 = 45875213421772B÷45875
2ζ292.5, which can increase the execution speed by 292 times (however, the number of repeated judgment instructions is not included, and up to 64 registers can be used).

By providing data compression means in this way, it is possible to compress the bit data in the frame memory, so it is also possible to hold reference compressed data, and the bit data in the frame memory can be checked by a program, allowing you to check the quality of the display screen. Inspections can be performed accurately without relying on the human eye. In particular, during long running tests, this can be done frequently and the time relationship of errors can be clarified.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 5 is a hardware configuration diagram of an engineering workstation that implements the present invention.

In the figure, 30 is a system processor (SP) which is a main control device, and 31 is a main storage unit (M
SU), 32 is a line controller that connects with host equipment or other engineering workstations;
33 is a file control unit (FCU), 34
35 is a floppy disk (FPD), 36 is an SP Babasu.

40 is a display device connected to the SP bus 6. In the configuration of this display device 40, 41 is a presentation processor (PP) that connects with the SP bus 6 and controls the entire display device 40.
, 42 is a memory unit (PMU) for PP, 43 is a bitmap processor (BMP), 44 is a bitmap memory (BMM) for BMP, 45 is a frame memory unit (FMU), and 1024 dots x 20.
Consists of 48 dot planes, 1 for monochrome
In the case of plain or 256 color display, it is composed of 8 branes. 46 is an image processor (IMF)
, 47 is a lookup table controller, 48 is a video input processor, 49 is a serial input adapter, 50 is a presentation processor (PP
) is a bus.

This display device 40 includes an image scanner (ISC) 60 as an external peripheral device. The display screen is CRT61. Image camera (IOA)62. A keyboard (KBD) 63 and a mouse (MUS) 64 are provided.

When manufacturing this engineering workstation, one of the tests was to create a test pattern on a CRT6.
1 to test the display function of the display device 40. Hereinafter, a display function test of the display device 40 in this embodiment will be explained.

The 5P30 sends a test pattern display command and data to the PP41 in order to display the test pattern on the display device 40. On the other hand, PP41 uses the BMP43 or IMP46 depending on the command and data.
Manipulate the characters.

Create dot patterns of figures, image data, etc. and FM
Bit data serving as a test pattern is developed in U45. The bit data in this FMU45 is transferred to the CRT61 at any time.
is read out and displayed. When the display of the test pattern is finished, PP41 makes a termination interrupt to 5P30 and presents various statuses at the time of termination. 5P30
Then, the operating status of the display device 40 is checked based on the status.

When 5P30 finishes checking various statuses by the termination interrupt from PP41, it sends FMU4 to PP41.
Instructs to read the bit data expanded in 5. The PP 41 reads bit data from the FMU 45 via the BMP 43 as shown by the broken line ■ in the figure. This readout is performed by microprogram control in the BMP 43, but as shown by ■ in the figure, a dedicated bus leading from the FMU 45 to the PP bus 50 may be provided so that the PP 41 directly reads data from the FMU 45.

In this case, the hardware increases, but the read speed becomes faster. Furthermore, bit data is read out from the FMU 45 sequentially in the vertical direction in a 32-bit width with respect to the bit array of the plane within the FMU 45, as shown in FIG.

The read bit data is sent from the PP 41 to the 5P30, and the 5P30 compresses the bit data using nine 32-bit width registers provided internally using a signature analysis method. In this data compression, two of the nine registers used are used for saving, and signature values, which are compressed data, are obtained in seven registers, but as shown in Figure 6, the plane bits in the FMU 45 are In the array, 32 bits x 1024
One signature value is obtained by treating the bit data as one block, and a total of 64 signature values are obtained. The procedure will be explained assuming that the register used is RO-R8 (R7 and R8 are save registers). In addition, ■ is EO
R (exclusive OR) operation, arrows indicate data movement.

■ Set the contents of all registers to “0”.

(2) The read bit data is sequentially treated as (input) data in units of 32 bits, and the following process (2) is performed.

■ Save to RO-R7, (Input) ■ R6-RO
Stored in.

■ Save from R1 to R8, store from R7 to R1.

■ Save in R2 → R7, R8 ■ Store in R6 → R2.

■ Save from R3 to R8, store from R7 to R3.

■ Save in R4 → R7, R8 ■ Store in R6 → R4.

■ Save from R5 to R8, store from R7 to R5.

■R8■R6→Stored in R6.

[Phase] Repeat ■～■ 1024 times, the last remaining R
Value in O-R6 (32 bits x 7 = 28 bytes
e) is stored in the MSU 31 as one signature value.

■ Repeat ~ [phase] 64 times.

The signature value of the bit data of one plane in FMU45 (32 bits x 7 x 64 = 1792b
yte) is obtained. In the case of monochrome, 1 play 1 minute,
In the case of 256 colors, signature values for 8 pres are calculated.

In the MSU 31, a signature value obtained in the same manner using a normal device is stored in advance as reference compressed data.
At 5P30, the signature value obtained by this device is compared with its reference signature value. If a comparison error occurs in this comparison, the number of mismatched bits is counted,
It is determined whether it is within the allowable value, and if it is within the allowable value, it is determined to be normal.

This allowable value is the number of bits that does not disturb the pattern on the screen displayed on the CRT 61. Normally, the bit data in the frame memory is image data on the screen, and inversion of about 1 bit does not appear to be a problem, so it is best not to have a parity bit or ECC circuit in the frame memory for bit inspection. normal and therefore
Strict accuracy is not required in the comparison of signature values, and redundancy is provided by using tolerance values. Furthermore, by giving this tolerance value from the outside through a program, the tolerance range for inspection can be adjusted.

In this way, illumination of bit data into the frame memory created as the final result by various functions in a display device was conventionally done by human visual inspection of the pattern displayed on the screen, but with this implementation. In the example, the bit data in the frame memory is read and compressed, and the confirmation can be performed within the device by comparing it with reference compressed data obtained in a normal device. Therefore, there is no need for human visual inspection, and in the case of long-term running inspections, the situation can be grasped in chronological order by periodically performing and recording inspections using a program.

In addition, in creating the signature value in the above embodiment, by reading and calculating the bit array in the frame memory in the vertical direction, the accuracy is the same as in the horizontal direction, but the calculation speed is 292 times faster. It has become.

Note that in the above embodiment, 32-bit registers are used.
Although the processing is performed in units of 2 bits, the present invention is not limited to this, and if the processing is performed in memory, the processing can be performed with variable bit width.

〔Effect of the invention〕

As explained above, according to the present invention, the bit data in the frame memory finally created in the display device can be checked within the device, thereby reducing the inefficiency of human visual inspection of the display screen. It is possible to eliminate gender.

Furthermore, in long-term running tests, the program allows regular tests and records, making it easy to grasp the temporal situation and extremely effective.

In addition, since the allowable value can be easily changed in the screen comparison judgment, the test is accurate and redundant.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram of the principle of the present invention, Fig. 2 is an explanatory diagram of data compression means, Fig. 3 is an explanatory diagram of data compression, Fig. 4 is an explanatory diagram of shift processing, and Fig. 5 is an explanatory diagram of the present invention. FIG. 6 is an explanatory diagram of data compression in the embodiment. 1; Main control device, 2.40; Display device, 2aH frame memory, 2b; Display screen, 3: Data compression means, 4; Reference compressed data, 20 to 26; Shift register, 30; System processor (sp), 31 ;Main storage unit (MStJ), 41;
Presentation processor (PP), 42; presentation memory unit (PMU), bitmap processor (BMP), bitmap memory (BMM), frame memory unit (FMU), image processor (IMP), CRT. Figure 1: Data pressure Aichi Terei is shown in Figure 2: Example 1 of rf data pressure (pressure Φyue singing) Figure 6:

Claims (1)

[Claims] The frame memory (2a) is activated by a command from the main controller (1).
This is a display screen confirmation method for a bitmap display device (2) that performs bit expansion and displays a test pattern, and is equipped with a bit data compression means (3) that compresses bit data.
The method is characterized in that the bit data expanded into is read out, the bit data is compressed by the bit data compression means (3), and an inspection is performed by comparing it with reference compressed data (4) obtained in advance with a normal device. Display screen confirmation method.