JPH02164093A - Manufacture of circuit board - Google Patents
Manufacture of circuit boardInfo
- Publication number
- JPH02164093A JPH02164093A JP31999788A JP31999788A JPH02164093A JP H02164093 A JPH02164093 A JP H02164093A JP 31999788 A JP31999788 A JP 31999788A JP 31999788 A JP31999788 A JP 31999788A JP H02164093 A JPH02164093 A JP H02164093A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- paste
- board
- conductive circuit
- spraying
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title abstract description 22
- 239000011230 binding agent Substances 0.000 claims abstract description 17
- 239000000919 ceramic Substances 0.000 claims abstract description 11
- 239000011810 insulating material Substances 0.000 claims abstract description 7
- 238000005507 spraying Methods 0.000 claims abstract description 5
- 238000007639 printing Methods 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 17
- 238000007751 thermal spraying Methods 0.000 claims description 11
- 239000002245 particle Substances 0.000 claims description 6
- 238000010304 firing Methods 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 4
- 239000011812 mixed powder Substances 0.000 abstract description 2
- 238000010285 flame spraying Methods 0.000 abstract 2
- 239000012300 argon atmosphere Substances 0.000 abstract 1
- 230000001105 regulatory effect Effects 0.000 abstract 1
- 230000001590 oxidative effect Effects 0.000 description 7
- 238000005245 sintering Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229910000831 Steel Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010891 electric arc Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
この発明は、絶縁性基板上に導電性回路パターンを有す
る回路基板の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method of manufacturing a circuit board having a conductive circuit pattern on an insulating substrate.
［従来の技術］
第２図は、例えば刊行物（「高密度実装における基板技
術」総合技術センター（株）発行）に記載された従来の
回路基板の製造方法を示すブロック図である。未焼成の
セラミックスシート即ちグリーンシート上に、導電性粒
子として銅粉末、結合剤として有機バインダーからなる
ペーストを、スクリーン印刷によりパターン形成する（
Ｉ １）、この上にグリーンシートを積層する（１２）
、回路パターンの多層化が必要な場合には、これらの工
程を必要回数繰り返す、この後、鋼の酸化を防上するた
めに、非酸化性雰囲気にて一括焼成して（１３）、回路
基板が完成する。[Prior Art] FIG. 2 is a block diagram showing a conventional circuit board manufacturing method described in, for example, a publication ("Substrate Technology for High-density Mounting" published by Sogo Gijutsu Center Co., Ltd.). A paste consisting of copper powder as conductive particles and an organic binder as a binder is patterned on an unfired ceramic sheet, that is, a green sheet, by screen printing (
I 1), laminate green sheets on top of this (12)
If multilayer circuit patterns are required, these steps are repeated as many times as necessary. After this, to prevent oxidation of the steel, the circuit board is fired in a non-oxidizing atmosphere (13). is completed.
［発明が解決しようとする課題］
従来の回路基板の製造方法は以上のようであり、有機バ
インダーの気化は、その殆どが雰囲気と高温で反応して
酸化して気化することによっているにもかかわらず、非
酸化性雰囲気で一括焼成するので、結合剤である有機バ
インダーの気化に時間がかかり製造時間が長くなる。雰
囲気の調整が厄介で、不適切であると結合剤の気化が不
十分で炭化したり、基板が膨れたり反ったりして歩留ま
りが悪い、焼結時には通常３０％前後の寸法の収縮が生
じるため、焼結後の寸法精度を出すのが厄介であるなど
の問題点があった。[Problems to be Solved by the Invention] The conventional circuit board manufacturing method is as described above, and although most of the organic binders are vaporized by reacting with the atmosphere at high temperatures, oxidizing, and vaporizing. First, since the batch firing is performed in a non-oxidizing atmosphere, it takes time to vaporize the organic binder, which is the binder, and the manufacturing time becomes longer. It is difficult to adjust the atmosphere, and if the atmosphere is improper, the binder may not be sufficiently vaporized and may become carbonized, or the substrate may swell or warp, resulting in poor yields.Dimensions usually shrink by around 30% during sintering. However, there were problems such as the difficulty of achieving dimensional accuracy after sintering.
この発明は上記のような問題点を解消するためになされ
たもので、製造時間が短縮でき、製造の管理が容易で、
しかも寸法精度の向上した歩留まりの良い回路基板の製
造方法を得ることを目的とする。This invention was made to solve the above-mentioned problems; manufacturing time can be shortened, manufacturing management is easy,
Moreover, it is an object of the present invention to obtain a method for manufacturing a circuit board with improved dimensional accuracy and high yield.
［課題を解決するための手段］
この発明に係る回路基板の製造方法は、焼結済みの絶縁
性セラミックス基板上に導電性粒子と結合剤とを含むペ
ーストを印刷してパターンを形成する工程、上記パター
ンな溶射用の熱源により焼成して導電性回路パターンを
得る工程、および上記導電性回路パターン上に絶縁性材
料を溶射して絶縁層を形成する工程を施すものである。[Means for Solving the Problems] A method for manufacturing a circuit board according to the present invention includes a step of printing a paste containing conductive particles and a binder on a sintered insulating ceramic substrate to form a pattern; A step of baking the pattern using a heat source for thermal spraying to obtain a conductive circuit pattern, and a step of thermally spraying an insulating material onto the conductive circuit pattern to form an insulating layer are performed.
［作用］
この発明における基板は既に焼結されており、絶縁層は
有機バインダーを用いずに絶縁性材料を直接溶射して形
成し、さらに、導電性回路パターンの焼成は溶射用の熱
源を利用するので、製造時間が短縮でき、製造の管理が
容易で、しかも寸法精度の向上した歩留まりの良い回路
基板の製造方法が得られる。[Function] The substrate in this invention has already been sintered, the insulating layer is formed by direct thermal spraying of an insulating material without using an organic binder, and the conductive circuit pattern is fired using a thermal spraying heat source. Therefore, it is possible to obtain a method of manufacturing a circuit board with shortened manufacturing time, easy manufacturing control, and improved dimensional accuracy and high yield.
［実施例］
以下、この発明の一実施例を図について説明する。第１
図において、（１）は例えば焼結済みのアルミナセラミ
ックスなどの絶縁性セラミックス基板、（２）は基板（
１）上にスクリーン印刷されている銅粉末と有機バイン
ダーとから成るペースト、（３）は例えばプラズマジェ
ットなどの溶射用の熱源、（４）は溶射用の熱源（３）
中に搬送されて溶融・加速されている例えばアルミナを
主成分とする粉末などの絶縁性材料、（５）は絶縁性材
料（４）が堆積して形成された溶射皮膜すなわち絶縁層
、（６）は非酸化性雰囲気に保たれているチャンバーで
ある。[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. 1st
In the figure, (1) is an insulating ceramic substrate such as sintered alumina ceramics, and (2) is a substrate (
1) a paste consisting of copper powder and an organic binder screen-printed on top; (3) a heat source for thermal spraying, such as a plasma jet; and (4) a heat source for thermal spraying (3).
(5) is a thermally sprayed coating or insulating layer formed by depositing the insulating material (4); ) is a chamber maintained in a non-oxidizing atmosphere.
次に、製造方法について説明する。焼結済みのアルミナ
セラミックス基板（１）に銅粉末と有機バインダーから
成るペースト（２ンをスクリーン印刷してパターンを形
成する１次【二、１００Ｔｏｒｒにまで減圧したアルゴ
ン雰囲気に調整されたチャンバー（６）内で、プラズマ
ジェット（３）でこのペースト（２）を焼成して導電性
回路パターンを得る。プラズマジェット（３）で焼成す
れば省工程となる６次に、プラズマジェット（３）中に
、アルミナセラミックス粉末６０％、ガラス４０％の混
合粉末（４）を搬送して溶射皮膜（５）を得る。必要に
応じてこれらの工程を繰り返せば、多層化が容易に実施
できる。これらの工程をもって完成となるが、このあと
に、非酸化性雰囲気にて焼成して、基板の均質化を図っ
てもよい、この際、基板（１）には有機バインダーを一
切含まないので、この工程で基板（１）の反りやうねり
などが発生することはなく、寸法変化も生じない。Next, the manufacturing method will be explained. A pattern is formed by screen printing a paste (2) consisting of copper powder and an organic binder on a sintered alumina ceramic substrate (1). ), the paste (2) is fired with a plasma jet (3) to obtain a conductive circuit pattern. Baking with a plasma jet (3) saves the process.6 Next, the paste (2) is fired with a plasma jet (3). , a mixed powder (4) of 60% alumina ceramic powder and 40% glass is conveyed to obtain a thermal spray coating (5). By repeating these steps as necessary, multilayering can be easily achieved. These steps After this, the substrate may be homogenized by firing in a non-oxidizing atmosphere.In this case, since the substrate (1) does not contain any organic binder, this step Warpage or waviness of the substrate (1) does not occur, and no dimensional change occurs.
なおこの発明で用いられる溶射とは、高速の熱源流（例
えばプラズマジェット等）の中に溶射剤を搬送して、溶
融・加速して基板に吹き付けて（ｓｐｒａｙ）皮膜を形
成する皮膜形成法の一種であり、他の皮膜形成法、例え
ばＣＶＤやスパッタ法と比較して、著しく皮膜形成速度
が早い、また、熱源のエネルギー密度を高めることによ
り、セラミックス等の高融点材料の皮膜形成も容易に実
施することができるものである。セラミックスの形成方
法としては、現在、焼結法が最も一般的であり、従来の
多層回路基板の製造方法もこの焼結法を利用したもので
あるが、ここで問題となるのは、未焼成のセラミックス
シート等に含まれる有機バインダーの除去である。特に
、高温で容易に酸化する鋼を配線材料とする場合には、
焼結は、非酸化性雰囲気で実施せねばならないにもかか
わらず、脱バインダーの反応は酸化反応であるため、良
好な最終焼結状態を得るには、銅の酸化防止と、有機バ
インダーの酸化とを同時に進行させねばならない、この
ため、焼結条件の管理が複雑になり、製造時間が長くな
ってしまう、ところが、溶射法による皮膜形成ではこの
ような有機バインダーを必要とせず、溶射中、粒子は溶
融した状態で飛行し、基板と衝突して凝固する。このた
め、−粒子間相互の接合は、溶着現象に基いている。ま
たさらに、皮膜の形状は下地基板の形状によって決まる
ので、その後の熱処理によっても寸法変化は生じない。The thermal spraying used in this invention is a film forming method in which a thermal spray agent is conveyed into a high-speed heat source flow (for example, a plasma jet, etc.), melted and accelerated, and then sprayed onto a substrate to form a film. It is a type of film forming method, and has a significantly faster film formation speed than other film forming methods such as CVD and sputtering.Also, by increasing the energy density of the heat source, it is easy to form films on high melting point materials such as ceramics. It is something that can be implemented. Currently, the sintering method is the most common method for forming ceramics, and the conventional manufacturing method for multilayer circuit boards also utilizes this sintering method. This is the removal of organic binders contained in ceramic sheets, etc. In particular, when the wiring material is steel, which easily oxidizes at high temperatures,
Although sintering must be carried out in a non-oxidizing atmosphere, the debinding reaction is an oxidizing reaction, so to obtain a good final sintered state, prevention of copper oxidation and oxidation of the organic binder are necessary. This makes the management of sintering conditions complicated and increases production time.However, coating formation by thermal spraying does not require such an organic binder; The particles fly in a molten state, collide with the substrate, and solidify. Therefore, the mutual bonding between particles is based on the welding phenomenon. Furthermore, since the shape of the film is determined by the shape of the underlying substrate, no dimensional change occurs even after subsequent heat treatment.
なお、上記実施例では溶射用の熱源（３）がプラズマジ
エツｉ・の場合について説明したが、これに限るのもの
ではなく、電気アークやガスやレーザ等であってもよく
、上記実施例と同様の効果を奏する。In the above embodiment, the heat source (3) for thermal spraying is a plasma jet, but it is not limited to this, and may be an electric arc, gas, laser, etc., and the same as in the above embodiment. It has the effect of
［発明の効果］
以上のように、この発明によれば、焼結済みの絶縁性セ
ラミックス基板上に導電性粒子と結合剤とを含むペース
トを印刷してパターンを形成する工程、上記パターンを
溶射用の熱源により焼成して導電性回路パターンを得る
工程、および上記導電性回路パターン上に絶縁性材料を
溶射して絶縁層を形成する工程を施すので、製造時間が
短縮でき、製造の管理が容易で、しかも寸法精度の向上
した歩留まりの良い回路基板の製造方法が得られる効果
がある。[Effects of the Invention] As described above, according to the present invention, a process of forming a pattern by printing a paste containing conductive particles and a binder on a sintered insulating ceramic substrate, and a process of thermal spraying the pattern. The process includes a process of baking the conductive circuit pattern using a conventional heat source, and a process of thermally spraying an insulating material onto the conductive circuit pattern to form an insulating layer, which shortens manufacturing time and eases manufacturing management. This has the effect of providing an easy method for manufacturing circuit boards with improved dimensional accuracy and high yield.
第１図はこの発明の一実施例による回路基板の製造方法
を示す説明図、第２図は従来の回路基板の製造方法を示
すブロック図である。
図において、＋１）は焼結済みの絶縁性セラミックス基
板、（２）はペースト、（３）は溶射用の熱源（４）は
絶縁性材料、（５）は絶縁層、（６）はチャンバーであ
る。FIG. 1 is an explanatory diagram showing a method for manufacturing a circuit board according to an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional method for manufacturing a circuit board. In the figure, +1) is a sintered insulating ceramic substrate, (2) is a paste, (3) is a heat source for thermal spraying, (4) is an insulating material, (5) is an insulating layer, and (6) is a chamber. be.
Claims (1)
子と結合剤とを含むペーストを印刷してパターンを形成
する工程、上記パターンを溶射用の熱源により焼成して
導電性回路パターンを得る工程、および上記導電性回路
パターン上に絶縁性材料を溶射して絶縁層を形成する工
程を施す回路基板の製造方法。(1) A process of printing a paste containing conductive particles and a binder on a sintered insulating ceramic substrate to form a pattern, and firing the pattern with a heat source for thermal spraying to obtain a conductive circuit pattern. and a step of thermally spraying an insulating material onto the conductive circuit pattern to form an insulating layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31999788A JPH02164093A (en) | 1988-12-19 | 1988-12-19 | Manufacture of circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31999788A JPH02164093A (en) | 1988-12-19 | 1988-12-19 | Manufacture of circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02164093A true JPH02164093A (en) | 1990-06-25 |
Family
ID=18116597
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31999788A Pending JPH02164093A (en) | 1988-12-19 | 1988-12-19 | Manufacture of circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02164093A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04233787A (en) * | 1990-12-28 | 1992-08-21 | Mitsubishi Materials Corp | Multilayer printed circuit board |
| EP2050319A1 (en) * | 2006-07-21 | 2009-04-22 | Valtion Teknillinen Tutkimuskeskus | Method for manufacturing conductors and semiconductors |
| JP2009111387A (en) * | 2007-10-26 | 2009-05-21 | Samsung Techwin Co Ltd | Method of manufacturing printed circuit board, and printed circuit board manufactured by the same |
| EP2245913A1 (en) * | 2008-01-22 | 2010-11-03 | Valtion Teknillinen Tutkimuskeskus | Method for arranging cooling for a component and a cooling element |
-
1988
- 1988-12-19 JP JP31999788A patent/JPH02164093A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04233787A (en) * | 1990-12-28 | 1992-08-21 | Mitsubishi Materials Corp | Multilayer printed circuit board |
| EP2050319A1 (en) * | 2006-07-21 | 2009-04-22 | Valtion Teknillinen Tutkimuskeskus | Method for manufacturing conductors and semiconductors |
| EP2050319A4 (en) * | 2006-07-21 | 2010-12-08 | Valtion Teknillinen | Method for manufacturing conductors and semiconductors |
| JP2009111387A (en) * | 2007-10-26 | 2009-05-21 | Samsung Techwin Co Ltd | Method of manufacturing printed circuit board, and printed circuit board manufactured by the same |
| JP4705143B2 (en) * | 2007-10-26 | 2011-06-22 | 三星テクウィン株式会社 | Method for manufacturing printed circuit board |
| US8122599B2 (en) | 2007-10-26 | 2012-02-28 | Samsung Techwin Co., Ltd. | Method of manufacturing a printed circuit board (PCB) |
| EP2245913A1 (en) * | 2008-01-22 | 2010-11-03 | Valtion Teknillinen Tutkimuskeskus | Method for arranging cooling for a component and a cooling element |
| EP2245913A4 (en) * | 2008-01-22 | 2011-01-26 | Valtion Teknillinen | Method for arranging cooling for a component and a cooling element |
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