JPH021607A - Insulating input/output device - Google Patents
Insulating input/output deviceInfo
- Publication number
- JPH021607A JPH021607A JP1057490A JP5749089A JPH021607A JP H021607 A JPH021607 A JP H021607A JP 1057490 A JP1057490 A JP 1057490A JP 5749089 A JP5749089 A JP 5749089A JP H021607 A JPH021607 A JP H021607A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- cycle
- secondary winding
- winding
- secondary side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004804 winding Methods 0.000 claims description 32
- 230000001105 regulatory effect Effects 0.000 claims description 5
- 230000002401 inhibitory effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Landscapes
- Electronic Switches (AREA)
Abstract
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明はマイクロ・コンピュータ等から与えられる状態
信号を絶縁して伝達しトランジスタ・スッチ等の制御素
子を駆動する為の絶縁型入出力装置に関する。[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to an isolated input/output device for insulating and transmitting status signals given from a microcomputer, etc., and driving control elements such as transistors and switches. .
〈従来の技術〉
マイクロ・コンピュータ等からの状態信号を絶縁して伝
達する場合、例えば、巻線比率が1=1の変生器を使い
、1次側に与えられた状態信号を2次側に絶縁して伝達
し、2次側に設けられたトランジスタ・スイッチ等の制
御素子をドライブする方法がとられる。このような方法
では2次側に発生する電圧は1次側に加えられた電圧値
に規制されるため、パワーF E T等スレショルド電
圧が大きな制御素子をドライブする場合に制約があった
。<Prior art> When transmitting status signals from a microcomputer etc. in an insulated manner, for example, a transformer with a winding ratio of 1=1 is used to transmit the status signal given to the primary side to the secondary side. A method is adopted in which the signal is transmitted insulated to drive control elements such as transistors and switches provided on the secondary side. In such a method, since the voltage generated on the secondary side is regulated by the voltage value applied to the primary side, there are restrictions when driving a control element with a large threshold voltage, such as a power FET.
〈発明が解決しようとする課題〉
本発明が解決しようとする技術的課題は、1次巻線、2
次巻線を有し、1次巻線に状g信号を入力し、2次側に
伝達される電圧によって制御素子をドライブする絶縁型
入出力装置において、2次側に1次側に加えられた電圧
値に規制されない電圧を発生させ、前記制御素子がパワ
ーF E T等スレショルド電圧が大きな制御素子でも
確実に駆動できるようにすることにある。<Problem to be solved by the invention> The technical problem to be solved by the present invention is to
In an isolated input/output device that has a secondary winding, inputs a state g signal to the primary winding, and drives a control element by the voltage transmitted to the secondary side, the voltage applied to the primary side is applied to the secondary side. The purpose of the present invention is to generate a voltage that is not regulated by a voltage value, so that the control element can reliably drive even a control element with a large threshold voltage, such as a power FET.
〈問題点を解決するための手段〉
本発明の構成は、1次巻線、2次巻線を有する相互イン
タフタンス手段と、外部から加えられる状態信号によっ
て前記1次巻線を電圧印加サイクルと開放サイクルとに
切換える第1のスイッチ手段と、前記2次巻線に接続さ
れ、前記電圧印加サイクルにおいて2次側の通電を禁止
する第2のスイッチ手段と、前記2次巻線に接続され、
前記1次巻線か開放サイクルのとき前記2次巻線に誘導
される電圧によって駆動されるスイッチ制御素子とを具
備し、前記2次巻線に誘導される前記状態信号レベルに
規制されない電圧に基づき前記制御素子を駆動するよう
にしたことにある。<Means for Solving the Problems> The configuration of the present invention includes mutual interface means having a primary winding and a secondary winding, and a state signal applied from the outside to cause the primary winding to undergo a voltage application cycle. a first switch means that switches to an open cycle; a second switch means that is connected to the secondary winding and prohibits energization of the secondary side during the voltage application cycle; and a second switch means that is connected to the secondary winding;
a switch control element driven by a voltage induced in the secondary winding when the primary winding is in an open cycle; According to the present invention, the control element is driven based on the above-described structure.
く作用〉
前記の技術手段は次のように作用する。即ち、1次側の
電圧印加サイクルにおいて2次側の通電を禁止する。開
放サイクルのとき2次巻線には1次側に加えられた電圧
値に規制されない大きな電圧が発生する。この電圧を利
用すればパワーFE′r゛等スレショルド電圧が大きな
前記制御素子をドライブすることが可能となる。Function> The above technical means works as follows. That is, energization of the secondary side is prohibited during the voltage application cycle of the primary side. During an open cycle, a large voltage is generated in the secondary winding that is not regulated by the voltage value applied to the primary side. By using this voltage, it becomes possible to drive the control element having a large threshold voltage, such as the power FE'r'.
〈実施例〉
第1図は本発明実施例装置の回路図、第2図は本発明の
他の実施例装置の部分を示す回路図である。■は1次巻
線L1,2次巻線L 2より構成された相互インダクタ
ンス手段としての変成器で、例えば1次、2次の巻線比
が1:1の単純セパレーションタイプのものか用いられ
る。1.2は2次側に設けられた端子で、線路W 1
、 W 2を介し2次巻線[72の両端に接続されてい
る。端子1゜2間には負荷Rdsと直流電源VSの直列
回路が接続されている。1次巻線L]の一端は電源子V
に接続され、他端は、例えば1”]゛LオLオープンコ
レクいて構成されたスイッチSW2に接続されている。<Embodiment> FIG. 1 is a circuit diagram of an apparatus according to an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a portion of an apparatus according to another embodiment of the invention. 3 is a transformer as a mutual inductance means consisting of a primary winding L1 and a secondary winding L2; for example, a simple separation type with a 1:1 winding ratio between the primary and secondary windings is used. . 1.2 is a terminal provided on the secondary side, and the line W 1
, W2 are connected to both ends of the secondary winding [72. A series circuit of a load Rds and a DC power supply VS is connected between terminals 1 and 2. One end of the primary winding L is connected to the power supply V
The other end is connected to a switch SW2 configured as, for example, a 1'' L-O-L open collector.
このスイッチにはマイクロ・コンピュタ等からパルス状
の状態信号epが加えられオン・オフする。同じく1次
側に接続されたコンデンサ30並びに抵抗R30はフィ
ルタを構成する。A pulse-like status signal ep is applied to this switch from a microcomputer or the like to turn it on and off. A capacitor 30 and a resistor R30, which are also connected to the primary side, constitute a filter.
D20は2次側に接続されたダイオードで1次巻線L
1への電圧印加サイクルにおける2次側の通電を禁止す
るスイッチ手段として作用する。同じく2次側に接続さ
れた抵抗R20,及びコンデンサC20はフィルタ回路
を構成する。Q20は、コレクタ、エミッタか入力端子
1.2間に接続され、ベースが抵抗R20とR21との
接続点に接続された1−ランジスタである。このトラン
ジスタのコレクタとダイオードD20側との間にはサー
ジ電圧吸収用のツェナダイオードD 21が接続されて
いる。D20 is a diode connected to the secondary side of the primary winding L.
It acts as a switch means for prohibiting energization of the secondary side during a voltage application cycle to 1. A resistor R20 and a capacitor C20, which are also connected to the secondary side, constitute a filter circuit. Q20 is a 1-transistor whose collector and emitter are connected between input terminals 1 and 2, and whose base is connected to the connection point between resistors R20 and R21. A Zener diode D21 for absorbing surge voltage is connected between the collector of this transistor and the diode D20 side.
このような構成で、スイッチSW2にパルス状の状態信
号epか加えられると、これによって1次巻1!Llは
電圧印加サイクルと開放サイクルとに切換えられる。1
次巻線I、1が電圧印加サイクルのとき2次巻線し、2
のタイオードD20によって2次側の通電は禁止される
。1次巻線L1か開放サイクルのとき2次巻線L 2に
はフライバック原理により、はとんど制限のない大きな
電圧が誘導される。この電圧は分圧抵抗R20,R21
を介しトランジスタQ20のベースに加えられ、これに
より例えばIA程度のコレクタ電流を制御することが可
能となる。With this configuration, when a pulsed state signal ep is applied to the switch SW2, this causes the primary winding 1! Ll is switched between a voltage application cycle and an open cycle. 1
The secondary winding I, 1 is the secondary winding when the voltage application cycle, 2
energization of the secondary side is prohibited by the diode D20. When the primary winding L1 is in an open cycle, a large, almost unlimited voltage is induced in the secondary winding L2 due to the flyback principle. This voltage is applied to voltage dividing resistors R20 and R21
The current is applied to the base of the transistor Q20 through the transistor Q20, thereby making it possible to control a collector current of about IA, for example.
第2図に示すように、バイポーラトランジスタに比べて
スレショルド電圧が5V等のように、はるかに高いパワ
ーFETQ21を用いる場合であっても、充分なゲート
バイアスを得ることができる。As shown in FIG. 2, even when using a much higher power FET Q21, such as a threshold voltage of 5 V, compared to a bipolar transistor, a sufficient gate bias can be obtained.
〈発明の効果〉
本発明によれば、コンピュータ等から1次側に与えられ
た状態信号を2次側に絶縁して伝送され、2次側に発生
する電圧は1次側に加えられた電圧値に規制されない大
きな電圧のためパワーFET等スレショルド電圧が大き
な制御素子であっても確実にドライブすることができる
。<Effects of the Invention> According to the present invention, a status signal given to the primary side from a computer etc. is transmitted to the secondary side insulated, and the voltage generated on the secondary side is equal to the voltage applied to the primary side. Because of the large voltage that is not regulated by a value, even control elements with large threshold voltages, such as power FETs, can be reliably driven.
第1図は本発明実施例装置の回路図、第2図は本発明の
池の実施例装置の部分を示す回路図である。
■・・・変成器、Ll・・・1次巻線、L2・・・2次
巻線、D20・・・スイッチ手段、SW2・・・スイッ
チ、Q20・・・トランジスタ、Q21・・・パワーF
ET、Rd・・・負荷、ep・・・状態信号FIG. 1 is a circuit diagram of an apparatus according to an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a portion of an apparatus according to an embodiment of the present invention. ■...Transformer, Ll...Primary winding, L2...Secondary winding, D20...Switch means, SW2...Switch, Q20...Transistor, Q21...Power F
ET, Rd...Load, ep...Status signal
Claims (1)
と、外部から加えられる状態信号によって前記1次巻線
を電圧印加サイクルと開放サイクルとに切換える第1の
スイッチ手段と、前記2次巻線に接続され、前記電圧印
加サイクルにおいて2次側の通電を禁止する第2のスイ
ッチ手段と、前記2次巻線に接続され、前記1次巻線が
開放サイクルのとき前記2次巻線に誘導される電圧によ
って駆動されるスイッチ制御素子とを具備し、前記2次
巻線に誘導される前記状態信号レベルに規制されない電
圧に基づき前記制御素子を駆動するようにしたことを特
徴とする絶縁型入出力装置。mutual inductance means having a primary winding and a secondary winding; first switch means for switching the primary winding between a voltage application cycle and an open cycle according to a state signal applied from the outside; and the secondary winding. a second switch means connected to the secondary winding for inhibiting energization of the secondary side during the voltage application cycle; and a switch control element driven by a voltage induced in the secondary winding, and the control element is driven based on a voltage not regulated by the state signal level induced in the secondary winding. Input/output device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1057490A JPH021607A (en) | 1989-03-09 | 1989-03-09 | Insulating input/output device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1057490A JPH021607A (en) | 1989-03-09 | 1989-03-09 | Insulating input/output device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15258784A Division JPS6130962A (en) | 1984-07-23 | 1984-07-23 | Insulated input/output device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH021607A true JPH021607A (en) | 1990-01-05 |
Family
ID=13057162
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1057490A Pending JPH021607A (en) | 1989-03-09 | 1989-03-09 | Insulating input/output device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH021607A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5899029A (en) * | 1981-12-08 | 1983-06-13 | Matsushita Electric Ind Co Ltd | Controller |
-
1989
- 1989-03-09 JP JP1057490A patent/JPH021607A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5899029A (en) * | 1981-12-08 | 1983-06-13 | Matsushita Electric Ind Co Ltd | Controller |
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