JPH0215705A - Current mirror circuit - Google Patents

Abstract

PURPOSE:To obtain the same electric current as an input current at an output terminal by compensating at least base currents of the 1st and 2nd transistors with an inverted current proportional to the base current of the transistor. CONSTITUTION:A base current ib4 which is almost the same as the base current ib3 of a transistor Q3 flows to the base of a transistor Q4 and is inputted to an inverted current generation circuit 2. The electric current which tends to flow to an input terminal IIN through the diode connecting section of a transistor Q1 is equal to an electric current which is three times as large as the base current of the transistor Q1. Moreover, since an electric current which is three time as large as the base current ib1 is forcibly made to flow to the collector of the transistor Q6 of the circuit 2, no base current flows to the input terminal IIN. Therefore, an electric current i2 which is equal to the electric current inputted to the input terminal IIN is obtained from an output terminal IOUT and the potential difference between the input terminal IIN and a supply voltage +VCC becomes the forward voltage across the base and emitter of the transistor Q1 only when a voltage drop caused by a resistance R1 is ignored.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a current mirror circuit, and more particularly to a current mirror in which there is no error in the proportional relationship between an input terminal and an output current.

[Summary of the invention]

The present invention detects the emitter-collector current of the second transistor in a current mirror circuit formed by interconnecting the base of a diode-connected first transistor and the base of a second transistor having an output terminal. , by compensating at least the base currents of the first and second transistors by inverting and generating a current proportional to the base current of the second transistor, the proportional relationship between the input and output currents is reduced. To provide a current mirror circuit that has no error and can increase the operating voltage of an input current source circuit.

[Conventional technology]

As shown in FIG. 6, the conventional current mirror circuit consists of a diode-connected base of a transistor Q41 and a transistor Q4 whose collector is connected to an output terminal OUT.
The bases of the transistors Q41 and Q42 are connected to each other, the emitters of the transistors Q41 and Q42 are connected to the power supply terminal Voc through the resistors R41 and R42, respectively, and the input terminal IIN is connected to the input terminal IIN connected to the collector of the transistor Q41. When the current is is supplied by the source 8, the resistance R
A device is known in which an output current of 1 g corresponding to the resistance ratio of R41 and R42 is obtained at the output terminal IoU□.

For example, if the resistance values of resistors R41 and R42 are made equal, the output current i becomes approximately equal to the input current 18.

However, the base current 1b4I of transistor Q41 and the base current ib4 of transistor Q42! Since the sum of the currents flows to the input terminal 'IN, the input current 18 is actually the collector current iC4+ of the transistor Q41 and the base current 1
The output current 18 is the sum of the first
Since the collector current 1c4 l of the transistor Q41 is equal to the base current 1b41 and 1b4 from the input current is.
The current value becomes smaller by the sum of t.

The base current of a transistor is the β-
1, but especially the lateral PN
When a P-junction transistor is used, since the current amplification factor β is small, the influence of the base currents 1b4I and ib4° of transistors Q41 and Q42 becomes large, and the proportional relationship between the input current i and the output current i deviates greatly. Furthermore, when the resistance values of the resistors R41 and R42 are equal, there is a drawback that the difference between the input current 18 and the output current 19 becomes large.

Therefore, as shown in FIG. 7, the value of the base current flowing to the input terminal IH can be reduced by a circuit in which an hfe canceling transistor is inserted between the base and collector of the transistor Q43, as disclosed in US Pat. 566.
No. 289.

This circuit has a feedback transistor Q45 inserted in the diode connection path of transistor Q43, so
The emitter of transistor Q45 is connected to transistor Q43.
and the base of transistor Q44, the base of transistor Q45 is connected to the collector of transistor Q43, and the collector of transistor Q45 is grounded. This transistor Q45 allows transistors Q43 and Q4 to
The sum of the base currents 1b43 and 1b44 of 4 is further β
-1, the base current 1b4s can be ignored with respect to the collector current 1c43 of the transistor Q43. Therefore, the output current i, which is substantially equal to the input current 1111, is at the output terminal I. It is obtained from U.

[Problem that the invention seeks to solve]

However, in the circuit configured as shown in FIG. 7, the input terminal I- potential is lower than the potential of the input terminal of the circuit shown in FIG. 6 by the base-emitter voltage of the transistor Q45. . In recent years, the power supply voltage +■oo of integrated circuits has been increased in consideration of power saving, long life, etc.
Although it is often operated at a low voltage of about 5V or lower, the forward voltage between the base and emitter of a silicon transistor is generally about 0.7V, so the potential of the input terminal is determined by the resistor R43. Even if you ignore the voltage drop, it will drop to about 3.6V. Therefore, there is a problem in that the actual operating power supply voltage of the circuit of the input current source 110 is reduced, resulting in a very small dynamic range. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a current mirror circuit that is not affected by the base current of a transistor, can obtain an output current proportional to the input current, and does not reduce the dynamic range of the input terminal source circuit. do.

[Means to solve the problem]

In order to solve the above-mentioned problems and achieve the above-mentioned objects, a current mirror circuit according to the present invention has a diode-connected base of a first transistor and a second transistor whose collector is connected to an output terminal. detecting the emitter-collector current of a second transistor in a current mirror circuit in which the bases are interconnected and the emitters of the respective transistors are connected to a power supply terminal via a resistor;
a current detection circuit that generates a current 71E proportional to the base current of the second transistor; and an inverted current generation circuit that generates a current proportional to the current obtained by the current detection circuit; The base current of the second transistor is compensated by the proportional current generated by the inversion current generation circuit.

[Effect]

In the current mirror circuit according to the present invention configured in this way, when an input current is supplied to the first transistor, a voltage drop occurs across the emitter resistance, and this voltage and the base-emitter voltage of the first transistor Since the sum of the voltages is applied across the base and emitter resistors of the second transistor, the collector current of the second transistor flows. The emitter-collector current of the second transistor is detected by a current detection circuit to generate a current proportional to the base current of the second transistor and input to the inversion current generation circuit. In the inversion current generation circuit, a current proportional to the current generated by the current detection circuit is generated, and the first
and from the base of the second transistor. Therefore, the base currents of the first and second transistors can be compensated by making the current generated by the inversion current generation circuit equal to the current that is about to flow from the bases of the first and second transistors to the input terminals. This results in an output current proportional to the input current.

〔Example〕

FIG. 1 shows an example of a current mirror circuit according to the present invention. The collector of the diode-connected first transistor Ql is connected to the input terminal IIN, and the emitter is connected to the power supply terminal +Vcc via a resistor R1. Transistor Ql
The base of Q2 is interconnected with the base of the second transistor Q2. The emitter of the second transistor Q2 is connected to the resistor R2
The collector is connected to the output terminal 'OUT.

The base of the transistor Q3 that constitutes the current detection circuit l is connected to the base of the second transistor Q2, the emitter is connected to the power supply terminal +Vcc via the resistor R3, and the collector constitutes the current detection circuit l together with the transistor Q3. Connected to the emitter of transistor Q4. The collector of transistor Q4 is grounded, and the base is connected to inversion current generation circuit 2.
It is connected to the collector of transistor Q5 that constitutes the transistor Q5. The transistors Ql, Q2, Q3, and Q4 are transistors of the same polarity, and it is desirable to use transistors with uniform characteristics. A PNP junction transistor is used here. Note that if a plurality of transistors are configured in the same IC in terms of design, transistors with substantially uniform characteristics can be obtained.

In the inversion current generation circuit 2, the transistor Q5 is diode-connected, and its emitter is grounded via a resistor R5.
The base interconnects to the base of transistor Q6. The emitter of transistor Q6 is grounded via resistor R6,
The collector is connected to the bases of the first to third transistors Ql to Q3. Transistors Q5 and Q6 are of the same polarity.

In the current mirror circuit configured in this way, when the resistors R1, R2, and R3 have the same resistance value, when the input current source 11 supplies the input current i to the input terminal lIN, the resistors R1 and R2 have the same resistance value. Since the base-emitter voltages of transistors Ql and Q2 are also equal, a current i, which is equal to the collector current ic1 of transistor Ql, flows through the collector of transistor Q2, and the output terminal I
. Supplied to U□. Furthermore, transistors Ql and Q2
Since transistors having substantially the same characteristics are used, the current amplification factors β are substantially equal, and therefore the base currents ib1 and ib of the respective transistors are equal.

Transistor Q3 of current detection circuit 1 is transistor Q
Since it has the same configuration as 2, a collector current equal to the current i is obtained, and as a result, a base current i equal to the current ib,
b3 is obtained. The collector current of transistor Q3 is
A base current ib4 is supplied to the emitter of the transistor Q4, but since the emitter current and collector current of a transistor are generally approximately equal, a base current ib4 that is approximately equal to the base current ib3 of the transistor Q3 is supplied to the base of the transistor Q4.
flows and is input to the inversion current generation circuit 2.

The inversion current generation circuit 2 is configured by a current mirror circuit using an NPN junction transistor, and R5/R of the current ib4 input to the collector of the transistor Q5.
Six times as much current can flow through the collector of transistor Q6. If the resistor R6 is set to ⅓ times the resistor R5, a current three times the current 1b4, that is, approximately three times the current +b+, flows through the collector of the transistor Q6.

By the way, the current flowing to the input terminal IN through the diode connection of the transistor Ql is the sum of the base currents ib, , iby and tb3 of the transistors QISQ2 and Q3, but since +b+5ibt and tbs are equal to each other, , ib+ is equal to three times the current. However, since a current three times as large as ib is forced to flow through the collector of the transistor Q6 of the inversion current generating circuit 2, it is possible to compensate for the base current that tends to flow to the input terminal 'IN. In other words, no base current flows through the input terminal 'IN.

Therefore, the ? input to the input terminal IIN? i t&i+
A current i equal to h is the output terminal ■. Further, the potential difference between the input terminal I and the power supply voltage +Voo is only the forward voltage between the base and emitter of the transistor Ql, if the voltage drop due to the resistor N R1 is ignored.

Therefore, a relatively large voltage can be obtained as the actual operating power supply for the circuit of the input current source 11, so that a dynamic range can be ensured.

Next, an application example using the current mirror circuit according to the present invention will be described.

FIG. 2 is a block diagram showing the overall configuration.

The input signal input to the input terminal IN is amplified by the gain control circuit 3 and output from the output terminal 011T.

The amplified signal is detected by a detection circuit 4, then compared with a reference voltage VRer by a comparison circuit 5, and an error signal is input to a control signal generation circuit 6. The control signal generation circuit 6 generates a control signal in stages according to the level of the input error signal, feeds it back to the gain control circuit 3 via the current mirror circuit according to the present invention, and generates the control signal in the detection circuit 4. The gain of the gain control circuit 3 is controlled so that the output level of the voltage VRef becomes equal to the voltage VRef.

FIG. 3 shows a specific example of the gain control circuit in FIG. 2.

Input signal E is connected to the bases of transistors Q7 and Q9 so as to be input in opposite phases to each other. transistor Q7
and Q8, and transistors Q9 and QIO are connected to each other so as to configure a differential amplifier. The collectors of transistors Q8 and QlO are connected to transistor Q, respectively.
ll and the base of Q12, and the transistor Q11
The emitters of Q12 and Q12 are connected to the bases of transistors Q8 and QIO, respectively. This is U.S. Patent No. 2,
761,916, the base potential of transistor Q7;
Feedback is applied so that the base potential of transistor Q8 is always equal. Since the base-emitter voltage of the transistor Qll has a temperature characteristic, when an input signal is applied directly to the base of the transistor Qll,
Temperature changes have a greater effect on subsequent circuits. Therefore, voltage fluctuations due to temperature changes are stabilized by being fed back via the emitter follower transistor Qll. The same applies to the circuit constituted by transistors Q9, QIO, and Q12.

Also, since this circuit has a very small output impedance, the emitter differential resistances re++ and re+t (not shown) of the transistors Q11 and Q10 are replaced by the emitter resistance RE.
can be made very small.

The emitter of transistor Qll is connected to the emitter of transistor Q12 via a resistor RE, forming a differential amplifier. Output terminal AGCo from this differential amplifier
The circuit leading to lI□ is a gain control circuit as disclosed in U.S. Pat.
and Q10 are manually operated in opposite phases to each other. The collectors of transistors Q11 and Q10 are connected to the emitters of transistors Q13 and Q10, respectively. The collectors of transistors Q13 and Q14 are connected to the power supply terminal +vc
Since the transistors QI3 and Q10 operate as diode loads, the transistors QI3 and Q10 operate as diode loads. Furthermore, transistors Qll and Q
The collectors of No. 12 are connected to the bases of transistors Q17 and Q18 constituting the second differential amplifier via emitter follower transistors QI5 and Q16, respectively.

The collector of transistor Q18 is connected to the output terminal AGCOU.
Connect to T.

Therefore, the logarithmically converted voltage obtained at the emitters of transistors Q13 and Q14 is supplied to the bases of transistors Q+7 and Q18, and is outputted to the output terminal A G Cour via the second differential amplifier.

In the gain control circuit configured in this way, the current ratio of the current i flowing through the current source 13 that controls the second differential amplifier and the current i that controls the first differential amplifier is 13/15.
The gain can be controlled by

In FIG. 3, the current i3 from the current source 13 is a constant current, and the first differential amplifier is configured to be controlled by the control signal current obtained from the control signal generation circuit 6 in FIG. The control signal current i4 input to the terminal C0NTIN flows through the diode-connected transistor Q.
19 collectors. Since the transistor Q19 and the transistors Q20 and Q21 constitute a current mirror circuit, if the resistors R20 and 21 are made equal, the collectors of the transistors Q20 and Q21 will have a current i proportional to the collector current i4 of the transistor Q19.
flows. Therefore, the current i corresponding to the control signal current i4
The gain of the entire gain control circuit is determined by .

By the way, in order to increase the gain of the gain control circuit,
It is sufficient to reduce the current i and increase the emitter differential resistances re+3 and re+4 (not shown) of the transistors Q13 and Q14 as diode loads. When the control current is reduced, the transistor Ql! And the emitter differential resistance r13++ and relt of Q12 become large and try to prevent the gain from increasing, but as mentioned above,
Since the emitters of transistors Qll and Q12 are fed back to the bases of transistors Q8 and Q10, emitter differential resistances re++ and relt are sufficiently small and have no effect on gain.

Next, FIG. 4 shows a specific example of the control signal generation circuit 6 in FIG. 2. An input terminal ERRIN to which the error signal obtained by the comparator circuit 5 in FIG. 2 is input is connected to the bases of transistors Q22, Q25, and Q28. Transistor Q22 and transistor Q23 constitute a differential amplifier, and the voltage at point B is applied to the base of transistor Q23 via emitter follower transistor Q24. Therefore, when the input voltage applied to the base of transistor Q22 is greater than the voltage applied to the base of transistor Q23, current flows to the collector of transistor Q22.

Transistors Q25, Q26, Q27 and transistors Q28, Q29, Q30 are similarly configured. A voltage at point 0 is applied to the base of transistor Q26 via emitter follower transistor Q27, and a voltage at point D is applied to the base of transistor Q29 via emitter follower transistor Q30. Power terminal +V
Resistors R30, R27, R24 and R between co and ground
22 are connected in series, and a reference voltage is set by a voltage divided by resistance. That is, voltage is supplied to the base of transistor Q30 from the common connection point C of resistors R30 and R27, voltage is supplied to the base of transistor Q27 from the common connection point C of resistors R27 and R24, and voltage is supplied to the base of transistor Q27 from the common connection point C of resistors R27 and R24.
From the common connection point B of 24 and R22, the transistor Q24
A reference voltage is supplied to the base of the Therefore, if the input signal voltage is greater than the potential at point B, transistor Q22
is activated, and when the potential is higher than the potential of point 0, which is higher than point B, transistors Q22 and Q25 are activated;
22, Q25 and Q2B are activated.

When the input voltage is lower than the potential at point B, transistors Q22, Q25, and Q28 do not operate, but by controlling the current l of variable current source I7, current always flows to point A.

The input terminal of the current mirror circuit according to the present invention is connected to point A. The base of the diode-connected first transistor Q31, the base of the second transistor Q32 whose collector is connected to the output terminal, and the transistor Q3.
Interconnect the bases of 3. The emitter of each transistor is connected to the power supply terminal Vcc via resistors R31, R32, and R33, respectively, and the emitter of each transistor is
The collector of Q34 is grounded via the emitter-collector of transistor Q34. )・The base of transistor Q34 is the collector emitter of transistor Q35 and the resistor R
35 to ground. Transistor Q35 is diode-connected, and its base is interconnected with the base of transistor Q36. The emitter of transistor Q36 is connected to resistor R3.
6 and the collector is connected to the first transistor Q3.
Connect to the base of 1.

If the transistors Q31, Q32, Q33, Q34 and the transistors Q35, Q36 have the same polarity, the resistors R31, R32, and R33 are made equal, and the resistor R36 is set to 1/3 times the resistor R35, then the first
The base current flowing into point A can be compensated for from the diode connection formed by transistor Q31. Therefore, a current equal to the current flowing at point A is output terminal C.
In the control signal generation circuit configured as described above,
When error signal "IN" is input to input terminal ERR, transistor Q2
2. Since Q25 and Q28 operate in stages, the relationship between the current i6 flowing through point A and the input voltage V + Nh is as follows:
The result will be as shown in the figure. Therefore, a current i4 equal to the current ill corresponding to the input signal voltage level is obtained at the output terminal C0NTo, □ via the current mirror circuit. The output current i4 is the CON T of the gain control circuit shown in FIG.
It is manually input to IN as a control signal.

Incidentally, in order to quickly converge the operation of the AGC loop shown in FIG. 2, it is desirable that the error signal input to the input terminals ERR, ., have as large an amplitude as possible. However, when the amplitude is increased, if the dynamic range of the transistors Q22, Q25, and Q28 is small, the current flowing into the collector of each transistor is saturated and turns 1°, resulting in a disadvantage that the degree of amplification becomes small. Therefore, the conventional current mirror circuit as shown in FIG. 7 cannot be used. However, by using the current mirror circuit according to the present invention, it is possible to prevent the dynamic range of the transistor on the input side from decreasing.
22, Q25 and Q28 operate normally.

〔Effect of the invention〕

As is clear from the above description, according to the current mirror circuit according to the present invention, the base of the diode-connected first transistor and the base of the second transistor whose collector is connected to the output terminal are interconnected. In the current mirror circuit, the emitter-collector current of the second transistor is detected, a current proportional to the base current of the second transistor is generated, and an inversion current proportional to this current is used to detect at least the first and second transistors. To compensate for the base current of the transistor, a current equal to the input current is available at the output terminal.

Furthermore, since there is no need to stack two transistors, the dynamic range of the input terminal source circuit does not deteriorate.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of a current mirror circuit according to the present invention, FIG. 2 is a block diagram showing the entire configuration of an application example using the current mirror circuit according to the present invention, and FIG. 3 is a diagram showing an example of the current mirror circuit according to the present invention. FIG. 4 is a diagram showing a specific example of the gain control circuit in FIG. 2, FIG. 5 is a diagram showing a specific example of the control signal generation circuit in FIG. 2, and FIG. FIG. 6 is a diagram showing a conventional current mirror circuit, and FIG. 7 is a diagram showing a conventional improved current mirror circuit. l......Current detection circuit 2...
...Reverse current generation circuit Q...
・・Transistor R・・・・・・・・・・Resistance■・・・・・・・・・・・・Current source (JIJ'1 Error signal voltage VIN

Claims (1)

[Claims] A base of a diode-connected first transistor;
In a current mirror circuit formed by interconnecting the bases of second transistors whose collectors are connected to the output terminal, the emitter-collector current of the second transistor is detected, and a current proportional to the base current of the second transistor is generated. a current detection circuit that generates a current, and an inversion current generation circuit that generates a current proportional to the current obtained by the current detection circuit, and at least the base current of the first and second transistors is generated by the inversion current generation circuit. A current mirror circuit characterized by compensation using the proportional current generated by the circuit.