JPH0215635A - Semiconductor device and its manufacture - Google Patents

Semiconductor device and its manufacture

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Publication number
JPH0215635A
JPH0215635A JP63165247A JP16524788A JPH0215635A JP H0215635 A JPH0215635 A JP H0215635A JP 63165247 A JP63165247 A JP 63165247A JP 16524788 A JP16524788 A JP 16524788A JP H0215635 A JPH0215635 A JP H0215635A
Authority
JP
Japan
Prior art keywords
metal
substrate
film
bump
bumps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63165247A
Other languages
Japanese (ja)
Inventor
Hajime Sudo
須藤 元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP63165247A priority Critical patent/JPH0215635A/en
Publication of JPH0215635A publication Critical patent/JPH0215635A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To make it possible to bond easily fellow metal bumps even if a high compressive force is not applied to the bumps for a long time by a method wherein the point part of the metal bump, which is provided on a semiconductor substrate on one side, is formed into a sharpened form. CONSTITUTION:An N-type layer 22 is formed on a mercury.cadmium.tellurium (Hg1-xCdxTe) substrate 21, which is a compound semiconductor substrate on one side, a protective film 23 consisting of zinc sulfide is formed on the surface of this substrate 21 and thereafter, an opening is provided in the layer 22 through the film 23. A metal film 24 for electrode connection use consisting of InP is formed at this opened region and a metal bump 29 consisting of InP on one side is formed on the film 24 in a state that the point of the bump 29 is sharpened. Moreover, an N-type layer 32 is formed on an Si substrate 31, which is a semiconductor substrate on the other side, an SiO2 film 33 is formed on the surface of the substrate 31 and an opening is provided on the layer 32. A metal film 34 for electrode connection use consisting of In is formed at this opened part and a metal bump 35, whose point part is formed into a cylindrical form and which consists of In, is formed on the film 34. Thereby, the bump 29 breaks through a thin metal oxide film formed on the bump 35 on the other side and the metal bumps are easily bonded to each other by low compression. Therefore, the bumps can be easily bonded to each other in a state that a distortion and a lattice defect are not generated in element formation regions of the substrates.

Description

【発明の詳細な説明】 1既  要〕 化合物半導体基板に形成された光電変換素子とシリコン
基板に形成されたマルチプレクサのような信号処理素子
とを金属バンプで接続した半導体装置及びその製造方法
に関し、 前記半導体素子を形成した基板に転位が発生することな
く、かつ金属バンプに塑性変形を生じることなく金属バ
ンプ同志が容易に接続されるのを目的とし、 一方の半導体基板に形成した半導体素子と、他方の半導
体基板に形成した半導体素子とを金属バンプで接続して
成る半導体装置に於いて、前記一方の半導体基板に設け
る金属バンプの先端部を尖った形状とするとともに、前
記一方の半導体基板の金属バンプ形成領域以外の箇所を
、該バンプ形成用金属に対して濡れ性の悪い金属、金属
化合物或いは樹脂層で選択的に被覆し、該被覆層をマス
クとして該基板をバンプ形成用金属の融液内に浸漬して
引き上げ、先端部が尖った形状の金属バンプを基板上に
形成して構成する。
[Detailed Description of the Invention] 1 Summary] A semiconductor device in which a photoelectric conversion element formed on a compound semiconductor substrate and a signal processing element such as a multiplexer formed on a silicon substrate are connected by metal bumps, and a method for manufacturing the same, A semiconductor element formed on one semiconductor substrate, with the aim of easily connecting metal bumps to each other without generating dislocations in the substrate on which the semiconductor element is formed and without causing plastic deformation in the metal bumps. In a semiconductor device in which a semiconductor element formed on the other semiconductor substrate is connected by a metal bump, the tip of the metal bump provided on the one semiconductor substrate is formed into a sharp shape; Areas other than the metal bump forming area are selectively coated with a metal, metal compound, or resin layer that has poor wettability with respect to the bump forming metal, and using the coating layer as a mask, the substrate is melted with the bump forming metal. It is constructed by immersing it in a liquid and pulling it up to form a metal bump with a pointed tip on the substrate.

[産業上の利用分野] 本発明は半導体装置及びその製造方法に係り、特に金属
バンプを用いて一方の半導体基板である化合物半導体基
板に形成した光電変換子と、他方の半導体基板であるシ
リコン基板に形成したマルチプレクサのような半導体素
子とを金属バンプを用いて接続形成して一体化した半導
体装置及びその製造方法に関する。
[Industrial Application Field] The present invention relates to a semiconductor device and a method for manufacturing the same, and particularly relates to a photoelectric converter formed using metal bumps on a compound semiconductor substrate, which is one semiconductor substrate, and a silicon substrate, which is the other semiconductor substrate. The present invention relates to a semiconductor device in which a semiconductor element such as a multiplexer formed in the above is connected and integrated using metal bumps, and a method for manufacturing the same.

赤外線を高感度に検知する化合物半導体基板を用いて赤
外線検知素子のような光電変換素子を形成し、更にシリ
コン基板を用いて電荷結合素子のような信号処理装置を
形成し、これ等の両者の素子をインジウム(In)のよ
うな低融点金属バンプで圧着接合して一体的に形成し、
赤外線検知素子で光電変換して得られた検知信号を、電
荷結合素子で信号処理する固体1最像素子のような半導
体装;ζは周知である。
A compound semiconductor substrate that detects infrared rays with high sensitivity is used to form a photoelectric conversion element such as an infrared sensing element, and a silicon substrate is further used to form a signal processing device such as a charge coupled device. The elements are integrally formed by pressure bonding with low melting point metal bumps such as indium (In),
ζ is a well-known semiconductor device such as a solid-state imaging element that processes a detection signal obtained by photoelectric conversion using an infrared detection element using a charge-coupled device.

〔従来の技術〕[Conventional technology]

従来のこのような半導体装置は、第3図にその要部を示
すように、P型の水銀・カドラミラム・テルル(l1g
+−XctlX Te)の基板1にN型の不純物原子を
イオン注入法等の方法により導入してN型層2を形成し
、更にその一ヒに硫化亜鉛(ZnS)の保護膜3を形成
し、該保護膜3のN型層2」−を窓開きした後、インジ
ウムより成る接続用金属膜4を形成して赤外線検知素子
5を形成する。
As shown in FIG.
N-type impurity atoms are introduced into a substrate 1 made of +-Xctl After opening the N-type layer 2'' of the protective film 3, a connecting metal film 4 made of indium is formed to form an infrared sensing element 5.

一方、P型のSi基板6にSing膜7を形成し、その
上には図示しないが、所定のパターンの転送電極等を形
成し、更にこの基板の所定の位置にN型層8を設け、こ
の電荷結合素子の信号入力部となる入力ダイオードを形
成している。
On the other hand, a Sing film 7 is formed on a P-type Si substrate 6, on which a transfer electrode etc. of a predetermined pattern is formed (not shown), and an N-type layer 8 is further provided at a predetermined position on this substrate. An input diode serving as a signal input portion of this charge-coupled device is formed.

そしてN型層8上のSiO□膜7を窓開きして接続用金
属膜9を形成して電荷結合素子10を形成し、赤外線検
知素子5のN型層2上と、電荷結合素子100N型層8
上に、それぞれInの金属バンプ12を形成し、該金属
バンプI2同志を押し潰して圧着接合することで固体撮
像装置のような半導体装置を形成している。
Then, the SiO□ film 7 on the N-type layer 8 is opened to form a connection metal film 9 to form a charge-coupled device 10. layer 8
A semiconductor device such as a solid-state imaging device is formed by forming In metal bumps 12 on top of each other and crushing and press-bonding the metal bumps I2 together.

そして赤外線検知素子5の底部より矢印に示すように導
入された赤外線は、N型N2と基板1の境界ののP−N
接合部で光電変換され、この光電変換された信号はIn
金属バンプ11を介して電荷結合素子10のN型層8の
部分に入力され、この入力信号は電荷結合素子10の所
定の転送電極に電圧を印加することで転送されて信号処
理される。
The infrared rays introduced from the bottom of the infrared detecting element 5 as shown by the arrow are transmitted to the P-N of the boundary between the N type N2 and the substrate 1.
Photoelectric conversion is performed at the junction, and this photoelectrically converted signal is In
The input signal is input to the N-type layer 8 of the charge-coupled device 10 via the metal bump 11, and this input signal is transferred and signal-processed by applying a voltage to a predetermined transfer electrode of the charge-coupled device 10.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

然し、前記した金属バンプは円筒型の平らな頭部を有す
る構造を呈しており、この形状であると複数個の金属バ
ンプを接合する際、それぞれのバンプの表面にはInの
薄い金属酸化膜が形成されており、これ等の酸化被膜を
破壊するだけの圧縮応力が必要となるが、金属バンプの
頭部が平らであると、この圧縮力が分散するため、酸化
被膜を破るような圧縮力としてI Kg/ mm”程度
必要となる。
However, the metal bumps described above have a cylindrical flat head structure, and when a plurality of metal bumps are bonded with this shape, a thin metal oxide film of In is formed on the surface of each bump. is formed, and compressive stress is required to break these oxide films. However, if the head of the metal bump is flat, this compressive force is dispersed, so there is no compression stress that breaks the oxide film. A force of approximately I kg/mm" is required.

また金属バンプ相互の高さにパラツギがあると、全ての
金属バンプを信頼性良く接合するために、高さの最も低
い金属バンプが接合する迄、他の金属バンプを圧縮し続
ける必要がある。
Furthermore, if there is an unevenness in the heights of the metal bumps, in order to reliably join all the metal bumps, it is necessary to continue compressing the other metal bumps until the metal bump with the lowest height is joined.

このように圧縮力を金属バンプに長く掛けると、下部の
基板の素子形成領域に歪や格子欠陥や転位が形成される
不都合を生じる。
When compressive force is applied to the metal bump for a long time in this way, there arises a disadvantage that distortion, lattice defects, and dislocations are formed in the element forming region of the lower substrate.

本発明は上記した問題点を除去し、金属バンプを同志を
圧接接合する際に、容易に金属ハンプ上の酸化被膜が破
れ易い構造とし、長時間金属バンプに高い圧縮力を掛け
なくとも、容易に金属ハンプ同志が接合できる半導体装
置の製造方法の提供を目的とする。
The present invention eliminates the above-mentioned problems and has a structure in which the oxide film on the metal hump is easily broken when the metal bumps are pressure-welded together. The purpose of the present invention is to provide a method for manufacturing a semiconductor device in which metal humps can be bonded to each other.

〔課題を解決するための手段] 一ヒ記目的を達成する本発明の方法は、一方の半導体基
板に形成した半導体素子と、他方の半導体基板に形成し
た半導体素子とを金属バンプで接続して成る半導体装置
に於いて、 前記一方の半導体基板に設ける金属バンプの先端部を尖
った形状として構成する。
[Means for Solving the Problems] The method of the present invention for achieving the above object connects a semiconductor element formed on one semiconductor substrate and a semiconductor element formed on the other semiconductor substrate with metal bumps. In the semiconductor device, the tip of the metal bump provided on the one semiconductor substrate is configured to have a pointed shape.

更に一方の半導体基板に設ける金属バンプ形成領域以外
の箇所を該金属バンプに対して濡れ性の悪い金属、金属
化合物、或いは樹脂層で選択的に被覆し、該被覆層をマ
スクとして該基板を金属バンプ形成用の金属の融液内に
浸漬して引き上げ、先端部が尖った形状の金属バンプを
基板上に形成することを特徴としている。
Furthermore, areas other than the metal bump formation area provided on one semiconductor substrate are selectively coated with a metal, metal compound, or resin layer that has poor wettability with respect to the metal bumps, and the substrate is coated with metal using the coating layer as a mask. It is characterized by forming metal bumps with pointed tips on a substrate by immersing it in a metal melt for bump formation and pulling it up.

〔作 用〕[For production]

一方の半導体基板の素子形成領域を除いた箇所を金属バ
ンプ形成用金属、即ちInに対して濡れ性の悪い金属化
合物膜、例えば酸化アルミニウムで選択的に被覆する。
A portion of one semiconductor substrate excluding the element formation region is selectively coated with a metal compound film, such as aluminum oxide, which has poor wettability with respect to the metal for forming metal bumps, that is, In.

この酸化アルミニウム膜をマスクとして該基板をInの
融液内に浸漬した後、引き上げると先端が尖ったInの
金属バンプが得られる。このように一方の半導体基板に
先端が尖った金属バンプと、円筒状の先端部を有する金
属バンプ同志を接合させると、その一方の金属バンプの
尖った先端部が、他方の金属バンプの先端部に形成され
た金属バンプの7酸化被膜を容易に突き破って、長時間
、高い圧縮力を金属バンプ間に掛けなくとも金属パン1
間同志が基板に転位や歪を与えない状態で容易に接合で
きる。
Using this aluminum oxide film as a mask, the substrate is immersed in an In melt and then pulled up to obtain an In metal bump with a sharp tip. When a metal bump with a sharp tip and a metal bump with a cylindrical tip are bonded to one semiconductor substrate in this way, the sharp tip of one metal bump is connected to the tip of the other metal bump. It is possible to easily break through the 7 oxide film of the metal bumps formed on the metal bump 1 without applying high compressive force between the metal bumps for a long time.
The materials can be easily joined without causing dislocation or distortion to the substrate.

〔実施例〕〔Example〕

以下、図面を用いながら本発明の一実施例に付き詳細に
説明する。
Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

第1図は本発明の半導体装置の一実施例の構造を示す断
面図である。
FIG. 1 is a sectional view showing the structure of an embodiment of the semiconductor device of the present invention.

図示するように一方の化合物半導体基板である水馨艮・
カドミウム・テルル 板21にN型1?i22が形成され、該基板21の表面
に硫化亜鉛(ZnS)よりなる保護膜23が形成された
後、該保護膜23のN型層22上が開口され、その開口
された領域にInよりなる電極接続用金属膜24が形成
され、該金属膜24上に一方のInよりなる金属バンプ
29が先端を尖らせた状態で形成されている。
As shown in the figure, one of the compound semiconductor substrates,
N type 1 on cadmium/tellurium plate 21? After the protective film 23 made of zinc sulfide (ZnS) is formed on the surface of the substrate 21, an opening is made on the N-type layer 22 of the protective film 23, and a film made of In is formed in the opened region. A metal film 24 for electrode connection is formed, and one metal bump 29 made of In is formed on the metal film 24 with a pointed tip.

また他方の半導体基板であるSt基板31にはN型層3
2が形成され、該基板31の表面にはSiO□膜33膜
形3され、N型層32上が開口さた後、その部分にIn
よりなる電極接続用金属膜34が形成され、該金属膜3
4−ヒに先端部が円筒状のInよりなる金属バンプ35
が形成されている。
In addition, an N-type layer 3 is provided on the other semiconductor substrate, the St substrate 31.
2 is formed, a SiO□ film 33 is formed on the surface of the substrate 31, and after an opening is made on the N-type layer 32, In
A metal film 34 for electrode connection is formed, and the metal film 3
4-A metal bump 35 made of In with a cylindrical tip
is formed.

このように一方の半導体基板21上に形成されている金
属バンプ29の先端部が尖った形状であると、この金属
バンプ29が他方の金属バンプ35上に形成された薄い
金属酸化膜を突き破って低い圧縮力、即ち200g/m
mz程度の圧縮力で容易に金属バンプ間が接合され、そ
のため基板の素子形成領域に歪や格子欠陥が入らない状
態で容易に接合できる。
If the tip of the metal bump 29 formed on one semiconductor substrate 21 has a sharp shape as described above, the metal bump 29 may break through the thin metal oxide film formed on the other metal bump 35. Low compression force i.e. 200g/m
The metal bumps can be easily joined with a compressive force of about mz, and therefore can be easily joined without introducing distortion or lattice defects into the element formation region of the substrate.

このような本発明の半導体装置の製造する方法に付いて
述べる。
A method for manufacturing such a semiconductor device of the present invention will be described.

まず第2図(a)に示すように、一方の化合物半導体基
板であるlIg+−x Cd)B Te基板21にN型
層22を形成し、該基板21の表面をZnS膜のような
保護膜23で保護し、該N型層22上の保護膜23を窓
開きした後、該N型層22上にIn等を蒸着して形成し
た接続用金属膜24を形成する。
First, as shown in FIG. 2(a), an N-type layer 22 is formed on one of the compound semiconductor substrates, an lIg+-x Cd)B Te substrate 21, and the surface of the substrate 21 is covered with a protective film such as a ZnS film. 23, and after opening the protective film 23 on the N-type layer 22, a connection metal film 24 is formed by vapor depositing In or the like on the N-type layer 22.

次いで該基板21上に第1のホトレジスト膜25を塗布
形成後、その上にアルミニウム膜26を蒸着により形成
する。
Next, after forming a first photoresist film 25 by coating on the substrate 21, an aluminum film 26 is formed thereon by vapor deposition.

次いで第2図(b)に示すように、該基板上に第2のホ
トレジスト膜27を形成後、該ホトレジスト膜27をホ
トリソグラフィ法を用いて開口する。
Next, as shown in FIG. 2(b), a second photoresist film 27 is formed on the substrate, and then the photoresist film 27 is opened using photolithography.

更に該開口したホトレジスト膜27をマスクとして用い
てアルミニウム膜26を、燐酸と硝酸の混合液にてエツ
チングして所定のパターンに形成する。
Furthermore, using the opened photoresist film 27 as a mask, the aluminum film 26 is etched with a mixed solution of phosphoric acid and nitric acid to form a predetermined pattern.

更に第2図(C)に示すように、ホトレジスト膜27を
除去し、プラズマCVD装置を用いて酸素プラズマを照
射してアルミニウム膜26の表面を薄く酸化させる。
Further, as shown in FIG. 2C, the photoresist film 27 is removed, and the surface of the aluminum film 26 is oxidized thinly by irradiating oxygen plasma using a plasma CVD apparatus.

次いで第2図(d)に示すように、マスクとして用いた
第2のホトレジスト膜27を除去剤により除去する。こ
のようにすれば、Inの金属バンプ形成領域以外の箇所
がInに対して濡れ性の悪い、酸化アルミニウム被膜4
0で選択的に被覆された形となる。
Next, as shown in FIG. 2(d), the second photoresist film 27 used as a mask is removed using a removing agent. In this way, the aluminum oxide film 4, which has poor wettability with In, can be formed in areas other than the In metal bump formation region.
It is selectively covered with 0.

更に第2図(e)に示すように、この基板を引っ繰り返
して前記した酸化アルミニウム被膜40をマスクとして
基板をInの融液28内に基板表面のみが浸漬するよう
に設置する。そして基板がInの融解温度(156°C
)に到達する以前に基板を融液の液面より垂直方向に引
き上げて放置し、室温まで放置する。
Further, as shown in FIG. 2(e), this substrate is turned over and placed so that only the surface of the substrate is immersed in the In melt 28 using the aluminum oxide film 40 as a mask. The substrate is at the melting temperature of In (156°C).
), the substrate is lifted vertically above the melt surface and left to stand until room temperature.

すると第2図(f)に示すように、Inに対して酸化ア
ルミニウムは濡れ性が悪いために、酸化アルミニウムの
形成領域の箇所でInが弾かれ、電極接続用金属膜24
hにのみinが残留する。更に基板を引き上げる際に、
接続用電極膜24上に付着したInは重力によってその
先端部が尖った状態になり、基板がInの融液面より離
れると、付着したInの温度は直ちに融点以下になるた
め、表面張力によって先端が丸くなれずに、尖った形の
ままに成る。
Then, as shown in FIG. 2(f), since aluminum oxide has poor wettability with In, In is repelled in the area where aluminum oxide is formed, and the electrode connecting metal film 24
in remains only in h. Furthermore, when pulling up the board,
The tip of the In deposited on the connection electrode film 24 becomes sharp due to gravity, and when the substrate moves away from the surface of the melted In, the temperature of the deposited In immediately drops below the melting point, so the surface tension causes the tip of the In to become sharp. The tip does not become rounded and remains pointed.

次いで第2図(6)に示すように、前記した第1のホト
レジスト膜25を除去することでリフトオフ法によりそ
のとの酸化アルミニウム被膜40が除去され、先端が尖
ったIn金属バンプを有する半導体基板が容易に得られ
る。
Next, as shown in FIG. 2(6), by removing the first photoresist film 25, the aluminum oxide film 40 thereon is removed by a lift-off method, and a semiconductor substrate having In metal bumps with sharp tips is obtained. can be easily obtained.

なお、本実施例ではInの融液と濡れ性の悪い被覆層と
して酸化アルミニウム被膜を用いたが、その他Inの融
液の温度に耐える樹脂層、或いはタングステンのような
金属膜を被覆層として用いても良い。
In this example, an aluminum oxide film was used as the coating layer that has poor wettability with the In melt, but a resin layer that can withstand the temperature of the In melt or a metal film such as tungsten may be used as the coating layer. It's okay.

〔発明の効果〕〔Effect of the invention〕

以−トの説明から明らかなように本発明によれば、In
金属バンプ同志が低圧縮力で容易に接合できるので、基
板の素子形成領域に格子欠陥や転位を発生し難い高信頼
度の半導体装置が得られる効果がある。
As is clear from the explanation below, according to the present invention, In
Since the metal bumps can be easily bonded to each other with low compressive force, a highly reliable semiconductor device that is less likely to generate lattice defects or dislocations in the element formation region of the substrate can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の半導体装置の断面図、第2図(a)よ
り第2図(2)までは本発明の半導体装置の製造工程を
示す断面図、 第3図は従来の半導体装置の構造を示す断面図である。 図において、 21はHg+−、CdXTe基板、22.32はN型層
、23は保護膜、24 、34は電極接続用金属膜、2
5は第1ホトレジスト膜、26はAN膜、27は第2ホ
トレジスト膜、28はIn融液、29.35は金属バン
プ、31はSi基板、33はSiO□膜、40はAβ2
03被膜を示す。 本発明−1詳x1の針面図 第1図 2ト湧ト明の¥−A東#増Eft@i!工孝fを才、T
よ牟dn口第2図(卸1) <f> /f発g和半4倍αn昧七オぞをネ漬飼図第2図(その
2)
FIG. 1 is a cross-sectional view of a semiconductor device of the present invention, FIG. 2(a) to FIG. 2(2) are cross-sectional views showing the manufacturing process of the semiconductor device of the present invention, and FIG. FIG. 3 is a cross-sectional view showing the structure. In the figure, 21 is a Hg+-, CdXTe substrate, 22.32 is an N-type layer, 23 is a protective film, 24 and 34 are metal films for electrode connection, and 2
5 is the first photoresist film, 26 is the AN film, 27 is the second photoresist film, 28 is the In melt, 29.35 is the metal bump, 31 is the Si substrate, 33 is the SiO□ film, 40 is Aβ2
03 coating is shown. This invention-1 details Takashi F, T
Figure 2 (Wholesale 1) <f> /f g sum 1/2 times 4 times αn mai seven ozo ni pickle Figure 2 (Part 2)

Claims (2)

【特許請求の範囲】[Claims] (1)一方の半導体基板(21)に形成した半導体素子
と、他方の半導体基板(31)に形成した半導体素子と
を金属バンプ(29、35)で接続して成る半導体装置
に於いて、 前記一方の半導体基板(21)に設ける金属バンプ(2
9)の先端部を尖った形状としたことを特徴とする半導
体装置。
(1) In a semiconductor device in which a semiconductor element formed on one semiconductor substrate (21) and a semiconductor element formed on the other semiconductor substrate (31) are connected by metal bumps (29, 35), the above-mentioned Metal bumps (2) provided on one semiconductor substrate (21)
9) A semiconductor device characterized in that the tip of item 9) has a pointed shape.
(2)一方の半導体基板(21)に形成した半導体素子
と、他方の半導体基板(31)に形成した半導体素子と
を金属バンプ(29、35)で接続して成る半導体装置
の製造方法に於いて、 前記一方の半導体基板(21)の金属バンプ(29)形
成領域以外の箇所を、該バンプ形成用金属に対して濡れ
性の悪い金属、金属化合物或いは樹脂層で選択的に被覆
し、該被覆層(26)をマスクとして該基板(21)を
バンプ形成用金属の融液(28)内に浸漬して引き上げ
、先端部が尖った形状の金属バンプ(29)を基板(2
1)上に形成することを特徴とする半導体装置の製造方
法。
(2) A method for manufacturing a semiconductor device in which a semiconductor element formed on one semiconductor substrate (21) and a semiconductor element formed on the other semiconductor substrate (31) are connected by metal bumps (29, 35). selectively covering a portion of the one semiconductor substrate (21) other than the metal bump (29) formation region with a metal, metal compound, or resin layer that has poor wettability with respect to the bump-forming metal; Using the coating layer (26) as a mask, the substrate (21) is immersed in the melt (28) of the bump-forming metal and pulled up, and the metal bumps (29) with pointed tips are placed on the substrate (2).
1) A method for manufacturing a semiconductor device, characterized in that it is formed on a semiconductor device.
JP63165247A 1988-07-01 1988-07-01 Semiconductor device and its manufacture Pending JPH0215635A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63165247A JPH0215635A (en) 1988-07-01 1988-07-01 Semiconductor device and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63165247A JPH0215635A (en) 1988-07-01 1988-07-01 Semiconductor device and its manufacture

Publications (1)

Publication Number Publication Date
JPH0215635A true JPH0215635A (en) 1990-01-19

Family

ID=15808674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63165247A Pending JPH0215635A (en) 1988-07-01 1988-07-01 Semiconductor device and its manufacture

Country Status (1)

Country Link
JP (1) JPH0215635A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08148495A (en) * 1994-11-25 1996-06-07 Fujitsu Ltd Semiconductor device, manufacture thereof, and adhesion evaluation method of semiconductor device bump

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08148495A (en) * 1994-11-25 1996-06-07 Fujitsu Ltd Semiconductor device, manufacture thereof, and adhesion evaluation method of semiconductor device bump

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