JPH02154583A - Television receiver - Google Patents

Television receiver

Info

Publication number
JPH02154583A
JPH02154583A JP63307993A JP30799388A JPH02154583A JP H02154583 A JPH02154583 A JP H02154583A JP 63307993 A JP63307993 A JP 63307993A JP 30799388 A JP30799388 A JP 30799388A JP H02154583 A JPH02154583 A JP H02154583A
Authority
JP
Japan
Prior art keywords
circuit
signal
ntsc
definition television
definition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63307993A
Other languages
Japanese (ja)
Other versions
JP3024133B2 (en
Inventor
Kazuhiro Miyabe
一裕 宮部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP63307993A priority Critical patent/JP3024133B2/en
Publication of JPH02154583A publication Critical patent/JPH02154583A/en
Application granted granted Critical
Publication of JP3024133B2 publication Critical patent/JP3024133B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To save power consumption by inserting a switch circuit switched by the synchronous clock signal of a high definition television set to a power supply line. CONSTITUTION:A synchronous signal is detected from a high definition television signal obtained from a broad band video amplifier circuit 5 by a signal separator circuit 8 and the synchronous clock signal is used to switch 1st and 2nd switch circuits 15, 16 for power supply. That is, when the synchronous clock signal is set, the switch circuit 15 is closed and power is supplied to a high definition television signal processing section 10 and a high definition television audio decoder 9. On the other hand, since the switch circuit 16 is operated reverse to the switch circuit 15 by an inversion circuit 17, no power is supplied to an NTSC video output circuit 6, an NTSC audio decoder 7 and an NTSC signal processing section 12. Conversely, when the synchronous clock signal is reset, the NTSC circuit block is operated and no power is supplied to the high definition television signal block. Thus, the power consumption is saved.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はテレビジョンの新しい方式である高品位テレビ
方式と、従来方式であるNTSC方式の両方式に対応し
たテレビジョン受像機に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a television receiver that is compatible with both the new television system, the high-definition television system, and the conventional television system, the NTSC system.

従来の技術 高品位テレビはきめ細かな画像を大画面のワイドスクリ
ーンに表示することにより、現行のテレビ放送では得ら
れない迫力と臨場感などの新しい魅力を求めようとする
もので、近年各国とも関心が高まってきている。たとえ
ば、高品位テレビの方式の一つである“′ハイビジョン
”は、日本放送協会(NHK)により提案されたもので
現行標準テレビの方式が走査線525本、アスペクト比
4:3であるのに対して、走査線1125本、アスペク
ト比16:9であり、約5倍の情報量をもっている。
Conventional technology High-definition television displays detailed images on a large widescreen screen to provide new appeal such as power and realism that cannot be obtained with current television broadcasting, and in recent years, there has been a growing interest in high-definition television in various countries. is increasing. For example, ``Hi-Vision'', which is one of the high-definition television systems, was proposed by the Japan Broadcasting Corporation (NHK), and although the current standard television system has 525 scanning lines and an aspect ratio of 4:3. On the other hand, it has 1125 scanning lines and an aspect ratio of 16:9, and has approximately 5 times the amount of information.

このような情報量の多い信号を伝送するには従来の地上
波の周波数帯では多くのチャンネルが必要となってくる
ため、衛星を使った伝送が有力である。さらに衛星放送
でも現在の1チヤンネルの帯域内で伝送しようと思えば
かなりの帯域圧縮の技術が必要であり、そのうちの1つ
の方式としてMUSE方式とよばれる技術がある。この
ように高品位テレビの放送には従来方式と異なる新しい
方式の技術が必要であり、全く新しい受像機が必要とな
ってくる。
Transmitting signals with such a large amount of information requires many channels in the conventional terrestrial frequency band, so transmission using satellites is a promising option. Furthermore, if satellite broadcasting is to be transmitted within the current band of one channel, a considerable amount of band compression technology is required, and one of these methods is a technology called the MUSE method. As described above, high-definition television broadcasting requires new technology different from conventional methods, and a completely new television receiver is required.

一方、現行のテレビジョンの方式の1つであるNTSC
方式の受像機においても近年メモリを使った画質改善が
さかんに行なわれている。即ちフィールドメモリを使っ
た倍速変換や、3次元の輝度/色信号分離などである。
On the other hand, NTSC, one of the current television systems,
In recent years, image quality improvements using memory have been actively carried out in this type of television receivers. That is, double-speed conversion using field memory, three-dimensional luminance/color signal separation, etc.

高品位テレビの放送の位置付けを考えた場合、高品位テ
レビ放送が始まったとしても、従来の放送がな(なって
しまうことは考えられず、両方式平行して放送されるで
あろう。その場合高品位テレビの受像機としては、当然
従来のNTSC方式も受信できることが必要であり、そ
の画質もずくれたものが要求されるであろう。その時多
くのメモリが必要となってくるが、これは高品位テレビ
の信号処理部と共用が可能である。
Considering the positioning of high-definition television broadcasting, even if high-definition television broadcasting begins, it is unthinkable that conventional broadcasting will cease to exist, and both types will be broadcast in parallel. In this case, a high-definition television receiver will naturally need to be able to receive the conventional NTSC system, and the image quality will also be poor.At that time, a large amount of memory will be required, but this can be shared with the signal processing section of high-definition televisions.

第2図に高品位テレビ方式とNTSC方式の両方式対応
テレビ受像機のブロック図を示す。第2図は衛星放送を
前提としたブロック図であり、UHF/V HFのNT
SC地上波受信には別にチューナが必要であるが、ここ
では省略した。また大別してBSチューナ部と信号処理
部からなり、テレビジョン受像機としてはこのあとにモ
ニタ一部が必要であるが、これもここでは省略しておく
FIG. 2 shows a block diagram of a television receiver compatible with both the high-definition television system and the NTSC system. Figure 2 is a block diagram assuming satellite broadcasting.
A separate tuner is required for SC terrestrial reception, but it is omitted here. Furthermore, it is broadly divided into a BS tuner section and a signal processing section, and a television receiver requires a part of a monitor after this, but this is also omitted here.

第2図において1はBS−TF入力信号であり、図示し
ていないBSコンバータからの信号を入力する。2はセ
カンドコンバータ、3は選局回路、4はFM復調回路で
ある。高品位テレビ放送の場合は現行NTSC方式に比
べ広い帯域が必要であるので、広帯域映像増幅回路5を
通して検波出力を出している。NTSC信号の場合はN
TSC映像出力回路6でデイエンファシス、デイスパー
ザル除去等の処理を施して映像信号を出力し、NTSC
音声デコーダ7でQPSK音声復調を行なっている。信
号処理部においては、広帯域映像増幅回路5の検波出力
から信号分離回路8で同期信号、音声信号を分離し、高
品位テレビ信号処理部10とメモリ11で映像信号処理
を、高品位テレビ音声デコーダ9で音声信号処理をおの
おの行なう。一方NTSC信号は、NTSC映像出力回
路6の映像出力信号をNTSC信号処理部12でメモリ
11を共用して映像信号処理を行なう。そして、切換回
路13によって高品位テレビとNTSCの映像音声信号
の出力を切り換える。
In FIG. 2, 1 is a BS-TF input signal, into which a signal from a BS converter (not shown) is input. 2 is a second converter, 3 is a channel selection circuit, and 4 is an FM demodulation circuit. In the case of high-definition television broadcasting, a wider band is required than the current NTSC system, so the detection output is output through the wideband video amplification circuit 5. N for NTSC signals
The TSC video output circuit 6 performs processing such as de-emphasis and dispersal removal, and outputs the video signal.
An audio decoder 7 performs QPSK audio demodulation. In the signal processing section, a signal separation circuit 8 separates a synchronization signal and an audio signal from the detection output of the wideband video amplification circuit 5, a high-definition television signal processing section 10 and a memory 11 process the video signal, and a high-definition television audio decoder 9 performs audio signal processing. On the other hand, for the NTSC signal, the video output signal of the NTSC video output circuit 6 is processed by the NTSC signal processing section 12 by sharing the memory 11. Then, the switching circuit 13 switches the output of the high-definition television and NTSC video and audio signals.

発明が解決しようとする課題 しかしながら上記のような構成では、BSチューナ部で
はFM復調回路4まで、信号処理部においてはメモリ1
1のみを共用しているにすぎず、他の回路は高品位テレ
ビとNTSC別々に必要であり、その消費電力を考える
と現行テレビジョン受像機に比べ膨大なものになってし
まうという問題点を有していた。
Problems to be Solved by the Invention However, in the above configuration, up to the FM demodulation circuit 4 in the BS tuner section and the memory 1 in the signal processing section.
The problem is that the other circuits are required separately for high-definition television and NTSC, and their power consumption is enormous compared to current television receivers. had.

本発明は上記問題点に鑑み、消費電力の少ないテレビジ
ョン受像機を提供するものである。
In view of the above problems, the present invention provides a television receiver with low power consumption.

課題を解決するための手段 上記問題点を解決するために本発明のテレビジョン受像
機は、一端が電源供給回路に接続され、もう一方の端子
が高品位テレビ信号処理回路と高品位テレビ音声デコー
ダの電源ラインに接続され、高品位テレビ信号分離回路
で検出される同期ロック信号により切り換えられる第1
のスイッチ回路と、同じく一端が電源供給回路に接続さ
れ、もう一方の端子がNTSC信号処理回路とNTSC
音声デコーダの電源ラインに接続され、前記同期ロック
信号の反転出力によって切り換えられる第2のスイッチ
回路とを備え高品位テレビ部とNTSC部別々に電源を
供給するという構成を備えたものである。
Means for Solving the Problems In order to solve the above problems, the television receiver of the present invention has one end connected to a power supply circuit, and the other terminal connected to a high-definition television signal processing circuit and a high-definition television audio decoder. The first one is connected to the power supply line of
One end is connected to the power supply circuit, and the other terminal is connected to the NTSC signal processing circuit and the NTSC switch circuit.
The second switch circuit is connected to the power supply line of the audio decoder and is switched by the inverted output of the synchronization lock signal, and is configured to separately supply power to the high-definition television section and the NTSC section.

作用 本発明は上記した構成によって、高品位テレビ信号受信
時には高品位テレビ信号処理部および高品位テレビ音声
デコーダ部に電源が供給され、NTSC部には電源が供
給されず、逆にNTSCテレビ信号受信時には同期ロッ
クせずに、高品位テレビ部には電源が供給されず、NT
SC部には電源が供給されるので、テレビジョン受像機
としては高品位テレビ部のみの時と同し程度の消費電力
で良い。
According to the above-described configuration, the present invention supplies power to the high-definition television signal processing section and the high-definition television audio decoder section when receiving a high-definition television signal, but does not supply power to the NTSC section, and conversely, when receiving a high-definition television signal. Sometimes the synchronization does not lock, power is not supplied to the high definition TV section, and the NT
Since power is supplied to the SC section, the television receiver consumes about the same amount of power as the high-definition television section alone.

実施例 以下本発明の一実施例のテレビジョン受像機について図
面を参照しながら説明する。
Embodiment Hereinafter, a television receiver according to an embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例におけるテレビジョン受像機
のブロック図である。第1図において1〜13は第2図
と同じであり、説明は省略する。また14は電源供給回
路、15.16は同期ロック信号により開閉する第1.
第2のスイッチ回路、17は反転回路である。第1のス
イッチ回路15は一端を電源供給回路14に、他端を高
品位テレビ信号処理部10および高品位テレビ音声デコ
ーダの電源ラインに接続しており、−力筒2のスイッチ
回路16は一端を電源供給回路14に、他端をNTSC
映像出力回路6.NTSC音声デコーダ7およびNTS
C信号処理部12の電源ラインに接続しており、第1の
スイッチ回路15が同期ロック信号によって開閉制御さ
れると、第2のスイッチ回路16は同期ロック信号の反
転出力によって開閉制御される様に構成されている。
FIG. 1 is a block diagram of a television receiver in one embodiment of the present invention. In FIG. 1, numerals 1 to 13 are the same as in FIG. 2, and their explanation will be omitted. Further, 14 is a power supply circuit, and 15.16 is a first switch which is opened and closed by a synchronization lock signal.
The second switch circuit 17 is an inverting circuit. The first switch circuit 15 has one end connected to the power supply circuit 14 and the other end connected to the power line of the high-definition television signal processing section 10 and the high-definition television audio decoder. to the power supply circuit 14, and the other end to the NTSC
Video output circuit 6. NTSC audio decoder 7 and NTSC
It is connected to the power line of the C signal processing section 12, and when the first switch circuit 15 is controlled to open or close by the synchronous lock signal, the second switch circuit 16 is controlled to open or close by the inverted output of the synchronous lock signal. It is composed of

以上のように構成されたテレビジョン受像機について図
面を用いて説明する。
The television receiver configured as described above will be explained with reference to the drawings.

広帯域映像増幅回路5より得られる高品位テレビ信号は
信号分離回路8で同期信号が検出されるが、その時同期
ロック信号により電源供給の第1゜第2のスイッチ回路
15と16を開閉する。即ち同期ロック信号がたってい
る時はスイッチ回路15が閉じ高品位テレビ信号処理部
10と高品位テレビ音声テ’:1− タ9に電源が供給
される。一方スイッチ回路16は反転回路17によりス
イッチ回路15と逆の動作をするため、NTSC映像出
力回路6、NTSC音声デコーダ7、NTSC信号処理
部12には電源が供給されない。逆に同期ロック信号が
たたない時にはNTSC回路ブロックの方が動作し、高
品位テレビブロックには電源供給されない。また、切換
回路13も同期ロック信号によって制御することにより
、自動的に高品位テレビとNTSCを切り換えることが
できる。
A synchronization signal of the high-quality television signal obtained from the wideband video amplification circuit 5 is detected by the signal separation circuit 8, and at this time, the synchronization lock signal opens and closes the first and second switch circuits 15 and 16 for power supply. That is, when the synchronization lock signal is activated, the switch circuit 15 is closed and power is supplied to the high-definition television signal processing section 10 and the high-definition television audio datater 9. On the other hand, since the switch circuit 16 operates in the opposite manner to the switch circuit 15 due to the inversion circuit 17, power is not supplied to the NTSC video output circuit 6, the NTSC audio decoder 7, and the NTSC signal processing section 12. Conversely, when the synchronization lock signal is not present, the NTSC circuit block operates, and power is not supplied to the high-definition television block. Furthermore, by controlling the switching circuit 13 using the synchronization lock signal, it is possible to automatically switch between high-definition television and NTSC.

なお、図中Aで示したブロックにはスイッチ回路15.
16の開閉に関係なく電源が供給される。以上のような
構成にすることにより、高品位テレビ放送を受信してい
る時には高品位テレビブロックのみ動作し、NTSC方
式テレビ放送を受信している時にはNTSCブロックの
み動作するのでテレビジョン受像機全体の消費電力とし
てはそれぞれの専用受像機並の消費電力でよくなる。
Note that the block indicated by A in the figure includes a switch circuit 15.
Power is supplied regardless of whether 16 is opened or closed. With the above configuration, only the high-definition TV block operates when receiving high-definition television broadcasting, and only the NTSC block operates when receiving NTSC television broadcasting, so that the entire television receiver is The power consumption is equivalent to that of each dedicated receiver.

発明の効果 以上のように本発明は高品位テレビの同期輪ロック信号
により開閉するスイッチ回路を電源供給ラインに入れる
ことにより、高品位テレビ放送受信時には高品位テレビ
ブロックのみ動作し、NTSC放送受信時にはNTSC
ブロックのみ動作するので消費電力を節約することがで
きる。
Effects of the Invention As described above, the present invention includes a switch circuit that opens and closes in response to a high-definition TV synchronous ring lock signal in the power supply line, so that only the high-definition TV block operates when receiving high-definition TV broadcasting, and when receiving NTSC broadcasting. NTSC
Since only blocks operate, power consumption can be saved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例におけるテレビジョン受像機
のブロック図、第2図は従来例として考えられるテレビ
ジョン受像機のブロック図である。 6・・・・・・NTSC映像出力回路、7・・・・・・
NTSC音声デコーダ、12・・・・・・NTSC信号
処理部、9・・・・・・高品位テレビ音声デコーダ、1
0・・・・・・高品位テレビ信号処理部、14・・・・
・・電源供給回路、15.16・・・・・・スイッチ回
路、17・旧・・反転回路。
FIG. 1 is a block diagram of a television receiver according to an embodiment of the present invention, and FIG. 2 is a block diagram of a television receiver considered as a conventional example. 6...NTSC video output circuit, 7...
NTSC audio decoder, 12...NTSC signal processing section, 9...High definition television audio decoder, 1
0... High-definition television signal processing section, 14...
...Power supply circuit, 15.16... Switch circuit, 17. Old... Inversion circuit.

Claims (1)

【特許請求の範囲】[Claims] 高品位テレビ信号を入力とし、映像信号、音声信号、同
期信号に分離する高品位テレビ信号分離回路と、高品位
テレビ映像信号を入力とする高品位テレビ信号処理回路
と、高品位テレビ音声信号を入力とする高品位テレビ音
声デコーダと、NTSC方式テレビ信号を入力とするN
TSC信号処理回路と、NTSC音声デコーダとを備え
、一端が電源供給回路に接続され、もう一方の端子が前
記高品位テレビ信号処理回路と高品位テレビ音声デコー
ダの電源ラインに接続され、前記高品位テレビ信号分離
回路で検出される同期ロック信号により切り換えられる
第1のスイッチ回路と、同じく一端が電源供給回路に接
続され、もう一方の端子が前記NTSC信号処理回路と
、NTSC音声デコーダの電源ラインに接続され、前記
同期ロック信号の反転出力によって切り換えられる第2
のスイッチ回路を備えたことを特徴とするテレビジョン
受像機。
A high-definition TV signal separation circuit that takes a high-definition TV signal as an input and separates it into a video signal, an audio signal, and a synchronization signal; a high-definition TV signal processing circuit that takes a high-definition TV video signal as an input; A high-definition TV audio decoder that receives an input, and an N that receives an NTSC TV signal as an input.
It comprises a TSC signal processing circuit and an NTSC audio decoder, one end is connected to the power supply circuit, the other terminal is connected to the power line of the high definition television signal processing circuit and the high definition television audio decoder, and the high definition A first switch circuit that is switched by a synchronization lock signal detected by the television signal separation circuit, and one end of which is connected to a power supply circuit, and the other terminal of which is connected to the power supply line of the NTSC signal processing circuit and the NTSC audio decoder. A second
A television receiver characterized by being equipped with a switch circuit.
JP63307993A 1988-12-06 1988-12-06 Television receiver Expired - Fee Related JP3024133B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63307993A JP3024133B2 (en) 1988-12-06 1988-12-06 Television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63307993A JP3024133B2 (en) 1988-12-06 1988-12-06 Television receiver

Publications (2)

Publication Number Publication Date
JPH02154583A true JPH02154583A (en) 1990-06-13
JP3024133B2 JP3024133B2 (en) 2000-03-21

Family

ID=17975615

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63307993A Expired - Fee Related JP3024133B2 (en) 1988-12-06 1988-12-06 Television receiver

Country Status (1)

Country Link
JP (1) JP3024133B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0429278U (en) * 1990-06-30 1992-03-09
JPH04196786A (en) * 1990-11-27 1992-07-16 Matsushita Electric Ind Co Ltd Television receiver
EP0746155A2 (en) * 1995-06-02 1996-12-04 Matsushita Electric Industrial Co., Ltd. Multistandards television receiver
GB2337679B (en) * 1997-02-19 2001-05-09 Sanyo Electric Co Television receiver
US7502073B2 (en) 2003-04-04 2009-03-10 Panasonic Corporation Signal processor
USRE41146E1 (en) 1992-03-26 2010-02-23 Panasonic Corporation Communication system
USRE42643E1 (en) 1991-03-27 2011-08-23 Panasonic Corporation Communication system
USRE43093E1 (en) 1992-03-26 2012-01-10 Panasonic Corporation Communication system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58121876A (en) * 1982-01-14 1983-07-20 Matsushita Electric Ind Co Ltd Television receiver
JPS6277769A (en) * 1985-09-30 1987-04-09 Alps Electric Co Ltd Television signal receiver
JPS62176388A (en) * 1986-01-30 1987-08-03 Tokyo Electric Power Co Inc:The Information system
JPS63233691A (en) * 1987-03-20 1988-09-29 Sanyo Electric Co Ltd Satellite broadcast receiver

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58121876A (en) * 1982-01-14 1983-07-20 Matsushita Electric Ind Co Ltd Television receiver
JPS6277769A (en) * 1985-09-30 1987-04-09 Alps Electric Co Ltd Television signal receiver
JPS62176388A (en) * 1986-01-30 1987-08-03 Tokyo Electric Power Co Inc:The Information system
JPS63233691A (en) * 1987-03-20 1988-09-29 Sanyo Electric Co Ltd Satellite broadcast receiver

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0429278U (en) * 1990-06-30 1992-03-09
JPH04196786A (en) * 1990-11-27 1992-07-16 Matsushita Electric Ind Co Ltd Television receiver
USRE42643E1 (en) 1991-03-27 2011-08-23 Panasonic Corporation Communication system
USRE41146E1 (en) 1992-03-26 2010-02-23 Panasonic Corporation Communication system
USRE43093E1 (en) 1992-03-26 2012-01-10 Panasonic Corporation Communication system
EP0746155A2 (en) * 1995-06-02 1996-12-04 Matsushita Electric Industrial Co., Ltd. Multistandards television receiver
EP0746155A3 (en) * 1995-06-02 1999-01-20 Matsushita Electric Industrial Co., Ltd. Multistandards television receiver
US6137537A (en) * 1995-06-02 2000-10-24 Matsushita Electric Industrial Co., Ltd. Television receiver for receiving multi-standards
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