JPH02149188A - Landing position correction device for electron beam of cathode ray tube - Google Patents

Abstract

PURPOSE:To attain high accuracy and quick processing by applying position correction based on a landing position correction quantity calculated by a specific digital calculation equation and a landing position correction quantity of each electron beam at plural points on a display screen of a cathode ray tube stored in a storage means. CONSTITUTION:The landing position of an electron beam is corrected based on k-set of landing position correction quantity calculated by a digital calculation means and a landing position correction quantity of each electron beam in plural points divided on a display screen of a cathode ray tube stored in a storage means at an equal interval. Landing position correction quantities H1-Hn-1 of each point being the result of k-equal division between two points the the middle from the landing position correction quantities A-D of each electron beam at four continuous points read from a storage means are calculated by a digital calculation means by using equation I, where P(k) is 1-(2k/n-1)<2> and q is a constant having a relation of 0.07<=q<=0.10. Thus, the landing position is corrected quickly with high accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a Landink position correction device for an electron beam of a cathode ray tube.

[Summary of the invention]

The present invention provides a storage means for storing Landek position correction amounts of each electron beam at a plurality of equally spaced points on a display surface of a cathode ray tube, and a From the land and ink position correction amounts A, B, C, and D of each electron beam, the land and ink position digital correction amounts HI and H for each point equally divided between the two central points.
2,..., Hkl..., Hn-t, Hk-13+q ((B-A) -(D-C)) P
(k)+(CB)k/n (However, P (k) = 1- (2k/n -1
) 2q is a constant of 0.07≦q≦0.10) It has a digital calculation means that performs a digital interpolation calculation using the formula, and a Landink position correction means for the electron beam of the cathode ray tube, and has a memory. Based on the Lande ink position correction amount of each electron beam at a plurality of points on the display surface of the cathode ray tube stored in the means and the Lande ink position correction amount k (II) calculated by the digital calculation means,
By correcting the land ink position of the electron beam on the display surface of the cathode ray tube, the land ink position of the electron beam can be corrected with high accuracy and quickly over the entire display surface of the cathode ray tube.

[Conventional technology]

Below, the conventional convergence correction device
101586) will be explained.

This convergence correction device is capable of highly accurate convergence correction, and is suitable for application to high-quality large-sized television receivers.

For such large television receivers, their CR
If the winding distribution of the T deflection coil lacks uniformity in any way, it is extremely difficult to compensate for convergence over the entire screen due to the non-uniform distribution of the deflection magnetic field. .

Therefore, the CRT screen is divided into a plurality of regions, the convergence correction amount for each region is stored in a memory, and the stored contents of the memory are read out in response to scanning of the fluorescent surface of the CRT with an electron beam. It has been proposed to perform good convergence correction over the entire CRT screen.

In this case, the larger the number of divided areas on the CRT screen, the more the CR
Although the convergence correction is true for the entire T screen, it has the disadvantage that the adjustment for the convergence correction becomes troublesome.

A convergence correction device improved in this respect will be described below with reference to FIG. 2. (20) is an antenna, (21) is a tuner, (22) is a video intermediate frequency amplifier, (23) is a video detection circuit, (24) is a changeover switch, and (25) and (31) are supplied with the output of the changeover switch. video output circuit and synchronization separation circuit, respectively (2
6) is a CRT, and (27) are horizontal and vertical deflection coils.

The horizontal synchronization signal and vertical synchronization signal from the synchronization separation circuit (31) are transmitted to the horizontal output circuit (29) and the vertical output circuit (3), respectively.
0) and the obtained horizontal and vertical deflection signals are supplied to the above-mentioned horizontal and vertical deflection coils (27).

(35) is a synchronous oscillator for forming horizontal and vertical synchronization signals, and the oscillation signal is transmitted by the crosshatch signal generation circuit (
36) and a cursor signal generation circuit (37). Then, the crosshatch signal consisting of 16 vertical and horizontal lines from the crosshatch signal generation circuit (36) is synthesized '14.
After being combined with the cursor signal from the cursor signal generation circuit (37) in (44), the changeover switch (24)
is supplied to the video output circuit (25) through the CRT
On the screen (26), as shown in FIG. 3, the desired cross portion is highlighted in a changing manner.

Any data signal from the microprocessor (39) passes through the register (40) to the multiplexer (45).
is supplied to Further, a signal corresponding to the scanning period of the desired cross portion described above from the cursor signal generating circuit (15) is supplied to the multiplexer (35), and the signal from the register (40) is taken out during this period. Then, this extracted signal is passed through a D/A converter (41), a low-pass filter (42), and an amplifier (43) to the CRT.
(26) Convergence correction coil installed in the neck part (a pair of electrostatic correction plates facing each other is also possible) (
22).

Further, the data signal from the processor (39) is supplied to the data input terminal of the storage means (33), and the address supplied from the processor (39) to the cursor signal generation circuit (32) is input to the data input terminal of the storage means (33). ), and a write/read control signal from the processor (39) is supplied to the control terminal of the storage means (33).

Furthermore, key signals from the keyboard (38) are supplied to the processor (39), which causes the above-mentioned registers (4
0) is changed. As a result, the convergence correction amount is adjusted, and the correct convergence correction amount is measured.

Furthermore, the data signal of the processor (39) is stored in the storage means (3).
The address signal supplied to the data terminal of 3) and supplied from the processor (39) to the cursor signal generation circuit (37) is supplied to the address terminal of the storage means (33), and the write/write signal from the processor (39) is supplied to the address terminal of the storage means (33). A read control signal is supplied to a control terminal of the storage means (33).

Further, horizontal and vertical periodic signals from the synchronization separation circuit (31) are supplied to an address signal generation circuit (32) to form address signals corresponding to horizontal and vertical scanning positions. This address signal is then supplied to the read address terminal of the storage means (33).

Then, the data signal read from the storage means (33) is passed through the vertical interpolation circuit (34) to the multiplexer (33).
5).

In such a convergence correction device, when the changeover switch (24) is switched to the combiner (44) side, the CRT
On the screen (26), for example, as shown in FIG. 4, a crosshatch image is displayed, which is obtained by dividing the screen into 16 equal parts vertically and horizontally.

Furthermore, when the "Auto" key is operated on the keyboard (38), as shown in Fig. 4, 25 cross sections surrounded by 25 broken lines are selected as representative adjustment points. The cross section surrounded by the broken line is displayed as shown in FIG. In this state, when the "red/blue" key or the "red/green" key is operated, the red and blue or red and green convergence correction mode is entered, respectively. Further, when the "up" or "down" key or the "right" or "left" key is operated, the convergence correction amount for red and blue or red and green is increased or decreased by a predetermined amount.

Then, when the convergence correction is completed,
When the "end" key is operated, the data of the convergence correction amount at that time is stored in the storage means (33).

Further, by operating a key, the address of the next representative adjustment point is output. In this way, the convergence at 25 full representative adjustment points is corrected, and data on the amount of correction at each point is stored in the storage means (33).

From these stored data, correction amounts for the remaining 231 cross portions are calculated. Here, as a calculation method, for example, as shown in FIG. The numerical values are added and the correction amounts for the two points between them are calculated. This calculation is performed in the horizontal and vertical directions, and the correction amounts for the remaining 231 cross portions are calculated. Note that the data in Oll, the 15th row and column in FIG. 4 are calculated from the data in the 2.3rd or 13.14th row and column, respectively, by linear approximation or the like.

These data are then stored in the storage means (33).

Furthermore, these data are read out from the storage means (33), and convergence correction is performed based on this data. In this state, manual adjustment is performed on the cross portion where the convergence correction is defective. That is,
A key on the keyboard (38) is operated to enter manual mode. Here, press the "Up" and "Down" keys or the "Right" and "Left" keys.
When a key is operated, the address output from the processor (39) is increased or decreased by 1 in the vertical and horizontal directions. Thereby, the correction amount of the convergence of the desired cross portion can be corrected by operating the key for the desired cross portion.

Furthermore, the storage means (33) has the following information in the 0th (top) row:
The numerical value of the measured point is stored, the numerical value of the vertical difference is stored in each subsequent row, and the numerical value of the vertical difference is stored in each subsequent row. By performing such storage, vertical interpolation (26) is configured as follows.

Now, in FIG. 6, addresses in the vertical direction (V) and horizontal direction (h) are supplied to the storage means (33).
The above-mentioned stored data is read out sequentially. The data signal from this storage means (33) is fed to a divider circuit (51) and divided by the number of horizontal scan lines between adjacent cross sections. If the number of horizontal scanning lines here is, for example, 16, division can be performed by shifting the data 4 bits lower. Furthermore, the shifted data signal is sent to the adder circuit (
52), the data is supplied to the register (53) that stores data for one horizontal period (16 locations), and the register (53) is driven and supplied according to the timing at which the above-mentioned horizontal address is supplied. The data and evening signals are transferred sequentially. Signals taken out from this register (53) are sequentially latched by a latch circuit (54). This latched signal is supplied to the multiplexer (18) and also to the adder circuit (52).

In this circuit, for vertical blanking as shown in FIG. 7A, the division (shift) circuit (51) receives a rear signal as shown in FIG. 7B and a rear signal as shown in FIG. 7C. A division (shift) abort signal is supplied. That is, the division circuit (51) is cleared outside the effective screen in the second half of the vertical period, and the data (true value) of the Oth row is cleared in a predetermined horizontal period during which the shift is stopped within the blanking period. taken out. Here, the data signal is composed of, for example, 8 bits, and the division circuit (51) has 4 decimal points.
It consists of 12 bits, 8 bits above the decimal point. Therefore, when a shift is stopped, a signal of 8 bits above the decimal point is output, and all 4 bits below the decimal point are set to 0, and during the shift period, a signal is output to the 4 bits below the decimal point and the 4 bits below the decimal point. , positive and negative signs are output in the upper 4 bits.

Further, the adder circuit (52) is also composed of 12 bits, 4 bits below the decimal point and 8 bits above the decimal point. Here, the signal from the above-mentioned division circuit (51) and the register (53
), the signals delayed by one horizontal period are added. Therefore,
In the 0th row, for example, when data Ao is supplied, the division circuit (51) outputs Ao, and then 1
When (A+-Ao) is supplied in the th row, the divider circuit (51) outputs (A1-Ao)/16, and the output of the adder circuit (52) is Ao + (A1- Ao)/16. When this addition is performed six times, the addition circuit (52)
The output becomes A1, and in the sequential horizontal scanning lines, 1/16 of the 15th data is continuously added, so that extrapolation by linear approximation is automatically performed.

Then, by supplying the rear signal to the launch circuit (54) as shown in Figure 7, the latch circuit (54)
For example, a signal as shown in FIG. 7 is output from the controller.

In this way, vertical interpolation is performed.

Note that horizontal interpolation is performed by a low-pass filter (42).

In this way, convergence correction is performed, but with this convergence correction device, it is only necessary to adjust only the 25 representative adjustment points and the defective points, which makes the adjustment extremely easy and eliminates defects. Since adjustments can be made to each point individually, extremely accurate adjustments can be made to all points.

Furthermore, by storing the vertical difference data in the storage means, the vertical interpolation circuit can be constructed from an adding circuit, so that the circuit construction can be greatly simplified.

Note that normal convergence correction is performed only in the circuit on the right side of the storage means. Therefore, we made it possible to separate the circuits surrounded by broken lines from the oscillation circuit (35) to the register (40) and the keyboard (38) through any boat, and to make adjustments by inserting these circuits into the boat only when making adjustments. You can also do it.

[Problem to be solved by the invention]

Therefore, the present invention covers the entire display surface of the cathode ray tube.
The purpose of the present invention is to propose a device for correcting the land ink position of an electron beam in a cathode ray tube, which can correct the land ink position of an electron beam with high precision and quickly.

[Means to solve the problem]

The present invention includes a storage means (33) for storing Landink position correction amounts for each electron beam at a plurality of equally spaced points on the display surface of a cathode ray tube (26), and reading from the storage means (33). From the Lande ink position correction amounts A, B, C, and D of each of the emitted consecutive four points, the lande ink position digital correction amounts H1, H2, and . ..., Hk, ..., H
n-+, Hk=B1q (CB-A) −(D-C)
}P (k)+ (C-B)k/n (However, P (k) = 1- (2k/n-1)
2q is a constant of 0.07≦q≦0.10) Digital calculation means (34) performs digital interpolation calculation using the formula; Landink position correction means (2q) for the electron beam of the cathode ray tube (26); 28), and the Landink position correction amount of each electron beam at a plurality of points on the display surface of the cathode ray tube (26) stored in the storage means (33) and calculated by the digital calculation means (34). The Lande ink position of the electron beam on the display surface of the cathode ray tube (26) is corrected based on the Lande ink position correction amount.

[Effect]

According to the present invention, the land ink position correction amount of each electron beam at a plurality of points on the display surface of the cathode ray tube (26) stored in the storage means (33) and calculated by the digital calculation means (34) The Lande ink position of the electron beam on the display surface of the cathode ray tube (26) is corrected based on the Lande ink position correction amount.

〔Example〕

Hereinafter, an embodiment in which the present invention is applied to the conventional convergence correction device shown in FIG. 2 described above will be described in detail. Here, the digital calculation means of the convergence correction device of this embodiment is applied to the vertical interpolation circuit of the conventional convergence correction device of FIG. 2, and the other configurations are the same as the conventional example described above. .

As shown in FIG. 4 on the display surface of the cathode ray tube (26) in FIG. Landink position correction amounts (for example, parallel 8-bit digital correction amounts) of each electron beam at four consecutive points are designated as A, B, and CSD, respectively, and are supplied to the input terminal (1) in this order. Further, sampling clock signals CK for these digital correction amounts A, B, C, and D are supplied to the input terminal (2).

Then, the land ink position digital correction amount H for each point equally divided between the two central points of these four consecutive points.
+ % H2,..., Hk,...Hn-+, Hk=B+q ((B-A) -(D-C)JP (
k) + (C-B)k/n (However, P (k) = 1- (2k/n-1) 2
q uses the formula 0.07≦q≦0.10 (D constant),
Performs digital interpolation calculations. Here, this k is supplied to the input terminal (3).

Digital correction amount A, BSC from input terminal (1).

D is sequentially supplied to the latch circuit (4) and the digital subtraction circuit (7). The output of the latch circuit (4) is supplied to a subtraction circuit (7) and a launch circuit (9).

The output of the latch circuit (9) is connected to the digital adder circuit (14).
is supplied to Also, the clock signal from the input terminal (2) is transmitted to the launch circuits (4), (8), (9) and (1o).
) are supplied respectively. Further, the output of the subtraction circuit (7) is supplied to a latch circuit (8) and a digital subtraction circuit (12). The output of the launch circuit (8) is supplied to a latch circuit (1o) and a digital multiplication circuit (11).

The signal k from the input terminal (3) is input to the digital divider circuit (5) that divides the input signal k by n, and the input signal k is divided by qP (k
) = q (1-(2k/n-1)) is supplied to the data conversion circuit (6) that performs 2k conversion.The output of the division circuit (5) is supplied to the multiplication circuit (11), and the latch circuit ( 8)
is multiplied by the output of , and the output is supplied to the adder circuit (14). The output of the latch circuit (1o) is the subtraction circuit (12)
The output of the subtraction circuit (7) is subtracted from the output of the launch circuit (1o).

The output of the subtraction circuit (12) and the output of the data conversion circuit (6) are supplied to a digital multiplication circuit (13) for multiplication, and the output thereof is supplied to an addition circuit (14). and,
The interpolated land and ink position digital correction amount Hk is output from the output terminal (15) of the adder circuit (14).

Then, the cathode ray tube (
The land ink position correction means (28) is controlled based on the land ink position correction amounts of each electron beam at a plurality of points on the display surface of 26) and the land ink position correction amounts calculated by the digital calculation means (34). Then, the land ink position of the electron beam on the display surface of the cathode ray tube (26) is corrected.

Next, the operation of the digital calculation means of this embodiment will be explained. Latch circuits (4), (8), (9) and (10)
operate as delay circuits each having a delay amount of one crotter cycle. Therefore, the correction amounts A, B, and C are input to the input terminal (1).
, D are input, the correction scale, A, and BSC are output to the output side of the latch circuit (4). Therefore, at this time, the latch circuit (4) outputs the correction scales A, B, and C, and the subtraction circuit (7) outputs the subtraction output D-
C, CB, BA, and AD are output. By supplying these subtracted outputs to the latch circuit (8), outputs CB, BA, AD, and DC are obtained, respectively. Moreover, by supplying these outputs to the latch circuit (10), outputs BA, AD, DC, and CB are output, respectively.

Therefore, at the time when the correction scale is input to the input terminal (1), the correction amount C is output from the launch circuit (4), the subtraction output D-C is output from the subtraction circuit (7), and the latch circuit (8) outputs the correction amount C. Output C-B is obtained, output B-A is obtained from the latch circuit (10), and output B is obtained from the latch circuit (9). Thus, the multiplication output (CB) k/n is obtained from the multiplication circuit (11). Then, the subtraction circuit (12
), the subtracted output (B-A) - (D-C) is obtained, and the converted output qP (k) = q (1-(2k/n-1) 2) is obtained from the data conversion circuit (6). , Therefore, from the multiplication circuit (13), the multiplication output q
((B=A)-(D-C)}P(k) is output.

Then, in the addition circuit (14), the correction amount B, the multiplication output (C-B)k/n, and the multiplication output q((B-A)-(D
−C)) P (k) is added to obtain the interpolated correction value Hk
=B+q((B-A)-(D-C))・P(k)+
(CB)k/n is output.

Thus, by performing this operation n-1 times,
The output terminal (15) outputs the Lande ink position digital correction amounts H11H2, . Hk, . . . )in-+ can be obtained. Then, such calculations are stored in a storage means (
33), the display screen of the cathode ray tube (26) is filled with the interpolated correction amount of each point divided at equal intervals by n-1. Try to repeat it several times.

In the above embodiment, the present invention was applied to a convergence correction device for a cathode ray tube, but it can also be applied to a pin distortion correction device, a uniformity correction device for a focusing device, etc. of a monochrome or color cathode ray tube, respectively. can also be used consecutively.

〔Effect of the invention〕

According to the present invention described above, it is possible to obtain a cathode ray tube electron beam land ink position correction device that can correct the electron beam land ink position with high precision and quickly over the entire display surface of the cathode ray tube. can.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a digital calculation means according to an embodiment of the present invention, FIG. 2 is a block diagram showing a conventional convergence correction device, and FIGS. FIG. 6 is a block diagram showing a part of the conventional device, and FIG. 7 is a timing chart that is consistent with the explanation of the conventional device. (26) is a cathode ray tube, (33) is a storage means, (34) is a vertical interpolation circuit, and (28) is an electron beam lancing position correction means. Matsukuma Hidemori qcori r) ni)

Claims (1)

[Scope of Claims] Storage means for storing the Landek position correction amount of each electron beam at a plurality of equally spaced points on the display surface of the cathode ray tube; Landink position correction amount A, B, C, D of each electron beam at the point
From, the land ink position digital correction amount H_1, H_2, ..., Hk, ..., H for each point divided into k equal parts between the two central points.
n_-_1, Hk=B+q{(B-A)-(D-C)}P(k)+(
C-B) k/n {However, P(k)=1-(2k/n-1)^2, q is 0
・A constant of 07≦q≦0.10} The digital calculation means calculates by performing digital interpolation calculation using the formula; and the Landink position correction means of the electron beam of the cathode ray tube; The display surface of the cathode ray tube is adjusted based on the stored Lande ink position correction amounts of each electron beam at a plurality of points on the display surface of the cathode ray tube and the Lande ink position correction amounts calculated by the digital calculation means. 1. A Lande ink position correction device for an electron beam of a cathode ray tube, characterized in that the Lande ink position correction of an electron beam on an upper part is performed.