JPH0214773B2 - - Google Patents
Info
- Publication number
- JPH0214773B2 JPH0214773B2 JP57027011A JP2701182A JPH0214773B2 JP H0214773 B2 JPH0214773 B2 JP H0214773B2 JP 57027011 A JP57027011 A JP 57027011A JP 2701182 A JP2701182 A JP 2701182A JP H0214773 B2 JPH0214773 B2 JP H0214773B2
- Authority
- JP
- Japan
- Prior art keywords
- etching
- compound semiconductor
- algaas
- gas
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000005530 etching Methods 0.000 claims description 44
- 239000004065 semiconductor Substances 0.000 claims description 32
- 239000007789 gas Substances 0.000 claims description 26
- 150000001875 compounds Chemical class 0.000 claims description 23
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 20
- 239000013078 crystal Substances 0.000 claims description 19
- 238000001020 plasma etching Methods 0.000 claims description 14
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 8
- VZGDMQKNWNREIO-UHFFFAOYSA-N tetrachloromethane Chemical compound ClC(Cl)(Cl)Cl VZGDMQKNWNREIO-UHFFFAOYSA-N 0.000 claims description 6
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 claims 1
- 239000010410 layer Substances 0.000 description 26
- 239000000470 constituent Substances 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 239000011241 protective layer Substances 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 238000001816 cooling Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 238000003776 cleavage reaction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000007017 scission Effects 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30612—Etching of AIIIBV compounds
- H01L21/30621—Vapour phase etching
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Semiconductor Lasers (AREA)
Description
【発明の詳細な説明】
〔発明技術分野〕
本発明は化合物半導体装置の製造方法に係わ
り、特にAlを構成元素として含む化合物半導体
結晶をプラズマエツチング装置によりエツチング
する工程の改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a compound semiconductor device, and more particularly to an improvement in the process of etching a compound semiconductor crystal containing Al as a constituent element using a plasma etching apparatus.
GaAs、InP等を主体とした−族化合物半
導体が半導体レーザ、発光ダイオードなどの材料
として使われている。又、化合物半導体は従来の
Siを基板としたものよりも高性能をもつ種種構造
の電界効果トランジスタやそれらを集積化したも
の、さらには電気的な集積回路と発光、受光素子
を集積化した光電気集積回路と称される新しい概
念のデバイスが開発されるに至つている。
- Group compound semiconductors mainly made of GaAs, InP, etc. are used as materials for semiconductor lasers, light emitting diodes, etc. In addition, compound semiconductors are
Field-effect transistors with various structures that have higher performance than those using Si as a substrate, and those that integrate them, are also called opto-electrical integrated circuits that integrate electrical integrated circuits, light emitting, and light receiving elements. Devices with new concepts are being developed.
一方、LSIなどの半導体デバイスの製造工程に
おいて生産性再現性の向上を目的に各プロセスの
ドライ化が進められているが、その中で、エツチ
ングのドライ化として反応性イオンエツチングと
呼ばれるプラズマエツチング方法がある。この方
法は、通常平行平板型の装置が用いられ、高周波
電力（13.56MHzが良く使用される。）が印加され
る電極（陰極）と対向する接地電極（陽極）を有
する真空容器に、たとえば10-2Torr程度にCl2や
CF4などのハロゲン系ガスを導入し、平行平板電
極に高周波電力を印加する。これによりグロー放
電が生じ電子とイオンの易動度の差により陰極が
負に自己バイアスされ、陰極上に暗部を生じると
共に、自己バイアスにより陰極降下電圧Vdcが生
じ、このVdcによつてプラズマ内の反応性イオン
が加速されて陰極上の試料に衝突する。同時に、
被エツチング原子が反応性イオンと反応して揮発
性の強い分子を構成しガスとなり除去されること
によつてエツチングがおこなわれる。この方法
は、現在適当な条件の選択により1μｍ程度のマ
スクパターン幅を異方性エツチングすることが可
能であるため、アンダーカツトを一般的な傾向と
する湿式エツチングに比べて高密度、高性能の集
積回路の製造上不可決な技術となつている。 On the other hand, in order to improve productivity reproducibility in the manufacturing process of semiconductor devices such as LSI, various processes are being made dry, and among these processes, a plasma etching method called reactive ion etching is being used to make dry etching. There is. In this method, a parallel plate type device is usually used, and for example, 10 Cl 2 and
A halogen-based gas such as CF 4 is introduced, and high-frequency power is applied to the parallel plate electrodes. This causes a glow discharge, and the cathode is self-biased negatively due to the difference in mobility between electrons and ions, creating a dark area on the cathode, and the self-bias produces a cathode drop voltage V dc , which increases the plasma The reactive ions inside are accelerated and collide with the sample on the cathode. at the same time,
Etching is performed when the atoms to be etched react with reactive ions to form highly volatile molecules, which become gas and are removed. With this method, it is currently possible to anisotropically etch a mask pattern width of about 1 μm by selecting appropriate conditions, so it is possible to achieve higher density and higher performance than wet etching, which generally tends to produce undercuts. It has become an indispensable technology in the production of integrated circuits.
GaAsを基板として、Alの混晶比の異なる複数
のAlGaAs結晶を積層して半導体レーザ、発光ダ
イオード、フオトダイオードやこれらの集積化素
子がつくられるが、これらのデバイスの製造に上
記反応性イオンエツチングを使用することは極め
て有効である。例えば半導体レーザの場合、従来
レーザ共振器端面は人手によるへき開作業により
作られ、極めて生産性の悪いプロセスであつた
が、反応性イオンエツチングを用いればモノリシ
ツクに端面を形成でき、工業的価値が高い。又埋
め込み型レーザのメサエツチングは現在湿式エツ
チングによりおこなわれているが、この湿式エツ
チングによる１〜2μｍ領域の制御は極めて厳し
く、再現性の乏しいプロセスである。これに対し
て、反応性イオンエツチングを用いて垂直メサエ
ツチングすることができればデバイスの設計等に
おいても極めて有利である。その他にも基板の加
工、バラス形発光ダイオードの穴あけ加工などに
も反応性イオンエツチングは有力な手段である。 Semiconductor lasers, light emitting diodes, photodiodes, and integrated devices thereof are manufactured by stacking multiple AlGaAs crystals with different Al mixed crystal ratios using GaAs as a substrate. It is extremely effective to use For example, in the case of semiconductor lasers, conventional laser resonator end faces were made by manual cleavage, a process with extremely low productivity.However, reactive ion etching allows the end faces to be formed monolithically, which has high industrial value. . Furthermore, mesa etching for embedded lasers is currently carried out by wet etching, but this wet etching has extremely strict control over the 1 to 2 .mu.m region and is a process with poor reproducibility. On the other hand, if vertical mesa etching could be performed using reactive ion etching, it would be extremely advantageous in device design and the like. In addition, reactive ion etching is an effective method for processing substrates and drilling holes in rose-shaped light emitting diodes.
以上のような有効性があるにもかかわらず、化
合物半導体デバイスの製造工程に反応性イオンエ
ツチングを使用することは従来のSiや金属等の加
工の場合に比べて以下にあげるような問題点が生
じるためいまだ実用の域に達していない。 Despite the above-mentioned effectiveness, using reactive ion etching in the manufacturing process of compound semiconductor devices has the following problems compared to conventional processing of Si and metals. This has not yet reached the level of practical use.
化合物半導体の場合、被エツチング物質が数
種の原子で構成されるため、複数の原子を同時
にエツチングする条件を選択する必要があり非
常に複雑で末だ多くのことは知られていない。 In the case of compound semiconductors, since the material to be etched is composed of several types of atoms, it is necessary to select conditions for etching multiple atoms at the same time, which is very complicated and much remains unknown.
現在開発されている反応性イオンエツチング
技術は、そのほとんどが1μｍ以下の深さをエ
ツチングするためのものである。一方、半導体
レーザプロセス等の場合は、共振器端面やメサ
の形成のために5μｍ程度までのエツチング深
さが必要であり従来の技術や条件を適用するこ
とができない。 Most of the reactive ion etching techniques currently being developed are for etching to a depth of 1 μm or less. On the other hand, in the case of a semiconductor laser process, etc., an etching depth of up to about 5 μm is required to form a resonator end face and a mesa, and conventional techniques and conditions cannot be applied.
GaAsに対する反応性イオンエツチング用ガ
スとしてはCCl2F2、Cl2ガスなどが知られてい
るが、AlGaAsに対する反応性ガスは知られて
いない。本発明者等の実験によれば上記ガスで
はAlGaAsはエツチングされないことが確認さ
れた。Al金属のエツチング用ガスとしては
Cl2、CCl4、BCl3等が知られておりこの事実に
もとづいてCCl4ガスを用いてAlGaAsのエツチ
ングをおこなつたがエツチングレートが極めて
小さくマスク材料とのエツチング選択比がとれ
ない等の問題からデバイスプロセスに使用する
こととはできない。 Although CCl 2 F 2 and Cl 2 gases are known as reactive ion etching gases for GaAs, there are no known reactive gases for AlGaAs. According to experiments conducted by the present inventors, it has been confirmed that AlGaAs is not etched by the above gas. As a gas for etching Al metal
Cl 2 , CCl 4 , BCl 3 , etc. are known, and based on this fact, AlGaAs was etched using CCl 4 gas, but the etching rate was extremely low and the etching selectivity with the mask material could not be maintained. Due to the problem, it cannot be used for device processes.
本発明者等の実験により、AlGaAs結晶表面
にAlを含まない保護層を連続的に形成したの
ちにはCl2ガスによつて上記保護層及び
AlGaAs層をエツチングできることが確認され
た。しかしこのような保護層はデバイスの設計
上、不適当であるだけでなく異方性エツチング
の条件下ではエツチングレートが極めて小さく
デバイスプロセスとして使用することができな
い。さらにAlの混晶比の異なる複数のAlGaAs
層を積層した場合は結晶表面上に上記保護層を
形成しても各AlGaAs層の境界部分でエツチン
グの停止が生じてしまう。 Through experiments conducted by the present inventors, after forming a protective layer that does not contain Al on the AlGaAs crystal surface, the protective layer and the
It was confirmed that AlGaAs layers can be etched. However, such a protective layer is not only inappropriate in terms of device design, but also has an extremely low etching rate under anisotropic etching conditions, making it impossible to use it as a device process. Furthermore, multiple AlGaAs with different Al mixed crystal ratios
When layers are stacked, etching will stop at the boundary between each AlGaAs layer even if the protective layer is formed on the crystal surface.
本発明は前記の問題点を考慮してなされたもの
でプラズマエツチング装置を用いてAlを構成元
素に含むAlGaAsからなる化合物半導体結晶を深
く異方性エツチングすることを可能とした化合物
半導体装置の製造方法を提供するものである。
The present invention has been made in consideration of the above-mentioned problems, and manufactures a compound semiconductor device that enables deep anisotropic etching of a compound semiconductor crystal made of AlGaAs containing Al as a constituent element using a plasma etching device. The present invention provides a method.
AlGaAsなどAlを構成元素として含む化合物半
導体は非常に酸化されやすく一旦空気に晒される
と、その表面に酸化膜が形成される。AlGaAs結
晶が従来のプラズマエツチングでエツチングされ
ない原因は結晶表面に形成される上記酸化膜がエ
ツチングを阻止することにあると考えられる。そ
してこの表面酸化膜を効果的にエツチングするた
めの適当なガスとしてCCl4が考えられる。しか
し前記のように、CCl4のみではエツチングレー
トがきわめて小さく実用性はない。そこで本発明
者らはCCl4にCl2を混合することによつて、異方
性エツチングであつてかつ、デバイスプロセス上
必要な値までエツチングレートを高めることを試
みた。
Compound semiconductors containing Al as a constituent element, such as AlGaAs, are highly susceptible to oxidation and once exposed to air, an oxide film is formed on their surfaces. The reason why AlGaAs crystals are not etched by conventional plasma etching is thought to be that the oxide film formed on the crystal surface prevents etching. CCl 4 is considered to be an appropriate gas for effectively etching this surface oxide film. However, as mentioned above, CCl 4 alone has an extremely low etching rate and is not practical. Therefore, the present inventors attempted to achieve anisotropic etching and increase the etching rate to a value necessary for device processing by mixing Cl 2 with CCl 4 .
又、この場合各種マスク材料と被エツチング物
質との選択比が大きいこともデバイス製造の際重
要である。本発明者等の実験では、CCl4ガス単
独によるAlGaAsのエツチングレートは0.04μ
ｍ／min以下であり、一方Cl2とCCl4を混合した
ガスを用いると異方性エツチング条件においても
0.3μｍ／min以上と、CCl4より１桁大きいエツチ
ングレートが得られた。又、この時のAlGaAsと
レジスト、Al2O3、SiO2等のマスク材料との選択
比は3.5以上で実用範囲であつた。さらにAlの混
晶比の異なる複数のAlGaAsを連続的に成長形成
した積層構造の場合も上記の混合ガスによつて大
きいエツチングレートで異方性エツチングが達成
された。 In this case, it is also important in device manufacturing that the selection ratio between the various mask materials and the material to be etched is high. In experiments conducted by the present inventors, the etching rate of AlGaAs using CCl4 gas alone was 0.04μ.
m/min or less, and on the other hand, when using a gas mixture of Cl 2 and CCl 4 , even under anisotropic etching conditions,
An etching rate of 0.3 μm/min or higher, which is one order of magnitude higher than that of CCl 4 , was obtained. Further, the selectivity ratio between AlGaAs and mask materials such as resist, Al 2 O 3 and SiO 2 at this time was 3.5 or more, which was within the practical range. Furthermore, in the case of a stacked structure in which a plurality of AlGaAs with different Al mixed crystal ratios were successively grown, anisotropic etching was achieved at a high etching rate using the above mixed gas.
以上から本発明は、AlGaAs等のAlを含む化合
物半導体結晶をプラズマエツチングするに際し
て、CCl4とCl2の混合ガスを用いることを特徴と
する。 As described above, the present invention is characterized in that a mixed gas of CCl 4 and Cl 2 is used when plasma etching a compound semiconductor crystal containing Al such as AlGaAs.
本発明によればAlを構成元素として含む化合
物半導体を反応性イオンエツチング法によつて
5μｍ程度の深さまで異方性エツチングすること
ができる。化合物半導体装置の製造工程にこのエ
ツチングプロセスを導入した場合、生産性、再現
性及び素子の設計上の容易度は、従来の湿式エツ
チングプロセスに比べて大幅に改良されるため、
その工業的価値は極めて高い。
According to the present invention, a compound semiconductor containing Al as a constituent element is etched by reactive ion etching.
Anisotropic etching can be performed to a depth of approximately 5 μm. When this etching process is introduced into the manufacturing process of compound semiconductor devices, the productivity, reproducibility, and ease of device design will be greatly improved compared to the conventional wet etching process.
Its industrial value is extremely high.
本発明の詳細を図示の実施例によつて説明す
る。
The details of the invention will be explained by means of illustrated embodiments.
第１図は本発明に用いた化合物半導体装置の
Alを構成元素として含む化合物半導体をエツチ
ングするための平行平板型装置の概略を示してい
る。例えばステンレス製の真空容器１にエツチン
グ用ガス導入口２，３が設けられ、それぞれから
Cl2ガスとCCl4ガスが導入される。対向配置され
た二枚の電極４，５はテフロンなどの絶縁物６に
よつて真空容器１から絶縁されている。高周波電
力は、高周波電源（13.56MHz）７から整合器８
を経て、Alを構成元素として含む化合物半導体
結晶が成長形成されているウエハー９が置かれた
一方の電極４に印加され他方の電極５は接地の状
態になつている。ここで両電極４，５は水冷パイ
プ１０により冷却されており、これと陰極電極４
への高周波印加端子は真空容器１の外部へ真空シ
ール１１を通して引き出されている。Cl2ガスと
CCl4ガスはルーツポンプやロータリーポンプな
どの排気手段で残留ガスを十分排気した後に導入
され、コンダクタンスバルブ１２によつてエツチ
ング圧力が調整されるようになつている。１３は
のぞき窓である。電極４に高周波電力が印加され
るとグロー放電を生じ、ガスプラズマが発生しエ
ツチングが開始される。 Figure 1 shows the compound semiconductor device used in the present invention.
This figure schematically shows a parallel plate type device for etching a compound semiconductor containing Al as a constituent element. For example, a vacuum container 1 made of stainless steel is provided with etching gas inlets 2 and 3.
Cl2 gas and CCl4 gas are introduced. Two electrodes 4 and 5 arranged opposite to each other are insulated from the vacuum vessel 1 by an insulator 6 such as Teflon. High frequency power is supplied from high frequency power supply (13.56MHz) 7 to matching box 8.
After that, an electric current is applied to one electrode 4 on which a wafer 9 on which a compound semiconductor crystal containing Al as a constituent element is grown is placed, and the other electrode 5 is grounded. Here, both electrodes 4 and 5 are cooled by a water cooling pipe 10, and this and the cathode electrode 4
A high frequency application terminal for the is drawn out to the outside of the vacuum container 1 through a vacuum seal 11. Cl2 gas and
The CCl 4 gas is introduced after the residual gas is sufficiently exhausted by an exhaust means such as a Roots pump or a rotary pump, and the etching pressure is adjusted by a conductance valve 12. 13 is a peephole. When high frequency power is applied to the electrode 4, a glow discharge is generated, gas plasma is generated, and etching is started.
第２図から第５図はそれぞれ本発明の一実施例
に係わる埋め込み型半導体レーザの製造工程をし
めす断面模式図である。まず第２図に示す如く
GaAs基板２１上に、Al0.35Ga0.65As層２２、
Al0.2Ga0.8As層２３、Al0.05Ga0.995As層２４、
Al0.2Ga0.8As層２５、Al0.35Ga0.65As層２６、
GaAs層２７、Al0.6Ga0.4As層２８を連続的に成
長形成した。基板上の積層体の膜厚は5μｍ程度
である。次に第３図に示す如く成長形成した上記
AlGaAs積層体表面にレジストを塗布し、このレ
ジストをパターンニングしてストライプ状のレジ
ストパターン２９を形成した。しかるのち、上記
レジストパターン２９をマスクとして、第１図に
示した平行平板型装置を用いCl2ガスとCCl4ガス
をそれぞれ0.02〔Torr〕、0.05〔Torr〕の圧力で混
合しエツチング圧力を0.06〔Torr〕に調節し、高
周波電力300〔Ｗ〕でエツチングをおこなつたとこ
ろ、第４図に示す如く上記AlGaAs積層体が選択
エツチングされた。 FIGS. 2 to 5 are schematic cross-sectional views each showing the manufacturing process of an embedded semiconductor laser according to an embodiment of the present invention. First, as shown in Figure 2
On the GaAs substrate 21, an Al 0.35 Ga 0.65 As layer 22,
Al 0.2 Ga 0.8 As layer 23, Al 0.05 Ga 0.995 As layer 24,
Al 0.2 Ga 0.8 As layer 25, Al 0.35 Ga 0.65 As layer 26,
A GaAs layer 27 and an Al 0.6 Ga 0.4 As layer 28 were successively grown. The film thickness of the laminate on the substrate is about 5 μm. Next, the above was grown and formed as shown in Figure 3.
A resist was applied to the surface of the AlGaAs laminate, and this resist was patterned to form a striped resist pattern 29. Thereafter, using the resist pattern 29 as a mask, Cl 2 gas and CCl 4 gas were mixed at pressures of 0.02 [Torr] and 0.05 [Torr], respectively, using the parallel plate type apparatus shown in FIG. 1, and the etching pressure was set to 0.06. [Torr] and etching was carried out with a high frequency power of 300 [W], and as shown in FIG. 4, the AlGaAs laminate was selectively etched.
次に第５図に示す如くレジストパターン２９を
除去して、Al0.6Ga0.4As層２８を選択結晶成長マ
スクとして、GaAs基板２１上に埋め込み層３０
を選択的に形成する。しかるのち、このAl0.6
Ga0.4As層２８を除去し埋め込み層３０の上に絶
縁層３１を形成しGaAs層２７に電極３２を真空
蒸着により形成する。又GaAs層２１の反対側に
もう１つの電極３３を形成することにより埋め込
み型半導体レーザが構成される。 Next, as shown in FIG. 5, the resist pattern 29 is removed, and a buried layer 30 is grown on the GaAs substrate 21 using the Al 0.6 Ga 0.4 As layer 28 as a selective crystal growth mask.
selectively formed. Afterwards, this Al 0.6
The Ga 0.4 As layer 28 is removed, an insulating layer 31 is formed on the buried layer 30, and an electrode 32 is formed on the GaAs layer 27 by vacuum evaporation. Further, by forming another electrode 33 on the opposite side of the GaAs layer 21, a buried semiconductor laser is constructed.
本実施例によれば、Alの混晶比の違によるエ
ツチング形状の相違はなく、メサエツチングの側
面はほとんど平たんで、サイドエツチングはおこ
らない。又、エツチング開始時の時間のおくれも
生じない。上記条件におけるレジストとGaAs、
AlGaAsとのエツチング選択比は３〜４であり5μ
程度の深いエツチングに十分適用できることが明
らかなつた。 According to this example, there is no difference in the etching shape due to the difference in the Al mixed crystal ratio, and the side surfaces of the mesa etching are almost flat, and no side etching occurs. Further, there is no time lag at the start of etching. Resist and GaAs under the above conditions,
The etching selectivity with AlGaAs is 3 to 4 and 5μ
It is clear that this method can be sufficiently applied to deep etching.
なお本発明は前記の実施例に限定されるもので
はない。例えばAlを構成元素として含む化合物
半導体装置であれば半導体レーザに限らず発光ダ
イオードのような他の発光素子にも適用できる。
又、実施例で使用したエツチング条件に限らず、
被エツチング物質である化合物半導体結晶によつ
て最適条件が変化することもありうる。その他本
発明の要旨を逸脱しない範囲で種々変形して実施
することができる。 Note that the present invention is not limited to the above embodiments. For example, a compound semiconductor device containing Al as a constituent element can be applied not only to semiconductor lasers but also to other light emitting elements such as light emitting diodes.
In addition, not only the etching conditions used in the examples,
The optimum conditions may change depending on the compound semiconductor crystal that is the material to be etched. In addition, various modifications can be made without departing from the gist of the present invention.
第１図は本発明に使用したエツチング装置の概
略断面図、第２図から第５図は本発明の一実施例
に係わる埋め込み型半導体レーザの製造工程を示
す断面模式図である。
１……真空容器、２，３……エツチングガス導
入口、４，５……電極、６……絶縁物、７……
13.56MHzの高周波電源、８……整合器、９……
Alを構成元素として含む化合物半導体結晶の形
成されたウエハー、１０……冷却用パイプ、１１
……真空シール、１２……バルブ、１３……のぞ
き窓、２１……GaAs基板、２２……Al0.35Ga0.65
As層、２３……Al0.2Ga0.8As層、２４……Al0.005
Ga0.995As層、２５……Al0.2Ga0.8As層、２６……
Al0.35Ga0.65As層、２７……GaAs層、２８……
Al0.6Ga0.4As層、２９……レジストパターン、３
０……埋め込み層、３１……絶縁層、３２，３３
……電極。
FIG. 1 is a schematic cross-sectional view of an etching apparatus used in the present invention, and FIGS. 2 to 5 are cross-sectional schematic views showing the manufacturing process of an embedded semiconductor laser according to an embodiment of the present invention. 1... Vacuum container, 2, 3... Etching gas inlet, 4, 5... Electrode, 6... Insulator, 7...
13.56MHz high frequency power supply, 8... matching box, 9...
Wafer formed with compound semiconductor crystal containing Al as a constituent element, 10...Cooling pipe, 11
...Vacuum seal, 12...Valve, 13...Peephole, 21...GaAs substrate, 22...Al 0.35 Ga 0.65
As layer, 23...Al 0.2 Ga 0.8 As layer, 24...Al 0.005
Ga 0.995 As layer, 25... Al 0.2 Ga 0.8 As layer, 26...
Al 0.35 Ga 0.65 As layer, 27...GaAs layer, 28...
Al 0.6 Ga 0.4 As layer, 29...Resist pattern, 3
0...Buried layer, 31...Insulating layer, 32, 33
……electrode.
Claims (1)
極を有し、この電極間に高周波電力を印加する手
段およびこの真空容器内にガスを導入する手段を
具備したプラズマエツチング装置を用い、前記ガ
スとして塩素ガスと四塩化炭素ガスを導入し、前
記高周波電力の印加によつて発生したプラズマに
よりAlGaAsからなる化合物半導体結晶をエツチ
ングする工程を有することを特徴とする化合物半
導体装置の製造方法。 ２ 前記化合物半導体結晶はGaAs基板上に形成
された混晶比の異なるAlGaAsの積層体である特
許請求の範囲第１項記載の化合物半導体装置の製
造方法。 ３ 前記エツチング工程はエツチング深さ1μｍ
以上を得るものである特許請求の範囲第１項記載
の化合物半導体装置の製造方法。[Scope of Claims] 1. Plasma etching having two electrodes arranged opposite to each other in a vacuum container, and equipped with means for applying high frequency power between the electrodes and means for introducing gas into the vacuum container. A compound semiconductor device comprising the step of using an apparatus to introduce chlorine gas and carbon tetrachloride gas as the gases, and etching a compound semiconductor crystal made of AlGaAs with plasma generated by applying the high frequency power. manufacturing method. 2. The method of manufacturing a compound semiconductor device according to claim 1, wherein the compound semiconductor crystal is a laminate of AlGaAs having different crystal mixing ratios formed on a GaAs substrate. 3 The etching process has an etching depth of 1 μm.
A method for manufacturing a compound semiconductor device according to claim 1, which obtains the above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2701182A JPS58143530A (en) | 1982-02-22 | 1982-02-22 | Manufacture of compound semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2701182A JPS58143530A (en) | 1982-02-22 | 1982-02-22 | Manufacture of compound semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58143530A JPS58143530A (en) | 1983-08-26 |
| JPH0214773B2 true JPH0214773B2 (en) | 1990-04-10 |
Family
ID=12209159
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2701182A Granted JPS58143530A (en) | 1982-02-22 | 1982-02-22 | Manufacture of compound semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58143530A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0741986U (en) * | 1993-12-28 | 1995-07-21 | 株式会社貝野鉄工所 | Welder grounding member |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH073826B2 (en) * | 1982-02-26 | 1995-01-18 | 富士通株式会社 | Method for manufacturing semiconductor device |
| EP0144142B1 (en) * | 1983-11-30 | 1991-12-18 | Kabushiki Kaisha Toshiba | Method of fabrication a semiconductor laser |
| JPS60117631A (en) * | 1983-11-30 | 1985-06-25 | Toshiba Corp | Dry etching method of compound semiconductor |
| JP2654454B2 (en) * | 1988-04-29 | 1997-09-17 | 豊田合成株式会社 | Dry etching method for semiconductor |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5518399A (en) * | 1978-07-27 | 1980-02-08 | Eaton Corp | Plasma etching method of aluminium article |
| JPS5629328A (en) * | 1979-08-17 | 1981-03-24 | Toshiba Corp | Plasma etching method |
-
1982
- 1982-02-22 JP JP2701182A patent/JPS58143530A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5518399A (en) * | 1978-07-27 | 1980-02-08 | Eaton Corp | Plasma etching method of aluminium article |
| JPS5629328A (en) * | 1979-08-17 | 1981-03-24 | Toshiba Corp | Plasma etching method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0741986U (en) * | 1993-12-28 | 1995-07-21 | 株式会社貝野鉄工所 | Welder grounding member |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58143530A (en) | 1983-08-26 |
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