JPH02145451U - - Google Patents

Info

Publication number
JPH02145451U
JPH02145451U JP1471189U JP1471189U JPH02145451U JP H02145451 U JPH02145451 U JP H02145451U JP 1471189 U JP1471189 U JP 1471189U JP 1471189 U JP1471189 U JP 1471189U JP H02145451 U JPH02145451 U JP H02145451U
Authority
JP
Japan
Prior art keywords
tabulation
processing
stored
host
microprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1471189U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1471189U priority Critical patent/JPH02145451U/ja
Publication of JPH02145451U publication Critical patent/JPH02145451U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の構成(ホストとの分散)例で
ある。第2図は本考案に対する従来構成概略図で
ある。 10…必要時又はシステム動作時に設定する情
報、11…作表時の必要データ書込み、12,1
3…独自処理のマイクロ・プロセツサ及びデータ
メモリ、14,15…行管理、印字制御するもの
と実際に出力する装置。
FIG. 1 shows an example of the configuration of the present invention (distribution with hosts). FIG. 2 is a schematic diagram of a conventional configuration of the present invention. 10...Information to be set when necessary or during system operation, 11...Writing of necessary data during tabulation, 12,1
3...Original microprocessor and data memory, 14, 15...Line management, printing control, and actual output device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 作表フオーマツトと作表処理をマイクロ・プロ
セツサに保有し作表すべき各種データは大容量メ
モリにて積算処理用ホストより受信記憶し、ホス
ト計算機の処理に影響無く独自に各種作表するこ
とを特徴とする作表装置。
The tabulation format and tabulation processing are stored in the microprocessor, and the various data to be tabulated are received and stored in the large-capacity memory from the integration processing host, and various tabulations are independently performed without affecting the processing of the host computer. A tabulation device for
JP1471189U 1989-02-10 1989-02-10 Pending JPH02145451U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1471189U JPH02145451U (en) 1989-02-10 1989-02-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1471189U JPH02145451U (en) 1989-02-10 1989-02-10

Publications (1)

Publication Number Publication Date
JPH02145451U true JPH02145451U (en) 1990-12-10

Family

ID=31518057

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1471189U Pending JPH02145451U (en) 1989-02-10 1989-02-10

Country Status (1)

Country Link
JP (1) JPH02145451U (en)

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