JPH02144986A - High density package - Google Patents

High density package

Info

Publication number
JPH02144986A
JPH02144986A JP63298369A JP29836988A JPH02144986A JP H02144986 A JPH02144986 A JP H02144986A JP 63298369 A JP63298369 A JP 63298369A JP 29836988 A JP29836988 A JP 29836988A JP H02144986 A JPH02144986 A JP H02144986A
Authority
JP
Japan
Prior art keywords
wiring board
wiring boards
electronic circuit
horizontal
slit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63298369A
Other languages
Japanese (ja)
Inventor
Takeshi Taketomi
武富　剛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63298369A priority Critical patent/JPH02144986A/en
Publication of JPH02144986A publication Critical patent/JPH02144986A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/366—Assembling printed circuits with other printed circuits substantially perpendicularly to each other

Landscapes

  • Coupling Device And Connection With Printed Circuit (AREA)
  • Combinations Of Printed Boards (AREA)
  • Multi-Conductor Connections (AREA)

Abstract

PURPOSE:To enable high density packaging with three dimensional arrangement of electronic circuit parts by providing a plurality of vertical wiring boards having a slit at each side edge thereof and installed vertically with horizontal spacing therebetween on a base wiring board, and horizontal wiring boards each of which is held so that a part thereof facing the slit. CONSTITUTION:A multiplicity of electronic circuit parts 12 and input/output pins 13 are provided on the top and bottom surfaces of a base wiring board 11. A plurality of vertical wiring boards 14 are mounted to the base wiring board 11 via fixed joint 15, and installed vertically with horizontal spacing, and each side edge thereof is provided with a slit 16 whose opening facing in the same direction. Horizontal wiring boards 17, each of which has a part facing the slit 16, are held relative to and connected by connectors 18 to the vertical wiring boards 14, and many electronic circuit parts 19 are provided on their one surface sides. The connectors 18 for connecting the horizontal wiring boards 17 and the vertical wiring boards 14 to each other achieve the connection by pressing electrically conductor 20 consisting of film patterns against both wiring boards 14, 17. In this construction of a package, three dimensional arrangement of the electronic circuit parts 12, 19 can be effected relative to the base wiring board 11.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、例えば大規模集積回路（ＬＳＩ）等の電子回
路をパッケージングして使用する高密度パッケージに関
する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a high-density package used to package electronic circuits such as large-scale integrated circuits (LSI).

〔従来の技術〕[Conventional technology]

近年、ＬＳＩチップの高集積化、高速化に伴い、電子回
路装置を小型で高機能にする要求から高密度パッケージ
によって実装の高密度化が進んできている。In recent years, as LSI chips have become more highly integrated and faster, the demand for electronic circuit devices to be smaller and more functional has led to higher density packaging through high-density packages.

従来、この種の高密度パッケージは第３図に示すように
構成されている。これを同図に基づいて説明すると、同
図において、符号１で示すものはその表裏面に入出力用
のピン２とＬＳＩ等の電子回路部品３を有する配線基板
である。Conventionally, this type of high-density package has been constructed as shown in FIG. This will be explained based on the figure. In the figure, the reference numeral 1 is a wiring board having input/output pins 2 and electronic circuit components 3 such as LSI on its front and back surfaces.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

ところで、従来の高密度パッケージにおいては、配線基
板１の片面にのみ電子回路部品３を実装するもの、すな
わち電子回路部品３の実装を２次元配置するものである
ため、同一平面内に実装可能な電子回路部品数が制約を
受け、近年における電子回路の高集積化に伴う電子回路
部品３の高密度実装化に応じることができないという問
題があった。By the way, in the conventional high-density package, the electronic circuit components 3 are mounted only on one side of the wiring board 1, that is, the electronic circuit components 3 are mounted in a two-dimensional arrangement, so that the electronic circuit components 3 can be mounted on the same plane. There is a problem in that the number of electronic circuit components is limited and it is not possible to meet the high density packaging of electronic circuit components 3 that has accompanied the recent increase in the degree of integration of electronic circuits.

本発明はこのような事情に鑑みてなされたもので、ベー
ス配線基板に対して電子回路部品を３次元配置すること
ができ、もって近年における電子回路の高集積化に伴う
電子回路部品の高密度実装化に応じることができる高密
度パッケージを提供するものである。The present invention has been made in view of the above circumstances, and allows electronic circuit components to be three-dimensionally arranged on a base wiring board, thereby increasing the density of electronic circuit components accompanying the recent increase in the degree of integration of electronic circuits. This provides a high-density package that can be implemented in a variety of ways.

〔課題を解決するための手段〕[Means to solve the problem]

本発明に係る高密度パッケージは、表裏面側にピンと電
子回路部品を有するベース配線板と、このベース配線板
に実装されかつ水平方向に間隔をもって立設されその各
側縁に同一方向に開口するスリットを有する複数の垂直
配線板と、これら垂直配線板にスリットに一部が臨むよ
うに保持されかつコネクタによって接続された水平配線
板とを備えたものである。The high-density package according to the present invention includes a base wiring board that has pins and electronic circuit components on the front and back sides, and is mounted on the base wiring board and stands upright at intervals in the horizontal direction, and has openings in the same direction on each side edge. The device is equipped with a plurality of vertical wiring boards having slits, and a horizontal wiring board held by the vertical wiring boards so that a portion thereof faces the slits and connected by a connector.

〔作　用〕[For production]

本発明においては、ベース配線板のみならず垂直配線板
および水平配線板に多数の電子回路部品を実装すること
ができる。In the present invention, a large number of electronic circuit components can be mounted not only on the base wiring board but also on the vertical wiring board and the horizontal wiring board.

〔実施例〕〔Example〕

以下、本発明の構成等を図に示す実施例によって詳細に
説明する。EMBODIMENT OF THE INVENTION Hereinafter, the structure etc. of this invention will be explained in detail by the Example shown in the figure.

第１図（ａ）および（ｂ）は本発明に係る高密度パッケ
ージを示す斜視図とそのｂ−ｂ線断面図である。FIGS. 1(a) and 1(b) are a perspective view and a cross-sectional view taken along line bb--b of the high-density package according to the present invention.

同図において、符号１１で示すものは多層構造をもつベ
ース配線板で、表裏面側に多数の電子回路部品１２と入
出力用ピン１３が設けられている。１４は電子回路部品
（図示せず）を搭載可能なスペースを有する複数の垂直
配線板で、前記ベース配線板１１に対し固定接続体１５
を介して実装され、かつ水平方向に間隔をもって立設さ
れており、各側縁には同一の方向に開口するスリット１
６が形成されている。１７はその一部が前記スリット１
６に臨む水平配線板で、前記垂直配線板１４に対して保
持され、かつコネクタ１８によって接続されており、一
方面側には多数の電子回路部品１９が設けられている。In the figure, the reference numeral 11 indicates a base wiring board having a multilayer structure, and a large number of electronic circuit components 12 and input/output pins 13 are provided on the front and back sides. Reference numeral 14 denotes a plurality of vertical wiring boards having spaces in which electronic circuit components (not shown) can be mounted, and a fixed connection body 15 is connected to the base wiring board 11.
The slits 1 are mounted through the slits and are erected at intervals in the horizontal direction, with slits 1 opening in the same direction on each side edge.
6 is formed. 17, a part of which is the slit 1
A horizontal wiring board facing 6 is held against the vertical wiring board 14 and connected by a connector 18, and a large number of electronic circuit components 19 are provided on one side.

この水平配線板１７と前記垂直配線板１４を接続するコ
ネクタ１８は、再配線板１４．１７を接続するフィルム
パターンからなる導電体２０と、この導電体２０を再配
線板１４．１７に圧接する圧接用のバー２１と、このバ
ー２１と導体２０との間に介在するエラスチック絶縁体
２２とによって構成されている。また、前記固定接続体
１５にはメタライズパターンが形成されたフィルム接続
体によって構成されている。２３は前記再配線板１４．
１７を結合する保持金具で、前記コネクタ１８（バー２
１）に対して装着されている。なお、図中符号２４およ
び２５はサブストレート（垂直配線板１４．水平配線板
１７）に形成されたプリントパターンである。A connector 18 that connects the horizontal wiring board 17 and the vertical wiring board 14 includes a conductor 20 made of a film pattern that connects the rewiring board 14.17, and a conductor 20 that presses the conductor 20 to the rewiring board 14.17. It is composed of a bar 21 for press-fitting and an elastic insulator 22 interposed between the bar 21 and the conductor 20. Further, the fixed connection body 15 is constituted by a film connection body on which a metallized pattern is formed. 23 is the rewiring board 14.
The connector 18 (bar 2
1). Note that reference numerals 24 and 25 in the figure are printed patterns formed on the substrate (vertical wiring board 14, horizontal wiring board 17).

このように構成された高密度パンケージにおいては、ベ
ース配線板１１のみならず垂直配線板１４および水平配
線板１７に多数の電子回路部品１２．１９を実装するこ
とができる。すなわち、これら電子回路部品１２．１９
をベース配線板１１に対して３次元配置することができ
るのである。In the high-density pancase configured in this manner, a large number of electronic circuit components 12 and 19 can be mounted not only on the base wiring board 11 but also on the vertical wiring board 14 and the horizontal wiring board 17. That is, these electronic circuit components 12.19
can be three-dimensionally arranged on the base wiring board 11.

なお、本実施例においては、２個の垂直配線板１４に対
して１個の水平配線板１７を保持する場合を示したが、
本発明はこれに限定されるものではなく、第２図に示す
ように複数の水平配線板１７を保持することにより一層
高密度実装化を図ることができる。Note that in this embodiment, a case is shown in which one horizontal wiring board 17 is held for two vertical wiring boards 14;
The present invention is not limited to this, but by holding a plurality of horizontal wiring boards 17 as shown in FIG. 2, higher density packaging can be achieved.

また、本実施例においては、各配線板１４．１７の片面
側に電子回路部品１９（一方のみ図示）を実装する例を
示したが、本発明は両面側に実装すればさらに高密度実
装化を実現することができる。Further, in this embodiment, an example was shown in which the electronic circuit components 19 (only one side is shown) are mounted on one side of each wiring board 14, 17, but the present invention can achieve even higher density mounting by mounting on both sides. can be realized.

また、本実施例においては、２個の垂直配線板１４を使
用する例を示したが、本発明は垂直配線板１４を増加す
ればベース配線板１１との電気的パスを最短化すること
ができる。Further, in this embodiment, an example is shown in which two vertical wiring boards 14 are used, but in the present invention, if the number of vertical wiring boards 14 is increased, the electrical path to the base wiring board 11 can be minimized. can.

さらに、本発明においては、固定接続体１５のみならず
コネクタ１８を例えばメタライズパターンを有するフィ
ルム接続体によって構成することによりインピーダンス
整合が可能となり、高速信号伝送化を実現することがで
きる。Furthermore, in the present invention, by constructing not only the fixed connection body 15 but also the connector 18, for example, a film connection body having a metallized pattern, impedance matching becomes possible and high-speed signal transmission can be realized.

因に、本発明における高密度パッケージを組み立てるに
は、ベース配線板１１に対して垂直配線板１４を実装し
、次にこの垂直配線板１４に水平配線板１７を実装した
後、コネクタ１８によって各配線板１４゜１７を互いに
接続してから、このコネクタ１８に保持金具２３を装着
することにより行う。Incidentally, in order to assemble the high-density package according to the present invention, the vertical wiring board 14 is mounted on the base wiring board 11, and then the horizontal wiring board 17 is mounted on this vertical wiring board 14, and then each This is done by connecting the wiring boards 14 and 17 to each other and then attaching the holding fittings 23 to the connectors 18.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、表裏面側にピンと
電子回路部品を有するベース配線板と、このベース配線
板に実装されかつ水平方向に間隔をもって立設されその
各側縁に同一方向に開口するスリットを有する複数の垂
直配線板と、これら垂直配線板にスリットに一部が臨む
ように保持されかつコネクタによって接続された水平配
線板とを備えたので、ベース配線板に対して電子回路部
品を３次元配置することができ、近年における電子回路
の高集積化に伴う電子回路部品の高密度実装化に応じる
ことができる。As explained above, according to the present invention, there is provided a base wiring board having pins and electronic circuit components on the front and back sides, and a base wiring board having pins and electronic circuit components mounted on the base wiring board and erected at intervals in the horizontal direction on each side edge thereof in the same direction. The present invention includes a plurality of vertical wiring boards having opening slits, and a horizontal wiring board that is held by these vertical wiring boards so that a part thereof faces the slits and is connected to the base wiring board by a connector. Components can be arranged three-dimensionally, and it is possible to meet the trend toward high-density packaging of electronic circuit components accompanying the recent increase in the degree of integration of electronic circuits.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図（ａ）および（ｂｌは本発明に係る高密度パフケ
ージを示す斜視図とそのｂ−ｂ線断面図、第２図は同じ
く本発明における応用例を示す正面図、第３図は従来の
高密度パッケージを示す正面図である。 １１・・・・ベース配線板、１２・・・・入出力用ピン
、１３・・・・電子回路部品、１４・・・・垂直配線板
、１６・・・・スリット、１７・・・・水平配線板、１
８・・・・コネクタ。 特許出願人　　日本電気株式会社FIGS. 1(a) and (bl) are a perspective view and a sectional view taken along line bb--b of a high-density puff cage according to the present invention, FIG. 2 is a front view showing an example of application of the present invention, and FIG. 3 is a conventional 11. Base wiring board, 12. Input/output pins, 13. Electronic circuit components, 14. Vertical wiring board, 16. ...Slit, 17...Horizontal wiring board, 1
8...Connector. Patent applicant: NEC Corporation

Claims (1)

【特許請求の範囲】[Claims] その表裏面側にピンと電子回路部品を多数個有するベー
ス配線板と、このベース配線板に実装されかつ水平方向
に間隔をもって立設されその各側縁に同一方向に開口す
るスリットを有する複数の垂直配線板と、これら垂直配
線板にその一部が前記スリットに臨むように保持されか
つコネクタによって接続された水平配線板とを備えたこ
とを特徴とする高密度パッケージ。A base wiring board having a large number of pins and electronic circuit components on its front and back sides, and a plurality of vertical slits mounted on this base wiring board and erected at intervals in the horizontal direction and having slits opening in the same direction on each side edge. 1. A high-density package comprising: a wiring board; and a horizontal wiring board held by the vertical wiring boards so that a portion thereof faces the slit and connected by a connector.
JP63298369A 1988-11-28 1988-11-28 High density package Pending JPH02144986A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63298369A JPH02144986A (en) 1988-11-28 1988-11-28 High density package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63298369A JPH02144986A (en) 1988-11-28 1988-11-28 High density package

Publications (1)

Publication Number Publication Date
JPH02144986A true JPH02144986A (en) 1990-06-04

Family

ID=17858798

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63298369A Pending JPH02144986A (en) 1988-11-28 1988-11-28 High density package

Country Status (1)

Country Link
JP (1) JPH02144986A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6573461B2 (en) 2001-09-20 2003-06-03 Dpac Technologies Corp Retaining ring interconnect used for 3-D stacking
US6573460B2 (en) 2001-09-20 2003-06-03 Dpac Technologies Corp Post in ring interconnect using for 3-D stacking

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6573461B2 (en) 2001-09-20 2003-06-03 Dpac Technologies Corp Retaining ring interconnect used for 3-D stacking
US6573460B2 (en) 2001-09-20 2003-06-03 Dpac Technologies Corp Post in ring interconnect using for 3-D stacking

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