JPH02143529A - Wiring formation - Google Patents

Abstract

PURPOSE:To enable a high melting point metallic film in excellent state to be formed in the opening part in an insulating film by a method wherein the high melting point metallic film is formed to be almost flush with the opening part formed in an insulating film and a film capable of being selectively removed from the insulating film. CONSTITUTION:A polycrystalline silicon layer 12 as a lower wired layer is formed in the position distant from an n<+> type impurity diffused region 11a on the surface of a substrate 11. First, an SiO2 film 13 is deposited on the substrate 11 by CVD process. Secondly, after forming an SiN film 14 on the upper part of the silicon film 12 on the surface of the film 13, openings 16, 16 are made respectively in the diffused region 11a and the silicon film 12 by RIE process. Thirdly, W films 17, 18 are respectively formed in the openings 15, 16 almost flush with the surface of the SiO2 film 13 and the SiN film 14 by SiH4 reduced W selective CVD process. Fourthly, the SiN film 14 only is removed by thermal phosphoric acid processing. Finally, the upper end of the W film 18 is anisotropically etched away using a resist 19 on the SiO2 film 13 as a mask to be made flush with the surface of the SiO2 film 13 and then the resist 10 is removed to finish the wiring formation.

Description

DETAILED DESCRIPTION OF THE INVENTION "Industrial Application Field" The present invention relates to a method for forming wiring in which a high melting point metal film is selectively formed in an opening for wiring such as a contact hole in a semiconductor device.

[Summary of the Invention] The present invention provides a method for forming wiring, comprising: sequentially forming an insulating film and a film that can be selectively removed with respect to the insulating film on a lower wiring layer; A refractory metal film is selectively formed in the opening to expose the lower wiring layer by forming an opening that communicates with the film that can be selectively removed. form,
Next, only the film that can be selectively removed with respect to the insulating film is removed, and then the protruding portion of the high melting point metal layer film is removed, thereby forming a well-shaped high melting point in the opening of the insulating film. It becomes possible to form a metal film.

[Prior Art] In recent years, with the increasing integration of semiconductor devices, the technology for forming wiring in minute contact holes has become a particularly important issue.
Miniaturization to increase the degree of integration is mainly done in the horizontal direction.
In order to maintain dielectric strength and prevent an increase in stray capacitance, we do not want to make any significant reductions in the vertical direction. Therefore, the aspect ratio of contact holes and interlayer connection holes tends to increase. Therefore, the tungsten selective CVD method, which allows wiring to be selectively formed in high aspect ratio openings, has become an important technology.

Conventionally, when using this type of technique to form a high melting point metal film in openings or grooves of different thicknesses in an insulating film, the methods shown in FIGS. 2A to 4 have been used.

First, as shown in FIG. 2A, a polycrystalline silicon film as a lower interconnection layer is placed on the surface of a silicon substrate l on which an n-type impurity diffusion region 1a is formed, at a position away from the impurity diffusion region 1a. In the case of a semiconductor device in which 2 is formed to have a predetermined width dimension, an insulating film of Sin,
A film 3 is deposited by CVD and planarized (first step).

Next, as shown in FIG. 2B, the insulating film 3 on the impurity diffusion region 1a and the polycrystalline silicon film 2 is opened to form an opening 4.5 (second step).

Next, as shown in FIG. 2C, a tungsten film 6.7 is formed in the opening 4.5 by tungsten selective CVD (third step). In this case, the upper part of the tungsten film 7 has an enlarged head (hereinafter referred to as a nail head) 7a as shown in the figure due to the thickness of the insulating film 3 being smaller than that of the insulating film 3 on the impurity diffusion region ia. is formed.

Next, as shown in the second diagram, a resist 6 is distributed to the thickness of the nail head 7a (4th step), and anisotropic etching is performed using this resist 6 as a mask to remove most of the nail head 7a. (5th step).

In the example shown in FIG. 3, the nail head 7a is removed once by isotropic etching, and in the example shown in FIG. The purpose is to remove the nail head 7a by painting and performing an edge back.

[Problems to be Solved by the Invention] However, these conventional examples have the following problems.

First, when the nail head 7a is anisotropically etched (
As shown in FIG. 2E), since the bottom portion of the nail head 7a is covered with the resist 8, there is a problem that a portion of the nail head 7a remains on the insulating film 3.

Further, as shown in FIG. 3, when isotropic etching is performed, there is a problem that four portions are formed on the upper part of the tungsten film 7.

Furthermore, when performing etchback as in the example shown in FIG. 4, there is a problem that it is difficult to control the etch rate of the resist and the process becomes complicated.

The present invention has been devised by paying attention to such conventional problems, and aims to provide a method for forming wiring with a good processed shape through a simple process.

Next, an opening communicating with the insulating film and a film that is selectively removable with respect to the insulating film is formed to expose the lower wiring layer, and then a substantially flat surface is formed in the opening. A high melting point metal film is selectively formed so as to form a surface insulating film. The solution is to remove only the selectively removable film, and then remove the protruding portion of the high melting point metal layer film.

[Function] A high melting point metal film formed so as to be substantially flat in an opening formed in an insulating film and a film that can be selectively removed with respect to the insulating film can be used to insulate without expanding the upper part. After removing the selectively removable film, anisotropic etching facilitates removal of its protrusions.

[Means for Solving the Problems] Therefore, the present invention sequentially forms an insulating film and a film that can be selectively removed with respect to the insulating film on a lower wiring layer. The details of the wiring formation method will be explained based on the embodiments shown in the drawings.

(First step) First, as shown in FIG. 1A, for example, a lower boyfriend line layer is placed on the surface of the silicon substrate 11 in which the n'' type impurity diffusion region 11a is formed, at a position away from the impurity diffusion region 11a. A polycrystalline silicon film 12 as an insulating film is formed to have a predetermined width dimension.Next, an S+ film as an insulating film is formed on the silicon substrate 11''.
A film 13 of O is deposited by CVD.

(Second step) Next, a silicon nitride (SiN) film 14 with a predetermined pattern is placed above the polycrystalline silicon film 12 on the surface of the Sin film 13.
is formed by CVr) method. This silicon nitride film 14
The film may be made of other materials as long as it can be selectively removed from the film. Note that the thickness of the silicon nitride film 14 is set to be equal to the thickness of the polycrystalline silicon film 12.

(Third step) Next, after forming a resist pattern, reactive ion etching (RIE) is performed to form holes on the impurity diffusion region 11a and the polycrystalline silicon film 12, as shown in FIG. 1C. Section 15 and 16 will be established.

(Fourth step) Next, as shown in the first diagram, tungsten films 17 and 18 are formed in the openings 15 and 16 on the upper surfaces of the 5iOy film 13 and the silicon nitride film I4, respectively, by tungsten selective CVD with SiH* reduction. It is formed substantially flat so that

(Fifth Step) Next, as shown in FIG. 1E, only the silicon nitride film I4 is removed by a treatment such as hot phosphoric acid.

(Sixth Step) Next, as shown in FIG. 1F, Renost I9 is applied onto the 5iO7 film 13. Note that the thickness of this Renost 19 is determined by the thickness of the tungsten film 17 during anisotropic etching, which will be described later.
It is sufficient that the resist is not etched, and the thickness can be made thinner by lowering the viscosity of the resist.

(Seventh step) Anisotropic etching is performed using the renost 19 as a mask to make the upper end surface of the tungsten film 18 flush with the surface of the SiO film I3 (FIG. 1G).

Finally, the resist 19 is removed and the wiring formation process is completed.

Although the embodiments have been described above, the present invention is not limited thereto, and various design changes and material changes are possible.

For example, in the above embodiment, silicon nitride (SiO7) is used as a film that can be selectively removed with respect to the insulating film (SiO7).
Of course, it is also possible to use N) or other materials.

In addition, although tungsten (W) was used as the high melting point metal film formed in the openings 15 and 16, selective CVD
Ditane (Ti), molybdenum (MO), etc., which can be processed by the method, may also be used.

Furthermore, the thickness of the film that can be selectively removed with respect to the insulating film is the thickness of the polycrystalline silicon film (2) and the gap between the paths in the above embodiment, but even if it is thicker than this, the nail head will still be damaged. It goes without saying that the formation can be prevented.

Further, in the above embodiments, the present invention is applied to a case where there is a step in the lower liquid wiring layer, but the present invention is also applicable to a case where wiring is formed on a lower liquid wiring layer without a step. .

[Effects of the Invention] As is clear from the above explanation, in the wiring forming method according to the present invention, a nail head of a high-melting point metal film is not formed on an insulating film, and therefore a nail head of a high-melting point metal film is not formed on an insulating film. This has the effect of making it easier to remove the protruding high melting point metal film.

Therefore, there is an effect that wiring having a good processed shape can be formed.

[Brief explanation of the drawing]

1A to 1G are sectional views showing an embodiment of the wiring forming method according to the present invention, FIGS. 2Δ to 2E are sectional views of a conventional example, and FIG. 3 is an example of the conventional example. A cross-sectional view when directional etching is performed, and FIG. 4 is a cross-sectional view when etch-back is performed in a conventional example. ll...Silicon substrate, 12...Polycrystalline silicon film (lower wiring layer), 13...Si○, film (insulating film),
I4...Silicon nitride film (film that can be selectively removed with respect to the insulating film), 15.16...Opening part, 17.18...
・Tungsten film (high melting point metal film). 16 Tiger Kong Jing (7'3 轻) Fig. 1 C (74 轻) Fig. 1 D ) Fig. 1 A (72 work farts) Fig. 1 B (5th process) Fig. 1 ε (7'6 E line) Fig. 1 F (O7 work plug) Fig. 1 G 'l' 3 work Fart) Fig. 2 C (24 odor presentation) Fig. g to $11 fl front view (first shin) Fig. 2 A (off-nose breasts) Fig. (5th shin) Fig. 2 E v7i raw sex Tomoshi T: Hiai no T Prisoner Figure 3

Claims (1)

[Claims] (1) An insulating film and a film that can be selectively removed with respect to the insulating film are sequentially formed on the lower interconnected layer, and communicate with the insulating film and the film that can be selectively removed with respect to the insulating film. A high melting point metal film is selectively formed in the opening so as to be substantially flat, and then a high melting point metal film is selectively formed on the insulating film to expose the lower wiring layer. 1. A method for forming wiring, comprising removing only a film that can be removed at a high temperature, and then removing a protruding portion of the high melting point metal layer.