JPH02142210A - Differential amplifying circuit - Google Patents

Abstract

PURPOSE:To obtain the characteristic of a wide band with the buffer effect of an emitter follower circuit by adding the emitter follower circuit between first and second differential pairs of transistors. CONSTITUTION:A first differential amplifier is provided to be composed of the first differential pair of transistors 5, whose base is connected to an input terminal and emitter emitter is connected to a first constant current source circuit. A second differential amplifier is provided to be composed of the second differential pair of transistors 6, whose is connected to a second constant current source circuit and collector is connected to an output terminal. Further, a feedback means is provided to be composed of the third differential pair of transistors, whose base is connected to the collector of the first differential pair of the transistors 5, emitter is connected to the base of the second differential pair of the transistors 6 and connected through resistors 7 and 8 to a low potential power source and collector is connected to a high potential power source. Thus, the operation of the much wider band can be executed by the buffer effect of the feedback means.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a feedback differential amplifier circuit suitable for monolithic integration and capable of wideband operation.

[Conventional technology]

Figure 4 shows a conventional broadband feedback differential amplifier circuit, ``Computer-Aided Design of IGHz Bandwidth Monolithic Integrated Amplifiers'' by Hilbrand, Gruber and Lasser, E. Niss, C.I.R. C., 1977, pp. 122-124 (H, Hillbr
and, J., Gruber and P.

Ru5ser, “Computer Aided De
sign of a IGHZ Band-width
Monolithic Integrated Am
plifier”, f!5SCI-RC, 1977, p.
p, 122-124) is a circuit diagram showing J.

In FIG. 4, la and lb are input signals V in *
■π is the input terminal for manual input, 2a and 2b are the output signals vo
An output terminal to which urn Vouy is output, 3 a high potential power supply terminal to which the potential of VCC is input, 4 a low potential power supply terminal to which the potential V■ is input, 5 an input difference as the first differential pair transistor. A dynamic pair transistor, 6 is an output differential pair transistor as a second differential pair transistor, 7.8 is a load resistance with a resistance value RLII Rtz, 9 is a load capacitance with a capacitance value C4, 10.11 is a current value 11. I! 1st. Second
This is a constant current source circuit.

The circuit shown in FIG. 4 is composed of an input differential pair transistor 5 whose loads are load resistors 7 and 8, and an output differential pair transistor 6 whose load is a load resistor 8. The collector of the transistor 6 is connected to the load resistor 7. The collector signal of the transistor 6 is fed back to the base of the transistor 6 in reverse phase via the load resistor 7, thereby realizing wide-band operation.

The voltage gain AV of this conventional circuit is determined by the transconductance of the transistor 5゜6 being gmt, gm2 and the base resistance being r.
When bl, rb'l, input capacitances are Cπl and Cπ2, and angular frequency is ω, it is given by the following equation.

Here, a is a time constant at the base of transistor 5, b is a time constant at the base of transistor 6, and C is a time constant at the collector of transistor 6, which are expressed by the following equation.

a=Cπ1−rbl・・・(2) b=(Cπ2 ” (Rt++Rtz+rb2)/(
1+go+2・RLri) ・((1+jωCL −
RLz)/(1+jωC))...(3)'
=Ct -RL*/ (1+gm2・RLz) ・
...(4) The gain of the circuit in Figure 4 at low frequency is (11
It is approximated by gml·RLI from the formula. The gain during high frequency operation decreases as the frequency increases due to the time constants ab and c, but as can be seen from equations (3) and (41),
Since the time constants of the base and collector of the transistor 6 can be reduced to 1/1 + gs + 2 · R11 due to the feedback effect, a wider band operation is possible than in the conventional differential amplifier circuit. In addition, the time constant expressed by equation (3) has an imaginary component, and this imaginary component is the capacitance value CL of the load capacitor 9.
It becomes larger as the value increases, and acts to cause peaking in the frequency characteristics. Therefore, the capacitance value C of the load capacitance 9
By optimizing L, it is possible to widen the bandwidth of the − layer.

FIG. 5 is a graph showing simulation results of the frequency characteristics of the circuit shown in FIG. In the figure, the horizontal axis represents frequency, the vertical axis represents gain, and a plurality of characteristics 21, 22, 23, .
24, the capacitance value Ct of the load capacitance is 0.2pF, 0.1p
This is the characteristic when changing F, 0.05pF, and 0. It can be seen that peaking characteristics can be provided by increasing the capacitance value CL, and broadband characteristics can be achieved by optimizing the capacitance value Ct. Therefore, it is possible to obtain broadband characteristics by utilizing the input capacitance or wiring capacitance of the next stage circuit. Note that a bipolar transistor with a high cutoff frequency of 60 GHz was assumed in the simulation.

The one shown in FIG. 6 has been proposed as a wider band differential amplifier circuit. In the same figure, 1a and 1b are input signals V
, □■- are input, 2a and 2b are output terminals to which the output signal "1lIIt bar-" is output, 3 is VCC
4 is a low potential power supply terminal to which the potential of ■□ is input, 5 is the input differential pair transistor as the first differential pair transistor, 6 is the second differential pair transistor Output differential pair transistor as pair transistor, 7,
8 is the load resistance of resistance value RLII Rtz, 9 is the capacitance value C
5 is the load capacity, 10.11 is the current value 1. ．． 1. The first of
In the second constant current source circuit, 12 is a feedback W emitter follower transistor.

The circuit shown in FIG. 6 adds an emitter follower transistor 12 to the circuit shown in FIG. 4, and its buffer effect enables a wider range of operation than the circuit shown in FIG. is the load resistance 8
The structure is configured to prevent the flow from flowing into the circuit, simplifying the design of circuit constants.

The voltage gain Ay of the circuit in Figure 6 is given by the transconductance of the transistor 5.6 in gml, gm2 and the base resistance as r.
When bl, rb2, input capacitance is CπICπ2, and angular frequency is ω, it is given by the following equation.

Here, a is a specific number at the base of transistor 5, b is a time constant at the base of transistor 6, and C is a time constant at the collector of transistor 6, which are expressed by the following equation.

a=Cπ1・rbl・・・(6) b=(Cπ2・(RLl+rb
2) /(1+gm2・RLz) )(
(1+jωCL ”RLRI/ (1+jωC))c=
CL-RL, /(1+gm2・R42)...(8
) The gain of the circuit shown in FIG. 6 at low frequencies can be given by gml·RLI from equation (5), similar to the circuit shown in FIG. The gain during high-frequency operation decreases as the frequency increases due to the time constants a, b, and c. Since it can be reduced to 1/2 of 1 +gm2・RL, wideband operation is possible.Also,
Comparing equations (3) and (7) of the circuit shown in Fig. 4, the circuit shown in Fig. 6 eliminates RL2 in equation (7), so the circuit shown in Fig. 4 has wider-band characteristics in principle. can be realized. This utilizes the fact that the impedance from the emitter of the transistor 12 is low.

(Problem to be Solved by the Invention) As described above, the circuit in FIG. 6 realizes a differential amplifier circuit with a wider band than the circuit in FIG. 4, but there is a demand for the emergence of a differential amplifier circuit with an even wider band. It had been.

Therefore, an object of the present invention is to provide a differential amplifier circuit having a wider band than conventional circuits.

[Means to solve the problem]

In order to solve such problems, the present invention has a base connected to the collector of the first differential pair transistor, an emitter connected to the base of the second differential pair transistor, and a low potential connected through a resistor. Feedback means is provided which is connected to the power supply and comprises a third differential pair of transistors whose collectors are connected to the high potential power supply.

[Effect]

In the differential amplifier circuit according to the present invention, the buffer effect of the feedback means enables a wider band operation.

〔Example〕

First, the features of the present invention and the differences from the prior art will be described. The present invention is characterized in that an emitter follower circuit is added between the two differential pairs in a feedback amplifier circuit consisting of two differential pairs. are different.

FIG. 1 is a circuit diagram showing an embodiment of a differential amplifier circuit according to the present invention. In the same figure, la and lb are input signals V
The input terminals 2a and 2b are the output signals V to which ill+Via is input. □, ■= are output terminals, 3 is VC
The high potential power supply terminal 4 to which the potential of C is input is vE! 5 is an input differential pair transistor as a first differential pair transistor, 6 is an output differential pair transistor as a second differential pair transistor,
7 and 8 are load resistances with resistance value RLI+RLI, 9 is load capacitance with capacitance value CL, and 10.11 is current value 1. , It is a first degree second constant current source circuit, 13 is an emitter follower transistor, and 14 is a resistor for the emitter follower circuit having a resistance value R7.

In this embodiment, an emitter follower circuit consisting of an emitter follower transistor 13 and a resistor 14 is newly added to the conventional circuit shown in FIG. 4, and its buffer effect enables a wider band operation than the conventional circuit.

The voltage gain Av of the circuit shown in Figure 1 is given by the transconductance of the transistor 5.6 in gml, gm2 and the base resistance as r.
Assuming that bl, rb2, input capacitance is CπICπ2, current gain of transistor 13 is β, and angular frequency is ω, it is given by the following equation.

Here, a is a time constant at the base of transistor 5, b is a time constant at the base of transistor 6, and C is a time constant at the collector of transistor 6, which are expressed by the following equation.

aWCπ1・rbl・・・・a[ b−cπ2・(RL++Rtt+rb2) / (β
(1+gm2 ・Rtz) ((1+jωCL' R
t, z) / (1+jωc))...Ql) C" CL -Rtt/ (1+gm2・Rtg)
・ ・ ・ ・ ・(2) The gain of this circuit at low frequencies can be given by gml·RLI from equation (9), similar to the conventional circuit. The gain during high frequency operation decreases as the frequency increases due to the time constants a, b, and c, but (II)
As can be seen from equation 0, the time constants of the base and collector of transistor 6 become 1 +gm2・RL due to the feedback effect.
Since it can be reduced to 1/I, wideband operation is possible.

In addition, when comparing Equation (3) and Equation 01 of the conventional circuit shown in Fig. 4, the time constant of this circuit is multiplied by 1/β due to the effect of the emitter follower circuit. Therefore, it is possible to achieve wider band characteristics.

FIG. 2 is a graph showing the simulation results of the frequency characteristics of this circuit. The horizontal axis shows the frequency, the vertical axis shows the gain, and the characteristics show the case where the additional capacitance is zero. From a comparison with the frequency characteristics of the conventional circuit (Figure 5), this circuit has approximately 2
It can be seen that the double band has been improved.

FIG. 3 is a circuit diagram showing a second embodiment of the present invention. In the figure, la and lb are input terminals to which input signals Via and ■π are input, and 2a and 2b are output signals ■. 1. -- is an output terminal that is output, 3 is a high potential power supply terminal to which the potential of VC is input, 4 is a low potential power supply terminal to which the potential of VEt is input, and 5 is an input difference as the first differential pair transistor. A dynamic pair transistor, 6 is an output differential pair transistor as a second differential pair transistor, 7 and 8 are resistance values RL1.
The load resistance of RLt, 9.9' is the capacitance value CLo, the load capacitance of CLo, 10.11 is the current value 1+, and the 1st. Second
12 is a feedback emitter follower transistor, 13 is an emitter follower transistor, and 14 is a resistor for the emitter follower circuit with a resistance value R.

The circuit of FIG. 3 has the same effect as transistor 1 in the circuit of FIG.
An emitter follower circuit consisting of a resistor 3 and a resistor 14 is newly added, and its buffer effect enables a wider band operation than the conventional circuit. Its operating principle can be explained in the same manner as the first embodiment shown in FIG.

The present invention can be applied not only to monolithic amplifier circuits but also to hybrid amplifier circuits that require broadband characteristics, and to amplifier circuits having various functions such as high-frequency amplifier circuits in addition to the aforementioned amplifier circuits. .

In addition, in the differential amplifier circuit according to the present invention, in addition to NPN type bipolar transistors, PNP type bipolar transistors are used as transistors.
It is possible to use type or FET type transistors, and it is also possible to use impedance such as capacitance or inductance instead of resistance.

〔Effect of the invention〕

As described above, the present invention has the advantage that by adding an emitter follower circuit between the first and 20th differential pair transistors, wideband characteristics can be obtained due to the buffer effect of the emitter follower circuit.

[Brief explanation of the drawing]

1 and 3 show a first embodiment, a second embodiment, and a second embodiment of a differential amplifier circuit according to the present invention. 2 is a graph showing the frequency characteristics of the first embodiment, FIGS. 4 and 6 are circuit diagrams showing a conventional differential amplifier circuit, and FIG. 5 is a graph showing the frequency characteristics of the first embodiment. 2 is a graph showing the frequency characteristics of a conventional circuit. la, lb...input terminals, 2a, 2b...output terminals, 3...high potential power supply terminals, 4...low potential power supply terminals,
5... Input differential pair transistor, 6... Output differential pair transistor, 7, 8... Load resistance, 9... Load capacitance, 1011... Constant current source circuit, 13... Emitter follower Transistor, 14... Resistor for emitter follower.

Claims (1)

[Claims] a first differential amplifier consisting of a first differential pair transistor whose base is connected to an input terminal and whose emitter is connected to a first constant current source circuit; , and a second differential amplifier consisting of a second differential pair transistor whose collector is connected to the output terminal, the base is connected to the collector of the first differential pair transistor, and the emitter is connected to the collector of the first differential pair transistor. Feedback means comprising a third differential pair transistor connected to the base of the second differential pair transistor and connected to the low potential power supply via a resistor, and whose collector is connected to the high potential power supply. Features of differential amplifier circuit.