JPH02140087A - Image pickup device - Google Patents

Abstract

PURPOSE:To obtain a still picture of one frame at a low cost with one exposure by storing once all picture element information of an image pickup means into a memory means and using its storage data so as to generate a video signal in 1st and 2nd fields. CONSTITUTION:Each photoelectric conversion element of an image pickup section of a solid-state image pickup element 10 is cleared at first and exposure is applied for a prescribed time. After a signal of an odd number line (odd number field), a signal of an even line (even field) is read to read the photoelectric conversion signal of all picture elements. Then one pattern signal subject to a prescribed processing is stored in a frame memory 18. A digital signal processing circuit 20 at first latches a required data read from a memory 18. In this case, when latch circuits 44-47 apply latch processing of the (n0+1)-th line when the circuits 40-43 apply the n0-th line processing in the odd/even fields in the latch circuits 40-47. Then a prescribed calculation is applied to the latch data, a luminance signal is applied to a D/A converter 22 and a color difference signal is fed to D/A converters 24, 26. Thus, a still picture is obtained in a conventional image pickup element.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an imaging device, and more specifically to an imaging device suitable for obtaining frame images.

[Conventional technology]

An electronic still camera converts the image signal from the image sensor into FM.
This is a camera that modulates and records on a magnetic sheet. FIG. 2 shows an example of the arrangement of color filters bonded to the front surface of a solid-state image sensor used in an electronic still camera. Ye is yellow, Cy is cyan, Mg is magenta, and G is green. In the illustrated filter array, the odd rows have Ye and cy
are alternately and repeatedly arranged, and Mg and G are repeatedly arranged in even-numbered rows. However, in the rows of Mg and G, the order of Mg and G is reversed for each row. For example, in an image sensor with a color filter arrangement, when obtaining an odd field video signal, the vertical transfer section in the solid-state image sensor adds the signals of the pixels in the odd row of the color filter and the row below it. In addition, when obtaining an even field video signal, the signals of the pixels in the even row of the color filter and the row below it are added and read out to the vertical transfer section. The signal from the vertical transfer section is then transferred to the horizontal transfer section, and the signal from the horizontal transfer section is horizontally transferred and output. When obtaining a luminance signal from such an output from a solid-state image sensor,
Signals from horizontal neighbors were added, and when obtaining a color signal, signals from horizontal neighbors were subtracted. Thereby, line-sequential color signals can be obtained.

For example, in the n0th line of the odd field shown in FIG. 2, the luminance signal Y = Ya(k)4Mg(k+1)+Cy(k)+G(k
+1)=(R+G)+(R+B)+(G+B)+(G
)=2R+3G+2B Color signal=Ye(k)4Mg(k+1)-(Cy(k)+G(
k+1))=(R+G)+(R+B)-((G+B)
+G) = 2R-G, and on the (n, +1)th line, the luminance signal Y = Ye(k+2)+G(k+3)+Cy(k+2)4
Mg(k+3)=2R+3G+2B Color signal=Cy(k÷2)4Mg(k+3)-(Ye(k+2)
10G(k+3))=2B-G. In the nth line of the even field shown in FIG. 2, the luminance signal Y = Mg (k+1) + Ye (k+2) + G (k+1) +
Cy (k+2) = 2R + 3G + 2B Color signal = Mg (k + 1) + Ye (k + 2) - (G (k + 1)
+Cy(k+2))=2R-G Also, on the (n,+1)th line, the luminance signal Y=G(k+3)+Ye(k+4)4Mg(k+3)+
Cy (k÷4) = 2R + 3G÷2B Color signal = Mg (k + 3) + Cy (k + 4) - (G (k + 3)
+Ye(k+4))=28-G. 2R-G and 2B-G are R-Y, respectively.
It can be considered as B-Y. That is, color difference signals can be obtained line-sequentially.

[Problem to be solved by the invention]

However, with this signal charge readout method, in order to obtain a still image of one field, all charges of each pixel of the solid-state image sensor are read out destructively, making it impossible to obtain an image of the second field. . That is, it is not possible to obtain a still image of one frame. In other words, in order to obtain one frame of still image, it is necessary to use an image sensor with double the resolution in the vertical direction, which makes it extremely expensive and requires the use of consumer electronic products called electronic still cameras. It is very difficult to adopt it.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide an imaging device that can obtain sufficiently satisfactory frame still images even when using a conventionally used solid-state imaging device with vertical resolution.

[Means to solve the problem]

The imaging device according to the present invention includes a memory means for storing a luminance signal of one horizontal scanning line and a signal of each color portion of the color filter from charge information of two adjacent upper and lower lines; The present invention is characterized in that it comprises a frame image forming means for forming a video signal of a field and a second field.

[Effect]

Since the information of all the pixels of the imaging means is once stored in the memory means, the photoelectric conversion information of each color component of all the pixels of the imaging means can be referenced multiple times. Therefore, the video signals of the first field and the second field can be formed using the data stored in the memory means, and a frame still image can be obtained with one exposure.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a configuration block diagram of an embodiment of the present invention.

10 is a solid-state image sensor having the color filter arrangement shown in FIG. 2; 12 is a CDS circuit for removing noise from the solid-state image sensor 10; 14
16 is a clamp circuit, 16 is an A/D converter, 18 is a frame memory that individually holds signals of all pixels of the image sensor 10, 19 is a data bus, and 20 is a luminance signal and a A digital signal processing circuit that forms a color difference signal between lines, 22, 24, and 26 are D/A
Converters 28, 30, and 32 are band-limiting LPFs.

The basic operation shown in FIG. 1 will be explained. First, each photoelectric conversion element in the imaging section of the solid-state imaging device 10 is cleared and exposed for a predetermined period of time. Then, the photoelectric conversion signals of all pixels are read out. At the time of reading, the signals in the odd rows corresponding to the odd field may be read out first, and then the signals in the even rows corresponding to the even field may be read out, or the signals in each row may be read out in sequence. The CDS circuit 12 removes noise from the output of the image sensor 10. The DC signal is clamped to a constant DC level by a clamp circuit 14, digitized by an A/D converter 16, and stored in a frame memory 18. When one screen worth of signals is stored in the frame memory 18 or when necessary data is stored, the digital signal processing circuit 20 sequentially reads the necessary data from the frame memory 18 and performs the following calculations. The luminance signal is sent to the A/D converter 22, the color difference signal R-Y is sent to the A/D converter 24, and the color difference signal B-Y is sent to the A/D converter 24.
/D converter 26.

FIG. 3 shows a detailed block diagram of the digital signal processing circuit 20. As shown in FIG. 40 to 47 are Ye, Mg, respectively.
This is a latch circuit that latches Cy, G, Ye, G%C7%Mg. For example, latch circuit 40~
When the latch circuit 43 processes the n0th line of the odd field, the latch circuits 44 to 47 process the (n, +1)th line, and when the latch circuits 40 to 43 process the nth line of the even field, the latch circuits 44 to 47 process the nth line of the even field. The circuits 44 to 47 are the (nth)
, +1) process the line.

Specifically, for an odd field, the latch circuit 40 selects Ye in the th row, and the latch circuit 41 selects Mg in the (k+1)th row.
The 1st latch circuit 42 is the Cy1 latch circuit 43 in the (k+1)th row, the 61st latch circuit 44 is in the (k+2)th row, and the latch circuit 45 is the 61st latch circuit 46 in the (k+3)th row. The Cy1 latch circuit 47 in the (k+2) row is
Mg in row k+3) is latched. In addition, for an even field, the latch circuit 40 is Ye in the (k+2)th row, the latch circuit 41 is Mg in the (k+1)th row, and the latch circuit 42 is
is the (k+2)th row cy, and the latch circuit 43 is the (k+i)th row cy.
) row 61 latch circuit 44 is the (k+4)th row Ye.

The latch circuit 45 is the 01 latch circuit 46 in the (k+3)th row.
is the (k+4)th row cy, and the latch circuit 47 is the (k+3)th row cy.
) row Mg is latched.

48.50, 52.54 are adder circuits, 56.58 is a switch that changes every horizontal clock, and 60 is a color difference signal RY that is finally generated, which is zero for the white part according to the color temperature of the light source. A white balance circuit 62 multiplies the output of the adder circuit 48 by a coefficient so that the white balance circuit 62 multiplies the output of the adder circuit 54 by a coefficient so that the color difference signal BY becomes zero White balance circuit, 64 is 1
66 is a subtraction circuit that subtracts the output of the white balance circuit 60 from the output of the addition circuit 50; 68 is a white balance circuit 62;
a subtracting circuit for subtracting the output of the adding circuit 52 from the output of the subtracting circuit 7;
0 is a gamma correction circuit for the output of the switch 64 (luminance signal), 72 is a gamma correction circuit for the output of the subtraction circuit 66 (color difference signal R-Y), and 74 is an output of the subtraction circuit 68 (color difference signal B-
Y) gamma correction circuit.

The operation shown in FIG. 3 will be explained. As mentioned above, the latch circuit 40~
47 latches the data stored in the frame memory 18;
The adder circuit 48 outputs the Ye+Mg signal, and the adder circuit 50
outputs the Cy+G signal, the adder circuit 52 outputs the Ye+G signal, and the adder circuit 54 outputs the Cy+Mg signal.

The output Ye+Mg of the adder circuit 48 and the output Cy+G of the adder circuit 50 are addition signals of pixels adjacent in the horizontal direction. A luminance signal corresponding to the nth line of the field is generated. Similarly, when the outputs of the adder circuits 52 and 54 are switched for each horizontal line by the switch 58, the (nth
, +1) line or (n, +1)th even field
A luminance signal corresponding to the line can be obtained. Then, the switch 64 is used for each horizontal line.
to select the output of switches 56 and 58.

The gamma correction circuit 70 performs gamma correction on the output of the switch 64 and outputs the final target digital luminance signal.

Further, a color difference signal RY is obtained from the output of the subtraction circuit 66, and a color difference signal B-Y is obtained from the subtraction circuit 68. Gamma correction circuits 72 and 74 perform gamma correction on the outputs of subtraction circuits 66 and 68, respectively, and generate digital color difference signals R-Y and B.
-Outputs Y.

Next, an example in the case of a solid-state image sensor with a different color filter arrangement will be described. FIG. 4 shows a color filter array often used in video cameras. Rows in which Ye (yellow) and Cy (cyan) are repeated and rows in which G (green) and W (white) are repeated are arranged alternately on a row-by-row basis. In this filter arrangement, in the n-th line of the odd field, the luminance signal Y = Ye(k) + G(k+1) + Cy(k) + W(k+
1) = (R+G) + (G) + (G+B) +
(R+G+B)=2 (R+2G+B) Color signal R=Ye(k)-G(k+1) B=Cy(k)-G(k+1) In the n-th line of the even field, the luminance signal Y=G( k+1)+Ye(k+2)+W(k+1)+C
y(k+2)=2(R+2G+B) Color signal R=Ye(k+2)-G(k+1) B=Cy(k+2)-G(k+1).

For this filter array, the inside of the digital signal processing circuit 20 of FIG. 1 may be configured as shown in FIG. 5. That is, 76, 77, 78, 79 are latch circuits that read out and latch predetermined stored data in the frame memory 18, and the latch circuit 76 is a latch circuit that reads and latches predetermined data stored in the frame memory 18.
In the even field, the latch circuit 77 latches the (k+1)th row G in both the odd field and the even field. In the even field, the latch circuit 79 latches the Cy in the (k+2)th row, and in the even field, the latch circuit 79 latches the Cy in the (k+2)th row in the even field.
+1) Latch W in row.

The adder circuit 80 adds the outputs of the latch circuits 76 and 77,
Adder circuit 81 adds the outputs of latch circuits 78 and 79. Further, the subtraction circuit 82 subtracts the output of the latch circuit 77 from the output of the latch circuit 76, and the subtraction circuit 83 subtracts the output of the latch circuit 79 from the output of the latch circuit 78. The outputs of the adder circuits 80 and 81 correspond to luminance signals, and the outputs of the subtracter circuits 80 and 81 correspond to luminance signals.
The output of subtraction circuit 83 corresponds to the R signal, and the output of subtraction circuit 83 corresponds to the B signal. Switch the switch 84 for each pixel,
The outputs of adder circuits 80 and 81 are alternately selected to obtain a luminance signal.

The white balance circuit 85 adjusts the level of the output (R signal) of the subtraction circuit 82 so that the color difference signal of the white object part becomes zero according to the color temperature of the light source.
Balance circuit 84 similarly adjusts the level of the output of subtraction circuit 83. Gamma correction circuits 87, 88, and 89 output the output of the white balance circuit 85 (R signal), the output of the latch circuit 77 (G signal), and the white balance circuit 85.
Gamma correction is applied to each of the outputs (B signals) of 6, and the matrix circuit 90 generates color difference signals R-Y from those outputs.
, forming B-Y.

In the above embodiment, no particular mention was made regarding the order in which the photoelectric conversion signals of each pixel of the image sensor 10 are stored in the frame memory 18, but in the filter array, the row corresponding to the odd field (for example, th row, (k+2
) rows, etc.) are first written to the frame memory 18, and then signals of rows corresponding to even fields (for example, (k÷1) rows, (k+3) rows, etc. in FIG. 2) are written to the frame memory 18. However, all the photoelectric conversion signals of each pixel may be sequentially written into the frame memory 18 according to the order of the filter arrangement.

〔Effect of the invention〕

As can be easily understood from the above description, according to the present invention, a complete still image of one frame can be obtained in one exposure without using a special array of color filters. Further, since it is possible to share the solid-state image sensor used in an electronic still camera and a movie camera, there is an effect of lowering the price of the solid-state image sensor.

[Brief explanation of the drawing]

FIG. 1 is a configuration block diagram of an embodiment of the present invention, FIG. 2 is an example of a color filter arrangement, FIG. 3 is a detailed configuration block diagram of the digital signal processing circuit 20 of FIG. 1, and FIG. 4 is a color filter arrangement. Another example of a filter arrangement, FIG. 5 is a block diagram of a digital signal processing circuit 20 corresponding to the color filter of FIG. 4. 10: Solid-state image sensor 14: Clamp circuit 18; Frame memory 19: Data bus 20: Digital signal processing circuit 40 to 47. 76 to 79: Latch circuit 60, 62, 85, 86: White balance circuit
70, 72, 74, 87. 88, 89: Gamma correction circuit-84:

Claims (1)

[Claims] An imaging means equipped with color filters arranged so as to obtain a luminance signal and a color signal of one horizontal scanning line from charge information of two adjacent upper and lower lines, and each color portion of the color filter from the imaging means. 1. An imaging apparatus comprising: a memory means for storing signals stored in the memory means; and a frame image forming means for forming first and second field video signals from the signals stored in the memory means.