JPH02135522A - Memory sub-system - Google Patents

Abstract

PURPOSE:To speed up a large capacity transfer and to improve a small capacity random access performance by dynamically selecting an action to use the performance of a parallel transfer at the time of transfer at a larger capacity and an operation to use the performance of the independent operation unit when a small capacity high frequency access is executed while the operations are matched to the processing. CONSTITUTION:A controller 1 to control a memory is provided with a condition control table 11 in the internal part and a memory sub-system memory device 2 is composed of a data buffer 21, an alignment synchronizing detecting circuit 22, a coupling control circuit 23 of a data buffer and a memory medium 20. A mode to interlock plural arbitrary independent operable memory media 20 and execute reading and writing in parallel and a mode to access to one arbitrary independent operable memory medium 20 are set, and when the large capacity of transfer is executed, the constitution to use the merit of the parallel transfer is applied to the processing and dynamically selected and when a small capacity high frequency access is executed, the constitution to use the performance of the independent operation unit is applied to the processing and dynamically selected respectively. In such a manner, the high speed o the large capacity transfer and the improvement of the small capacity random access performance can be executed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a randomly accessible external storage device connected to an information processing device, and in particular, the present invention relates to a randomly accessible external storage device connected to an information processing device, and in particular to a high-speed large-capacity transfer while maintaining a small-capacity random access function. It relates to a storage subsystem that is capable of

[Conventional technology]

Conventionally, storage media for external storage devices include magnetic disk devices, optical disk devices, magnetic bubble devices, flexible disk devices, and the like. Although the explanation in this application can be applied to any of these, a magnetic disk device will be explained here as an example.

In a magnetic disk device, multiple magnetic disk storage media are connected under the control of one magnetic disk controller connected to a channel, and each storage medium operates independently according to instructions from the magnetic disk controller. are doing. The specific operation of a magnetic disk device is to position the read/write head by moving it to the track at the address where the record to be accessed exists, and to wait until it reaches the record at the record address to be accessed within that track. There are search operations to perform reading and writing, and read/write operations to actually perform reading or writing.

By the way, the performance required for a magnetic disk device is (
b) Large-capacity transfer speed (i.e., high-speed transfer of large-capacity information) and (b) Small-capacity random access performance (i.e., online real-time access, such as several KB)
(c) throughput performance of an independent operation unit when the unit is accessed frequently) and (c) price of unit capacity (that is, low bit cost).

In conventional magnetic disk drives, the transfer speed, small capacity random access performance, and unit capacity price are completely independent of each storage medium.

In other words, transfer performance and storage capacity given the same device address depend on the performance and capacity of units that can operate independently.
It was determined by capacity. The transfer speed is determined by the track capacity and the rotational speed of the medium, but there has been little significant improvement in rotational performance, and the transfer speed has only been able to be improved mainly by increasing the track capacity. on the other hand,
Regarding small-capacity random access performance, since online real-time processing is mainly performed on random access processing, the quality of random access performance is the deciding factor for improving the performance of online real-time processing. In order to improve random access performance, shortening access time and improving device throughput are important factors, but in terms of access time, since single rotation performance does not improve, the reduction in rotational waiting time is small and the seek time is shortened. The extent of this does not account for a large proportion of the total. Therefore, the only attempt is to improve the device throughput by appropriately suppressing the capacity per independent operation unit.

On the other hand, regarding the price trend of storage media, there is a strong positive correlation between the recent reduction in the bit cost of storage media for independent operating units and the increase in capacity per independent operating unit. In other words, there is a trade-off between reducing bit cost and random access device performance in online real-time processing.

Currently, a plurality of models are provided, such as storage media with emphasis on cost reduction and storage media with emphasis on random access performance. As a result, when constructing a system, the user must choose between selecting a device with high bit cost that emphasizes throughput, or selecting a device with low bit cost due to increased capacity. Therefore, if high-speed transfer or high throughput becomes necessary as the system grows, the system is replaced by equipment replacement.

[Problem to be solved by the invention] However, from a user's point of view.

The following two problems (i) and (if) have arisen.

(i) High-speed transfer of large amounts of data such as image information is increasingly required, and as systems grow, conventional transfer speeds are becoming insufficient.

(...) In center systems, the increase in batch processing time has become noticeable, forcing small-capacity random access for online real-time processing and large-capacity access for batch processing to be performed on the same storage device during service hours. It's gone. As a result, it has become difficult to suppress the negative impact on the performance of small-capacity access on the online real-time processing side.

As a solution to the above (i), there is a conventional method of improving the apparent transfer performance, that is, a method of connecting a plurality of storage subsystems to the main device and having them perform parallel transfer. In this method, access commands are issued to each storage subsystem in parallel under the control of a user program, and the results are also edited under the control of the user program. It is described in.

However, this method has the trouble of (a) distributing the data to multiple storage subsystems and requiring the user program to manage the data; Also,
(b) Since the user program side must issue read/write access commands and edit the results in parallel, there is a problem in that the impact on the user program is large. Therefore, it is used only in very few systems, especially in systems where high-speed performance is required.

Another solution to (i) is to provide a large number of read/write circuits in the storage medium and use these to perform read/write operations in parallel, thereby improving the performance of the device. A storage subsystem equipped with multiple read/write heads has been proposed.

However, this method has a problem in that the cost increases due to the large number of read/write mechanisms and circuits. Therefore,
This method is used only for specific devices, ie systems where high speed performance is required.

Yet another solution to (i) is to arrange low-cost, small-capacity storage devices in parallel, and first synchronize their rotations.
Next, a control type magnetic disk storage subsystem has also been proposed in which about one byte is simultaneously read out in parallel from rotationally synchronized storage devices. For example, W.I.E., Transactions, on Computers, Vol.

C-35, No. 11.1986, pp, 978-98
8j (Synchronized Disk
Interleaving (M I CHE L L
E Y, KIM; IEEE TRANSACTI○
An example of this method is described in NS ON COMPUTER 8).

In the above method, the cost per bit is low and the transfer speed can be increased without the software being aware of it, so it is very advantageous for systems that place emphasis on increasing the speed of large-capacity transfer. However, since it is based on parallel transfer, the device throughput decreases significantly due to an increase in capacity per independent operation unit, which is disadvantageous for systems that emphasize small-capacity random access performance. That is,
Because the independent operation unit becomes large, the device usage rate tends to increase, and the throughput decreases to 1. As a result, the decrease in device throughput due to the increase in capacity exceeds the improvement in device throughput due to the increase in transfer speed. It gets bigger.

The purpose of the present invention is to solve these conventional problems and (a) enable high-speed large-capacity transfer, (b) improve small-capacity random access performance, and (c) The object of the present invention is to provide a storage subsystem with a low unit capacity price.

[Means to solve the problem]

In order to achieve the above object, the storage subsystem of the present invention (i) is configured by combining a plurality of storage media capable of independent operation, synchronizes reading and writing between the storage media, and stores data in parallel. In a storage subsystem that performs transfer, a mode in which any number of the above storage media are read/written in parallel by linking them together and a mode in which any one of the above storage media is accessed is mixed, based on instructions from a host device. and the above-mentioned parallel reading/setting method.
In the case of the writing mode, all of the storage media are positioned at the target address using a means for detecting that the operations have been completed in parallel, and a means for detecting that the operations of the storage media are completed in parallel. It is characterized in that it has means for inhibiting other access to any storage medium that is in operation. (it) providing a storage means for holding information regarding the smallest logically meaningful data unit between the storage medium and the means for setting the two modes together;
Any number of the above storage media can be linked and read/read in parallel.
When a writing mode is set, the data read from the storage medium or the data sent from the host device is stored in the storage means, and information regarding the smallest logically meaningful data unit is stored. It is characterized by editing based on Furthermore, (■) a buffer memory and a cache control means for manipulating the data on the buffer memory when target data exists on the buffer memory between the storage medium and the main storage device. If the cache control means detects that there is no data on the buffer memory and detects the order of access records and determines that the access is sequential, the cache control means stores an arbitrary number of memories. The feature is that the mode is set to read and write in parallel by linking the media.

[Operation] The present invention has both a mode in which parallel transfer is performed and a mode in which single access is made only to independent operation units, and both modes are dynamically used as necessary. That is, by software or storage subsystem control without physical changes.

When performing large-capacity transfers, use a configuration that takes advantage of parallel transfers, and when performing small-capacity, high-frequency accesses,
A configuration that takes advantage of the performance of each independent operating unit is dynamically selected to suit each process.

Furthermore, it is possible to make changes flexibly in accordance with the growth of the system, and furthermore, it is intended to improve the small capacity high frequency access performance when large capacity transfer access and small capacity high frequency access are performed to the same storage device.

To summarize, the present invention provides (a) a storage subsystem that is configured with a plurality of independently operable storage devices and is capable of device-exclusive write synchronization; Setting a state in which reading and writing can be performed in parallel and a state in which reading and writing can be performed from any one independently operable storage device; (b) setting a logically meaningful minimum state; By having a logic circuit that allows the controller of the storage subsystem to be aware of the units, the same storage format can be used regardless of whether the parallel operation (parallel transfer) mode or the independent operation (independent access) mode is used. (c) both the parallel operation mode and independent operation mode are applied to control the disk cache memory, and when data exists on the cache memory, any one The disk cache memory can be read and written from a storage device that can operate independently, and if there is no data on the cache memory, it can be read and written in parallel under hardware control. The novelty of each method is to reduce the overhead in data copying to a minimum.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a configuration diagram of a storage subsystem showing an embodiment of the first invention, and FIG. 2 is a format diagram showing an example of instructions from a host device.

In the following explanation, a mode in which any plurality of independently operable storage media are linked to read and write in parallel is referred to as a parallel operation mode, and a mode in which any one independently operable storage medium is accessed is referred to as an independent mode. Each will be expressed as an operation mode.

In FIG. 1(a), 1 is a control device that controls a storage device, and 2 is a storage device that is an object of the present invention. The control device 1 includes a state management table 11 inside. FIG. 1(b) is a detailed diagram of the state management table shown in FIG. 1(a).

In the control device 1, 13 to 18 are paths from the accessed host device, 10 is a microprocessor that controls the storage subsystem, and 11 is a state management table that manages parallel operation, independent operation mode, and management during use. , 111
1 is a mode switch, and 112 is a group display. In the storage subsystem storage device 2, 21 is a data buffer, 22 is an alignment synchronization detection circuit, 23 is a data buffer connection control circuit, and 20 is a storage medium (#0 to #7).
It is.

FIG. 2(a) shows a command 200 that instructs operations in parallel operation mode and independent operation mode together with an address, and FIG. 2(b) shows a command 201 that instructs data transfer operation together with data length. .

Now, when the address of an independent operation unit that is a target of parallel operation mode is specified by the command 200 shown in FIG. 2 via the channel path 13 from the host device, the control device 1 transmits this information to the internal micro It is stored in the state management table 11 under the management of the processor 10. The state management table 11 is.

Stores the mode to be set when accessing the storage subsystem. The mode switch 111 of this state management table 11 indicates either the parallel operation mode or the independent operation mode. If this value is 11, it is the parallel operation mode, if this value is 01, it is the independent operation mode, and if the value is 0, it is the independent operation mode.
0 means it is not used. The group display 112 shown in FIG. 1(b) is an identifier used to identify a plurality of arbitrary storage medium groups that operate in parallel transfer mode when a plurality of them exist. Exclusive control when the parallel operation mode is specified is performed using this group as a unit.

Although the control is performed by a microprocessor here, it is not necessarily necessary to use a microprocessor control, and for example, parts with strict time conditions can be directly implemented by a logic circuit.

In FIG. 1(b), storage medium addresses #1 to #3 of independent operation units are currently stored in the eighth group.
4 to #6 indicate that the parallel operation mode is designated for the eighth group, and storage medium address #0 and storage medium address #7 indicate that the independent operation mode is designated. Specification from the host device (for example, command 20
0) specifies only parallel transfer mode or independent operation mode for one group in the command chain. Of course, as long as there is no contention in the operable units (multiple storage media in parallel operation mode are considered as one unit), multiple access operations are possible as before. be. Mode management information when a plurality of commands are operating multiplexed within the storage subsystem is stored in the state management table 11.

The storage device 2 has a data buffer 21 with an appropriate capacity corresponding to the storage medium, and the microprocessor 10
When it receives the command 200, it transfers the group information (information in the state management table) to be connected to the data buffer connection control circuit 23 that is set to correspond to the path, and transfers the data of multiple storage media in the same group. A process is performed in which the buffers 21 are connected and regarded as one data buffer. The microprocessor 10 then instructs the storage medium 20 of each independent operating unit to locate to the specified address.

At this time, the concatenated data buffers 21 are considered as one data buffer, and the information read (or written) from each independent storage medium.

Each read or write unit is concatenated (distributed) and transferred. As a result, only when the parallel transfer mode is specified, the transfer speed is improved to several times that of independent storage media that equivalently performs parallel operations.

Each storage medium is rotationally synchronized, and its relative position from the index marker at a given moment is .

It is assumed that they are all the same. Regarding the rotation synchronization method of each storage medium, a conventional method is used and is not particularly related to the present invention, so a description thereof will be omitted. Although the designated addresses are the same for each storage medium, the positions of the arms do not necessarily match because each storage medium may have been in an independent operation mode in the previous access. Therefore, it is necessary to synchronize the completion of seek operations (alignment synchronization) for all storage media that perform parallel operations. For this purpose, in the storage subsystem of the present invention, the alignment synchronization detection circuit 22 monitors the arm position for each storage medium and monitors the establishment of the AND condition for the completion of the seek of the same group specified in the state management table 11. has been established. When this alignment synchronization detection circuit 22 detects that the condition is true (condition satisfied),
Microprocessor 10 initiates data transfer via data buffer 21. Data transfer is completed when, for example, the length of the transfer specified in command 201 is completed. At the same time as the data transfer of the last command in the command chain is completed, the parallel transfer mode of the corresponding group is released, and the connection of the buffers 21 is also released.

Paths 14 to 1 are sent from other higher-level devices to any of the storage media of multiple independent operation units operating in parallel transfer mode.
If access is made via 8.

As with conventional control, it is necessary to suppress access using a BUSY response or the like. Also in this case.

Referring to the status management table 11, it is checked whether the corresponding storage medium belongs to any group and is in parallel transfer mode, and a BUSY response is sent.

As described above, in this embodiment, it is possible to set the parallel operation mode and the independent operation mode in a mixed manner using the state management table 11, and the alignment synchronization completion detection circuit 22 and the data buffer connection control circuit 23 can set the corresponding mode. It is possible to locate the storage medium at the target address by detecting the completion of synchronization of the instruction completion. Furthermore, the state management table 11 can prevent other accesses to the storage medium until a series of operations with the storage medium are completed.

Conventional storage subsystems have both independent and parallel operation modes, and none of them can be dynamically changed. For example, in a storage subsystem that operates independently, all storage media operate only independently, whereas in a subsystem that operates in parallel, high-speed transfer is possible.
There are always a plurality of storage media that can be accessed independently from the host device, and there is a high probability that they will become unusable due to a signal such as BUSY, which creates a bottleneck for the IOD, making it impossible to apply it to small-capacity random access.

In addition, in a storage device equipped with a parallel transfer mechanism in an independently operating storage medium, the cost of the device is high.6 In this embodiment, an inexpensive storage medium is used to store only the necessary storage area for the necessary period. Since parallel transfer mode can be specified, it can be applied to online random access.
In addition, high-speed transfer of large volumes can be achieved at low bit costs.

FIG. 3 is a configuration diagram of a storage subsystem showing an embodiment of the second invention.

The second invention uses a configuration that emphasizes software compatibility in the first invention. That is, in the first invention, parallel transfer is realized by combining data buffers, and the data is directly transferred to the host device, so files that are to be transferred in parallel are transferred to the memory of the host device. The content depends on the read width of the storage medium of the independent operation unit, and the unit does not necessarily have immediate logical meaning. For this reason, it is necessary to store data with this in mind when processing files such as sorting, merging, etc. using software, or transferring files in parallel, and in either case, management on the software side is required. .

In the second invention, this problem is improved.

Blocking of information transferred to and from a storage medium in a parallel operating mode based on information about the smallest logically meaningful unit, specifically the length of a record or the length of several blocks that make up a record By performing this and transferring the editing results to the host device, the format in the parallel operation mode and the format in the independent operation mode are made common.

A specific example of buffer control will be described below with reference to FIG. In FIG. 3, 11 is a state management table;
3o is a data buffer, 3o is a blocking length storage register (blocking information table), 31 is a blocking buffer, 32 is a data buffer for upper-level device transfer, and 33 is a blocking counter. Further, the configuration of the control device 1 is the same as that of the first invention (Fig. 1), and the commands are also the same as those of the second invention (Fig. 1).
The one shown is used.

The smallest logically meaningful unit may be the record length or a more detailed unit recognized by software, but it must be unique within the same group. Information regarding this block length is stored in advance in the blocking information table 30 in the control device, for example, by a command from a host device or a setting from a control panel of the control device. Furthermore, as shown in FIG. 3, the record information is stored in the order across the storage medium 2o.

This allows the data transferred in parallel operation mode to
Always in ascending order of record addresses.

First, the microprocessor 10 receives the command 200 shown in FIG. 2 specifying the parallel operation mode from the host device and instructs the data buffer connection control circuit 23 to connect the data buffers 21 according to the specification. When the blocking buffer 31 is updated to the blocking information table 30
Set the blocking length based on The blocking buffer 21 has a storage medium 2 corresponding to a storage medium that can operate independently.
It is set according to the read width from 0, and like the data buffer 21, the storage medium corresponding portions can be combined or separated under instructions from the microprocessor 10. Further, the blocking buffer has two buffer surfaces (30.degree. 31) having the same function and is used as an alternating buffer.

- As an example, the case of READ access will be detailed. When transfer from the storage medium is started, the leading portion of each record corresponding to the transfer width read from each storage medium 20 is stored on the data buffer 21. In FIG. 3, the smallest logically significant unit is represented by Rn, and the unit read from the storage medium is represented by (Rn). The microprocessor 10 stores this information in the data buffer 21.
The data is transferred from the block to the blocking buffer 31, and the blocking counter 33 counts the number of transfers.

The blocking counter 33 compares the blocking information provided by the blocking information table 30 with the counter value, and does not transfer the information to the host device until the counter value becomes larger than the value obtained from the blocking information.

When the value of the blocking counter 33 becomes larger than the value at which blocking information can be obtained, that is, when the smallest logically significant unit is stored in the blocking buffer 31, the microprocessor 10 transfers the data to the storage medium 2.
This is done by swapping the transfer from the 0 side to the alternate buffer side. Next, the microprocessor 10 instructs the blocking buffers 30 and 31 to separate into independent operation units corresponding to storage media, and further starts transferring the blocking buffer corresponding to each storage medium to the higher-level device from the lowest number. . When the transfer of the last blocking buffer corresponding to the storage medium is completed, the blocking buffer 3o is connected again, and the buffer for controlling transfer to the host device and the buffer for controlling transfer from the storage medium 20 side are swapped.

From then on, this operation is repeated until the data transfer is completed.

FIG. 4 is a time chart during data transfer in FIG. 3. Note that the time chart 40 is a transfer time chart in a conventional storage subsystem only in the independent operation mode, and the time chart 41 is a time chart according to an embodiment of the present invention.

In the conventional time chart 40, the records are stored sequentially within the same storage medium because the storage subsystem is only in an independent mode of operation. On the other hand, in the time chart 41 when the present invention is applied, the blocks R2 to R8 operate in parallel operation mode, so the control device has a transfer capacity eight times that of the storage medium. As shown in the time chart 41, the positioning time is slightly longer due to alignment and synchronization. Then, on the buffer 1 side, at the time when R1 becomes transferable, reading of R1 to R8 is completed, and R
At the time when 2-R8 becomes transferable, reading of R9-R16 is completed. As is clear from this figure, the transfer time for the first record is the same for both records, but the effect of parallel transfer appears in the transfer time for the second and subsequent records.

Originally, the bottleneck was the transfer speed on the storage medium side, but the present invention enables high-speed transfer on the storage medium side in parallel operation mode, making it possible to transfer data using the maximum performance of the transfer path. It became. Furthermore, an important point of the present invention is that the format on the storage medium is the same in both independent and parallel operation modes, and the same record can be read and written in both independent and parallel operation modes. be. by this,
Even when small-capacity random access for online real-time processing and large-capacity access for batch processing are performed on the same file during online service hours, it is possible to prevent the small-capacity random access on the online real-time processing side from having an adverse effect on performance.

FIG. 5 is a configuration diagram of a storage subsystem showing an embodiment of the third invention.

A third aspect of the invention is to realize a high-performance disk cache memory by detecting the point in time when a parallel operation mode is specified on the hardware side when the storage subsystem of the present invention is applied to a disk cache memory. Disk cache memory is a buffer (
When a part of the storage medium 20 is stored in the cache (cache) and this copy exists on the cache memory, the average response performance of the storage subsystem can be improved by manipulating (reading/writing) the data on the cache memory. It is intended to improve. However, when there is no data on the cache memory, it is necessary to copy the data on the storage medium to the cache memory, and reducing this time is the key to improving the performance of the disk cache memory. In addition, for sequential accesses, the record to be accessed first can be clearly estimated, so even with the current disk cache subsystem, there is a method of detecting sequential accesses on the hardware side and copying them to the cache memory in advance. , called sequential prefetch) is used morphically.

In FIG. 5, 1 is a control device, 50 is a cache control section, and 51 is a cache storage section. 2 is a storage subsystem storage device, which is exactly the same as that shown in FIG. 501 in the cache control unit 50 is a microprocessor for cache control.

510 of the cache storage unit 51 is a cache entry table that manages the presence or absence of data on the cache memory;
511 is a cache memory, and 512 is a circuit that detects an access pattern of data on the cache memory.

513 is a cache miss flag, 514 is a brief fetch flag, and 515 is a parallel transfer mode automatic setting circuit.

Based on the access from the host device, the microprocessor 501 indexes the cache entry table 510 and searches whether the accessed data has been copied onto the cache memory 511 or not. If data exists on cache memory 511, the data on cache memory 511 is manipulated, and if data does not exist, cache miss flag 513 is set.

On the other hand, a sequential flag is set in the data copied onto the cache memory 511 by a circuit 512 that detects whether the previous access was sequential. If the sequential flag is on and the next data has not been copied onto the cache, the brief fetch flag 514 is set. The above configuration and operation are commonly performed in conventional disk cache subsystems, so they will not be described in further detail.

In the disk cache subsystem of the present invention, the parallel transfer mode is automatically set by hardware based on the information of the cache miss flag 513 and the information of the brief fetch flag 514, and high-speed transfer between the cache and the storage medium is achieved. It is characterized by having people do this.

The information on the cache miss flag 513 and the information on the brief fetch flag 514 are decoded by the parallel transfer mode automatic setting circuit 515, and under the control of the microprocessors 1o and 501, the mode switch of the state management table 11 is set as the cache target. In addition, all the independent storage media that are the targets of data copying are set in the state of the management table 11. As a result, the data buffer connection control circuit 2
3 and the alignment and synchronization monitoring circuit 22 operate to enable parallel transfer.

For example, the cache miss flag 513 is set to ON.
One parallel transfer is instructed, but when the brief fetch flag 514 is ON, multiple parallel transfers are instructed.

In addition, in FIG. 5, 31 is a blocking buffer;
32 is a data buffer for upper-level device transfer, and 33 is a blocking counter, and their operations are the same as in FIG. 3.

FIG. 6 is a time chart at the time of a cache miss in the disk cache subsystem of FIG.
0 is a conventional time chart, and 1-151 is a time chart of the present invention.

File information is stored sequentially across each storage medium. As shown in time chart 1-60, due to these transfers, the processing that the conventional disk cache memory would take, for example, one rotation, is hidden within the original transfer time in time chart 61, and the position Although the time is slightly longer due to alignment synchronization, R1-R8 are read out simultaneously. As a result, it is possible to minimize the overhead in data copying of the conventional disk cache, and it is possible to realize a more efficient disk cache memory.

As described above, in the present invention, there are two modes: a mode in which any plurality of independently operable storage media are linked to read or write in parallel, and a mode in which any one independently operable storage medium is accessed. These settings can be set and changed for each access as necessary, so reading and writing in parallel speeds up large-capacity transfers and allows data to be transferred to any single storage medium that can operate independently. Access is possible. In addition, by reducing the impact of large-capacity transfers that are accessed concurrently, it is possible to improve small-capacity random access performance and achieve high-performance disk cache memory by appropriately controlling both modes with hardware. can. Furthermore, in the present invention, a high-performance storage subsystem can be realized by combining storage media using conventional storage media technology, without having to chain the storage media themselves to have particularly high performance for large-scale computers. For example, since it is possible to apply an inexpensive storage medium for OA news, it is possible to provide a storage subsystem with a low unit capacity price (bit cost) for large computers.

〔Effect of the invention〕

As explained above, according to the present invention, operations that take advantage of the performance of parallel transfers are performed when transferring large amounts of data, and operations that take advantage of the performance of independent operation units when performing frequent accesses of small amounts are performed in accordance with the processing. Because it selects dynamically, it realizes a storage subsystem that can speed up large-capacity transfers, improve small-capacity random access performance, and reduce unit capacity costs, and that can be changed flexibly as the system grows. be able to.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a storage subsystem showing an embodiment of the first invention according to the present invention, FIG. 2 is a diagram showing an example of commands used in the present invention, and FIG. A configuration diagram of a storage subsystem showing an embodiment of the invention, FIG. 4 is a time chart of the comparison operation in FIG. 3, and FIG. 5 is a configuration diagram of a storage subsystem showing an embodiment of the third invention according to the invention. 6 is a time chart of the comparison operation in FIG. 5. 1: Storage subsystem control device, 2: Storage subsystem storage device, 10: Storage subsystem control microprocessor, 11: Status management table, 111: Mode switch, 112: Group display, 13 to 18 to second higher-level device path, 2o: storage medium, 21: data buffer, 22: alignment synchronization detection circuit, 23: data buffer connection control circuit, 3
1: Blocking buffer, 32: Transfer data buffer in upper bag, 33 Ni blocking counter, 5o: Cache control unit, 5o1: Cache control microprocessor, 51: Cache storage unit, 51o: Cache entry table, 511: Cache memory, 512
: Cache access pattern detection circuit, 513: Cache miss flag register, 514: Sequential prefetch flag register, 515: Parallel operation mode automatic setting circuit, 20o: Command for instructing group display, mode setting, and blocking unit setting. 201: Command to instruct setting of access order and number of transfer blocks. Figures (a) and (b)

Claims (3)

[Claims] (1) In a storage subsystem that is configured by combining multiple storage media that can operate independently, synchronizes reading and writing between the storage media, and transfers data in parallel, based on instructions from a host device, , a means for setting a mode in which an arbitrary number of the storage media are interlocked to read/write in parallel, and a mode in which any one of the storage media is accessed; and a mode in which the read/write is performed in parallel. In this case, means for detecting that all of the storage media have synchronized the positioning operation to the target address, and any storage medium operating in parallel until the series of operations of the storage media is completed. 1. A storage subsystem comprising: means for inhibiting other access to a medium. (2) Between the storage medium and the means for setting the above two modes in a mixed manner, a storage means for retaining information regarding the smallest logically significant data unit is provided, and an arbitrary number of the storage mediums can be used. When a mode is set in which reading and writing are performed in parallel in conjunction with each other, the data read from the storage medium or the data sent from the host device is stored in the storage means and logically interpreted. 2. The storage subsystem according to claim 1, wherein the editing is performed based on information regarding the smallest data unit that the storage subsystem has. (3) A buffer memory is provided between the storage medium and the main storage device, and a cache control means for manipulating the data on the buffer memory when target data exists on the buffer memory. , when the cache control means detects that there is no data on the buffer memory and detects the access record order and determines that the access is sequential, the cache control means can access any number of storage media. 3. The storage subsystem according to claim 1, wherein the storage subsystem is set to a mode in which reading and writing are performed in parallel in conjunction with each other.