JPH02130014A - Temperature compensation circuit for capacity - Google Patents
Temperature compensation circuit for capacityInfo
- Publication number
- JPH02130014A JPH02130014A JP63284151A JP28415188A JPH02130014A JP H02130014 A JPH02130014 A JP H02130014A JP 63284151 A JP63284151 A JP 63284151A JP 28415188 A JP28415188 A JP 28415188A JP H02130014 A JPH02130014 A JP H02130014A
- Authority
- JP
- Japan
- Prior art keywords
- temperature
- transistor
- circuit
- capacitance
- oscillation frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims abstract description 28
- 230000000295 complement effect Effects 0.000 claims abstract description 12
- 239000003990 capacitor Substances 0.000 claims description 14
- 230000005669 field effect Effects 0.000 claims description 8
- 230000000903 blocking effect Effects 0.000 claims description 4
- 238000001514 detection method Methods 0.000 description 20
- 238000010586 diagram Methods 0.000 description 7
- 238000007599 discharging Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000009530 blood pressure measurement Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Landscapes
- Indication And Recording Devices For Special Purposes And Tariff Metering Devices (AREA)
Abstract
Description
本発明は容量素子の温度補償を行うための回路に関し、
静電容量型の圧力検出器、物理量を容量変化で検出する
他の検出器、容量素子の容量の大きさで周期が決定され
る発振回路等に応用できる。The present invention relates to a circuit for temperature compensation of a capacitive element,
It can be applied to capacitive pressure detectors, other detectors that detect physical quantities by changes in capacitance, and oscillation circuits whose period is determined by the capacitance of a capacitive element.
各種の用途のうち圧力センサに限れば、小型のシリコン
圧力センサには、ピエゾ抵抗型と静電容量型とが存在す
る。ピエゾ抵抗型はブリッジ回路を構成して、圧力変化
を抵抗値の変化として検出するものである。
これに対して、静電容量型は圧力変化を容量変化として
検出するものである。容量を検出する方法として、CR
発振回路により容量変化を周波数変化として検出するも
のや、圧力検出容量と固定容量との直列接続回路に交流
電流を印加して、圧力検出容量の容量をその両端の電圧
として検出するものである。Among various applications, when it comes to pressure sensors, there are two types of small silicon pressure sensors: piezoresistive type and capacitive type. The piezoresistive type constitutes a bridge circuit and detects pressure changes as changes in resistance value. On the other hand, the capacitive type detects pressure changes as capacitance changes. As a method to detect capacity, CR
One is to detect a capacitance change as a frequency change using an oscillation circuit, and the other is to apply an alternating current to a series connection circuit of a pressure sensing capacitor and a fixed capacitor, and detect the capacitance of the pressure sensing capacitor as the voltage across it.
きころが、ピエゾ抵抗型にしても静電容量型にしても、
抵抗又は静電容量に温度依存性があり、この温度特性を
補償するための回路が必要である。
本発明は、簡単な回路構成で精度の良い容量の温度補償
を達成すると共に集積化の容易な温度補償回路を実現す
ることである。Whether the force is a piezoresistance type or a capacitance type,
Resistance or capacitance has temperature dependence, and a circuit is required to compensate for this temperature characteristic. An object of the present invention is to achieve accurate capacitance temperature compensation with a simple circuit configuration and to realize a temperature compensation circuit that is easy to integrate.
【5題を解決するための手段】
上記課題を解決するための発明の構成は、容量素子と、
一方が導通又は遮断状態の時、他方は逆に遮断又は導通
状態となる相補型のMOS型電界効果トランジスタと、
前記容量素子と前記相補型のMOS型電界効果トランジ
スタとを用いて構成され、前記容量素子に対して、前記
相補型のMOS型電界効果トランジスタの一方のトラン
ジスタを介して充電し、又、他のトランジスタを介して
放電することにより、前記容量素子の容量に応じた周波
数で発振する発振回路と
を有し、
前記容量素子の温度特性を前記トランジスタの動作特性
の温度特性で補償することにより前記発振周波数に温度
依存性が存在しないように、相補型のMOSトランジス
タの駆動電圧を調整したことを特徴とする。[Means for Solving the 5 Problems] The structure of the invention for solving the above problems consists of a capacitive element and a complementary MOS type in which when one is in a conducting or blocking state, the other is in a blocking or conducting state. It is configured using a field effect transistor, the capacitive element and the complementary MOS field effect transistor, and the capacitive element is charged through one transistor of the complementary MOS field effect transistor. , and an oscillation circuit that oscillates at a frequency corresponding to the capacitance of the capacitive element by discharging through another transistor, the temperature characteristic of the capacitive element being compensated by the temperature characteristic of the operating characteristic of the transistor. Accordingly, the drive voltage of the complementary MOS transistor is adjusted so that the oscillation frequency does not have temperature dependence.
相?ifi型のMOS (Matal 0xide 5
ilicon)型電界効果トランジスタ(以下r C−
MOSPETJという)は、共通のゲート電圧に対して
、一方が導通又は遮断状態の時、他方は逆に遮断又は導
通状態となる。
そして、容量素子はC−MOSPETと、このC−MO
SFETの一方のトランジスタの導通状態で容量素子を
充電し、他方のトランジスタの導通状態でその容量素子
の電荷を放電するように接続され、容量素子に対して充
放電が継続して起こる発振回路が形成される。そして、
この時の発振周波数は、充電回路及び放電回路のCR時
定数によって決定されるので、その発振周波数は容量素
子の容量に逆比例することになる。
ところが、CR時定数は、容量素子の温度依存性のため
に、温度依存性を有することになり、発振周波数も温度
に依存して変化することになる。
一方、C−MOSFETの導通時のドレイン電流の温度
係数は、ゲート電圧−しきい値電圧に依存することが知
られており、特に、ゲート電圧−しきい値電圧を変化さ
せれば、正にも負にも成り得る。従って、圧力検出容量
は温度特性を有するが、C−&1O3FETのゲート電
圧を含む駆動電圧(ゲート電圧、ゲート電圧を変化させ
得る駆動電圧)を調整することでC−MOSFETのゲ
ート電圧−しきい値電圧を調整することにより導通時の
ドレイン電流の温度係数を調整して、CR時定数を温度
に依らず一定とすることができる。
本発明は、このようにCR時定数の温度依存性をなくす
るように、C−MOSFETの駆動電圧を調整すること
を特徴としている。
従って、駆動電圧の調整だけで、発振周波数の温度依存
性をなくすことができる。phase? ifi type MOS (Matal Oxide 5
ilicon) type field effect transistor (rC-
When one of the MOSPETs is in a conductive or cut-off state with respect to a common gate voltage, the other becomes a cut-off or conductive state. The capacitive element is C-MOSPET and this C-MOSPET.
An oscillation circuit that is connected so that when one transistor of the SFET is conductive, the capacitive element is charged, and when the other transistor is conductive, the charge of the capacitive element is discharged, and the capacitive element is continuously charged and discharged. It is formed. and,
The oscillation frequency at this time is determined by the CR time constants of the charging circuit and the discharging circuit, so the oscillation frequency is inversely proportional to the capacitance of the capacitive element. However, the CR time constant has temperature dependence due to the temperature dependence of the capacitive element, and the oscillation frequency also changes depending on the temperature. On the other hand, it is known that the temperature coefficient of the drain current during conduction of a C-MOSFET depends on the gate voltage-threshold voltage, and in particular, if the gate voltage-threshold voltage is changed, can also be negative. Therefore, the pressure detection capacitor has temperature characteristics, but by adjusting the drive voltage (gate voltage, drive voltage that can change the gate voltage) including the gate voltage of the C-MOSFET, the gate voltage - threshold value of the C-MOSFET can be adjusted. By adjusting the voltage, the temperature coefficient of the drain current during conduction can be adjusted, and the CR time constant can be made constant regardless of temperature. The present invention is characterized in that the drive voltage of the C-MOSFET is adjusted so as to eliminate the temperature dependence of the CR time constant. Therefore, the temperature dependence of the oscillation frequency can be eliminated simply by adjusting the drive voltage.
以下、本発明を具体的な実施例に基づいて説明する。本
実施例は静電容量型の圧力検出回路に関するものである
。
第1図は本発明の第1実施例に係る容量検出回路を示し
た回路図である。
トランジスタTriとトランジスタTr2. トランジ
スタTr3とトランジスタTr4. トランジスタTr
5とトランジスタTr8. トランジスタTr6とトラ
ンジスタTr9. トランジスタTr7とトランジスタ
Tr 10とは、それぞれ、一方のトランジスタが導通
又は遮断状態の時には、他方のトランジスタは、それぞ
れ、遮断又は導通状態となるC40SFETである。又
、C。
は外部検出圧力に応じて静電容量の変化する圧力検出容
量である。
トランジスタTr3とトランジスタTr4で構成される
C−MOSF[lTは、圧力検出容量C,を充電又は放
電するための回路である。
トランジスタTr4が導通状態の時には、電源v0゜か
ら圧力検出容ff1c、、 トランジスタTr4と電流
が流れて圧力検出容量C,は電源V、nから充電され、
圧力検出容量C,の一端の電位vXはトランジスタTr
4のオン抵抗と圧力検出容量CXとで決定される時定数
の指数関数で減衰する。一方、トランジスタTr3が導
通状態の時には、圧力検出容量C8に充電された電荷は
トランジスタTr3を介して放電され、電位VXはトラ
ンジスタTr3のオン抵抗と圧力検出容量C8とで決定
される時定数の指数関数で増加する。
又、トランジスタTr5〜トランジスタTrlOはシュ
ミットトリガ回路であり、入力電位Vxが上限値Vuを
越えると、トランジスタTry、 Tr9がオンし、ト
ランジスタTr5. Tr6がオフとなり、入力電位V
Xが下限値vLを下回ると、トランジスタTr8. T
r9がオフし、トランジスタTr5. Tr6がオンと
なる。そして、出力電位VsがLレベルの時トランジス
タTr7はオンしトランジスタTrlOはオフし、出力
電位VsがHレベルの時トランジスタTr7はオフしト
ランジスタT「10はオンとなることにより、シュミッ
トトリガ回路に躍層特性を持たせている。又、トランジ
スタTrll、 Tr12は出力トランジスタであり、
電位Vsを反転して出力している。又、電位Vsはトラ
ンジスタTri、 Tr2に帰還入力しており、トラン
ンスタTri〜トランジスタTrlOで発振回路を形成
している。
上記構成の回路において、電位vs、電位vX、電位V
ouLの波形を第2図に示す。第2図における電位vX
は、圧力検出容flcxとトランジスタTr3. Tr
4のオン抵抗で決定される時定数に関連して増減する。
従って、出力電位V。titの発振周波数は検出圧力に
関してはトランジスタTr3. Tr4のオン抵抗が不
変であるので圧力検出容量Cxの大きさに逆比例するこ
とになり、この周波数の大きさから容量の大きさ、即ち
、圧力を検出することができる。
一方、MOSPETのドレイン電流の温度係数は、第6
図に示す特性を有しており、ゲート電圧−しきい値電圧
の大きさによって、正負任意に変化させることができる
。上記構成の回路においてはゲート電圧vGはほぼ駆動
電圧vnoに等しいため、圧力検出容量Cxの大きさの
温度係数を補償して、CR時定数が温度依存性を有しな
いようなドレイン電流の温度係数を駆動電圧V。。を調
整することで設定することができる。
ドレイン電流の温度係数を測定したところ、n−MOS
PETテlt、ケート電圧=シキイ値電圧+1.5Vf
7)時、p−10sFETでは、ゲート電圧=しきい値
電圧−1゜Ovの時に温度係数が零となった。
そこで、駆動電圧Vlli1と発振周波数fとの関係を
20℃止50℃で温度を変化させて測定したところ、第
3図に示すような特性が得られた。この結果、駆動電圧
VDDが約2.5vの時に、発振周波数に温度依存性が
ないことが分った。このようにして、駆動電圧V、は発
振周波数の温度依存性がない値に実験により設定すれば
良い。
又、上記シュミットトリガ回路による他、第4図に示す
非安定マルチバイブレータにより発振回路を構成しても
良い。
即ち、C−MOSFBTを構成するトランジスタTr2
0゜Tr21と、増幅器A1.A2と、圧力検出容量C
xとで非安定マルチバイブレータが構成されている。即
ち、圧力検出容量C1IはトランジスタTr20の導通
により充電され、トランジスタTr21の導通により放
電される。
又、同様に、駆動電圧VD++と発振周波数fとの関係
を10℃、21℃、41℃とで温度を変化させて測定し
たところ、第5図に示すような特性が得られた。この結
果、駆動電圧V。が約3.Ovの時に、発振周波数に温
度依存性がないことが分った。このようにして、駆動電
圧は発振周波数の温度依存性がない値に実験により設定
される。
以上述べたように、本発明は、容量の温度補償を目的と
した回路であるので、容量型圧力センサの圧力検出回路
に用いる他、その他、物理量を容量変化として検出する
センサの検出回路及び容量素子で発振周波数の決定され
る温度安定性の良い発振回路に用いることができる。The present invention will be described below based on specific examples. This embodiment relates to a capacitive pressure detection circuit. FIG. 1 is a circuit diagram showing a capacitance detection circuit according to a first embodiment of the present invention. Transistor Tri and transistor Tr2. Transistor Tr3 and transistor Tr4. Transistor Tr
5 and transistor Tr8. Transistor Tr6 and transistor Tr9. The transistor Tr7 and the transistor Tr10 are each a C40SFET, and when one transistor is in a conductive or cutoff state, the other transistor is in a cutoff or conduction state, respectively. Also, C. is a pressure detection capacitance whose capacitance changes according to externally detected pressure. The C-MOSF [IT, which is composed of the transistor Tr3 and the transistor Tr4, is a circuit for charging or discharging the pressure detection capacitor C. When the transistor Tr4 is conductive, current flows from the power source v0° to the pressure sensing capacitor ff1c, and the pressure sensing capacitor C is charged from the power source V,n.
The potential vX at one end of the pressure detection capacitor C is the transistor Tr.
4 and the pressure detection capacitor CX. On the other hand, when the transistor Tr3 is in a conductive state, the charge charged in the pressure detection capacitor C8 is discharged via the transistor Tr3, and the potential VX is an index of a time constant determined by the on-resistance of the transistor Tr3 and the pressure detection capacitor C8. Increase with function. Further, the transistors Tr5 to TrlO are Schmitt trigger circuits, and when the input potential Vx exceeds the upper limit value Vu, the transistors Try and Tr9 are turned on, and the transistors Tr5. Tr6 is turned off and the input potential V
When X falls below the lower limit vL, transistors Tr8. T
r9 is turned off, and transistors Tr5. Tr6 is turned on. Then, when the output potential Vs is at the L level, the transistor Tr7 is turned on and the transistor TrlO is turned off, and when the output potential Vs is at the H level, the transistor Tr7 is turned off and the transistor T10 is turned on, so that the Schmitt trigger circuit is activated. The transistors Trll and Tr12 are output transistors.
The potential Vs is inverted and output. Further, the potential Vs is fed back to the transistors Tri and Tr2, and the transistor Tri to the transistor TrlO form an oscillation circuit. In the circuit with the above configuration, the potential vs, the potential vX, the potential V
The waveform of ouL is shown in FIG. Potential vX in Fig. 2
is the pressure detection capacitor flcx and the transistor Tr3. Tr
It increases or decreases in relation to the time constant determined by the on-resistance of 4. Therefore, the output potential V. Regarding the detected pressure, the oscillation frequency of the transistor Tr3. Since the on-resistance of Tr4 remains unchanged, it is inversely proportional to the size of the pressure detection capacitance Cx, and the size of the capacitance, that is, the pressure can be detected from the size of this frequency. On the other hand, the temperature coefficient of the drain current of MOSPET is the 6th
It has the characteristics shown in the figure, and can be arbitrarily changed to be positive or negative depending on the magnitude of the gate voltage-threshold voltage. In the circuit with the above configuration, the gate voltage vG is approximately equal to the drive voltage vno, so the temperature coefficient of the drain current is compensated for the temperature coefficient of the pressure detection capacitance Cx so that the CR time constant does not have temperature dependence. is the driving voltage V. . It can be set by adjusting. When the temperature coefficient of drain current was measured, it was found that n-MOS
PET telt, gate voltage = threshold voltage + 1.5Vf
7), in the p-10s FET, the temperature coefficient became zero when the gate voltage = threshold voltage - 1°Ov. Therefore, when the relationship between the driving voltage Vlli1 and the oscillation frequency f was measured while changing the temperature from 20° C. to 50° C., the characteristics shown in FIG. 3 were obtained. As a result, it was found that the oscillation frequency had no temperature dependence when the drive voltage VDD was about 2.5V. In this way, the drive voltage V may be experimentally set to a value that has no temperature dependence of the oscillation frequency. In addition to using the Schmitt trigger circuit described above, the oscillation circuit may also be configured using an unstable multivibrator shown in FIG. That is, the transistor Tr2 constituting the C-MOSFBT
0°Tr21 and amplifier A1. A2 and pressure detection capacity C
x constitutes an unstable multivibrator. That is, the pressure detection capacitor C1I is charged by the conduction of the transistor Tr20, and discharged by the conduction of the transistor Tr21. Similarly, when the relationship between the driving voltage VD++ and the oscillation frequency f was measured while changing the temperature at 10° C., 21° C., and 41° C., the characteristics shown in FIG. 5 were obtained. As a result, the drive voltage V. is about 3. It was found that the oscillation frequency had no temperature dependence when Ov. In this way, the drive voltage is experimentally set to a value that has no temperature dependence of the oscillation frequency. As described above, the present invention is a circuit aimed at temperature compensation of capacitance, so it can be used in a pressure detection circuit of a capacitance type pressure sensor, as well as a detection circuit of a sensor that detects a physical quantity as a capacitance change, and a capacitance. It can be used in oscillation circuits with good temperature stability in which the oscillation frequency is determined by the element.
本発明は、容量素子に対する充放電回路を相補型のMO
S型電界効果トランジスタを用いて構成すると共にその
充放電回路の時定数に応じた周期で発振する発振回路を
有しており、容量素子の温変時性をトランジスタの動作
特性の温度特性で補償することにより発振周波数の温度
依存性が存在しないように、相補型のMOSトランジス
タの駆動電圧を調整しているので、簡便な回路で容量素
子の温度補償が可能となり、集積化が容易となる。
特に静電容量型の圧力検出回路に用いた場合には、温度
に依存しない精度の高い圧力測定が可能となる。又、相
補型のMOSトランジスタ等で構成しているので集積化
が容易となる。The present invention provides a charging/discharging circuit for a capacitive element using a complementary MO
It is constructed using S-type field effect transistors and has an oscillation circuit that oscillates at a period corresponding to the time constant of the charge/discharge circuit, and compensates for the temperature variation of the capacitive element using the temperature characteristics of the transistor's operating characteristics. As a result, the drive voltage of the complementary MOS transistor is adjusted so that there is no temperature dependence of the oscillation frequency, making it possible to compensate for the temperature of the capacitive element with a simple circuit and facilitating integration. Particularly when used in a capacitive pressure detection circuit, highly accurate pressure measurement independent of temperature becomes possible. Furthermore, since it is composed of complementary MOS transistors, etc., integration becomes easy.
第1図は本発明の具体的な実施例に係る容量検出回路を
示した回路図、第2図はその動作特性を示すタイミング
チャート、第3図は同実施例回路の発振周波数と駆動電
圧との関係を温度をパラメータとして示す測定図、第4
図は他の実施例に係る容量検出回路を示した回路図、第
5図はその容量検出回路による発振周波数と駆動電圧と
の関係を温度をパラメータとして示す測定図、第6図は
1103F[!Tのドレイン電流の温度係数の電圧依存
性を示す特性図である。
ri
〜Tr12゜
Tr20゜FIG. 1 is a circuit diagram showing a capacitance detection circuit according to a specific embodiment of the present invention, FIG. 2 is a timing chart showing its operating characteristics, and FIG. 3 is a diagram showing the oscillation frequency and driving voltage of the circuit of the embodiment. Measurement diagram showing the relationship between using temperature as a parameter, No. 4
The figure is a circuit diagram showing a capacitance detection circuit according to another embodiment, FIG. 5 is a measurement diagram showing the relationship between the oscillation frequency and drive voltage by the capacitance detection circuit using temperature as a parameter, and FIG. 6 is a 1103F [! FIG. 3 is a characteristic diagram showing the voltage dependence of the temperature coefficient of the drain current of T. ri ~Tr12゜Tr20゜
Claims (1)
状態となる相補型のMOS型電界効果トランジスタと、 前記容量素子と前記相補型のMOS型電界効果トランジ
スタとを用いて構成され、前記容量素子に対して、前記
相補型のMOS型電界効果トランジスタの一方のトラン
ジスタを介して充電し、又、他のトランジスタを介して
放電することにより、前記容量素子の容量に応じた周波
数で発振する発振回路と を有し、 前記容量素子の温度特性を前記トランジスタの動作特性
の温度特性で補償することにより前記発振周波数に温度
依存性が存在しないように、相補型のMOSトランジス
タの駆動電圧を調整したことを特徴とする容量の温度補
償回路。[Scope of Claims] A capacitive element, a complementary MOS field effect transistor in which when one is in a conducting or blocking state, the other is in a blocking or conducting state, the capacitive element and the complementary MOS field effect transistor. The capacitor is charged through one transistor of the complementary MOS field effect transistor and discharged through the other transistor, thereby increasing the capacitance. an oscillation circuit that oscillates at a frequency according to the capacitance of the element, and compensates the temperature characteristics of the capacitive element with the temperature characteristics of the operating characteristics of the transistor so that the oscillation frequency does not have temperature dependence; A capacitive temperature compensation circuit characterized by adjusting the driving voltage of complementary MOS transistors.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63284151A JP2807476B2 (en) | 1988-11-09 | 1988-11-09 | Capacitance temperature compensation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63284151A JP2807476B2 (en) | 1988-11-09 | 1988-11-09 | Capacitance temperature compensation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02130014A true JPH02130014A (en) | 1990-05-18 |
JP2807476B2 JP2807476B2 (en) | 1998-10-08 |
Family
ID=17674838
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63284151A Expired - Lifetime JP2807476B2 (en) | 1988-11-09 | 1988-11-09 | Capacitance temperature compensation circuit |
Country Status (1)
Country | Link |
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JP (1) | JP2807476B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5291534A (en) * | 1991-06-22 | 1994-03-01 | Toyoda Koki Kabushiki Kaisha | Capacitive sensing device |
JP2008245715A (en) * | 2007-03-29 | 2008-10-16 | Olympus Medical Systems Corp | Capacitive transducer device and in-body-cavity diagnostic ultrasound system |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58165414A (en) * | 1982-03-26 | 1983-09-30 | Hitachi Ltd | Oscillating circuit |
JPS60158717A (en) * | 1984-01-27 | 1985-08-20 | Seiko Instr & Electronics Ltd | Oscillation circuit with temperature compensation |
-
1988
- 1988-11-09 JP JP63284151A patent/JP2807476B2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58165414A (en) * | 1982-03-26 | 1983-09-30 | Hitachi Ltd | Oscillating circuit |
JPS60158717A (en) * | 1984-01-27 | 1985-08-20 | Seiko Instr & Electronics Ltd | Oscillation circuit with temperature compensation |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5291534A (en) * | 1991-06-22 | 1994-03-01 | Toyoda Koki Kabushiki Kaisha | Capacitive sensing device |
JP2008245715A (en) * | 2007-03-29 | 2008-10-16 | Olympus Medical Systems Corp | Capacitive transducer device and in-body-cavity diagnostic ultrasound system |
Also Published As
Publication number | Publication date |
---|---|
JP2807476B2 (en) | 1998-10-08 |
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