JPH02130010U - - Google Patents

Info

Publication number
JPH02130010U
JPH02130010U JP3951089U JP3951089U JPH02130010U JP H02130010 U JPH02130010 U JP H02130010U JP 3951089 U JP3951089 U JP 3951089U JP 3951089 U JP3951089 U JP 3951089U JP H02130010 U JPH02130010 U JP H02130010U
Authority
JP
Japan
Prior art keywords
voltage
power supply
output
connection point
supply line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3951089U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3951089U priority Critical patent/JPH02130010U/ja
Publication of JPH02130010U publication Critical patent/JPH02130010U/ja
Pending legal-status Critical Current

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  • Continuous-Control Power Sources That Use Transistors (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の電源安定化回路を示す回路図
、第2図は第1図の特性を示す特性図である。 14……基準電圧源、15,16,17……抵
抗、18,20……誤差増幅器、19,21……
トランジスタ。
FIG. 1 is a circuit diagram showing the power supply stabilizing circuit of the present invention, and FIG. 2 is a characteristic diagram showing the characteristics of FIG. 1. 14... Reference voltage source, 15, 16, 17... Resistor, 18, 20... Error amplifier, 19, 21...
transistor.

Claims (1)

【実用新案登録請求の範囲】 (1) リツプルを含む電源電圧が印加される第1
電源ラインと、 前記リツプルを除去する為のリツプル除去回路
と、 該リツプル除去回路の出力電圧が印加される第
2電源ラインと、 該第2電源ラインとアースとの間に直列接続さ
れた複数の抵抗と、 該複数の抵抗の第1接続点に得られる電圧を出
力電圧として導出する出力回路と、 基準電圧と前記複数の抵抗の第2接続点に得ら
れる電圧とを比較し、前記第1接続点に得られる
電圧を定電圧化する為の手段とから成り、 前記第2電源ラインの電圧が所定値以上の時、
前記第1接続点から定電圧出力を発生し、所定値
未満の時、前記第1接続点から前記第2電源ライ
ンの電圧の分圧出力を発生する様にしたことを特
徴とする電源安定化回路。 (2) 前記出力回路は、コレクタ・エミツタ路が
前記第1電源ラインと接続されたトランジスタを
有し、該トランジスタのコレクタ・エミツタ路か
ら出力電圧を導出することを特徴とした請求項(1
)記載の電源安定化回路。
[Scope of claims for utility model registration] (1) The first
A power supply line, a ripple removal circuit for removing the ripple, a second power supply line to which the output voltage of the ripple removal circuit is applied, and a plurality of power supply lines connected in series between the second power supply line and ground. a resistor; an output circuit that derives the voltage obtained at a first connection point of the plurality of resistors as an output voltage; and a reference voltage and a voltage obtained at a second connection point of the plurality of resistances, and means for making the voltage obtained at the connection point a constant voltage, and when the voltage of the second power supply line is above a predetermined value,
The power source stabilization is characterized in that a constant voltage output is generated from the first connection point, and when the voltage is less than a predetermined value, a divided voltage output of the voltage of the second power line is generated from the first connection point. circuit. (2) Claim (1) characterized in that the output circuit includes a transistor whose collector-emitter path is connected to the first power supply line, and the output voltage is derived from the collector-emitter path of the transistor.
) described power supply stabilization circuit.
JP3951089U 1989-04-03 1989-04-03 Pending JPH02130010U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3951089U JPH02130010U (en) 1989-04-03 1989-04-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3951089U JPH02130010U (en) 1989-04-03 1989-04-03

Publications (1)

Publication Number Publication Date
JPH02130010U true JPH02130010U (en) 1990-10-26

Family

ID=31548481

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3951089U Pending JPH02130010U (en) 1989-04-03 1989-04-03

Country Status (1)

Country Link
JP (1) JPH02130010U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020179250A1 (en) * 2019-03-01 2020-09-10 日立オートモティブシステムズ株式会社 Semiconductor integrated circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020179250A1 (en) * 2019-03-01 2020-09-10 日立オートモティブシステムズ株式会社 Semiconductor integrated circuit
JPWO2020179250A1 (en) * 2019-03-01 2021-10-14 日立Astemo株式会社 Semiconductor integrated circuit

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