JPH0212345A - Microcomputer - Google Patents

Microcomputer

Info

Publication number
JPH0212345A
JPH0212345A JP63164014A JP16401488A JPH0212345A JP H0212345 A JPH0212345 A JP H0212345A JP 63164014 A JP63164014 A JP 63164014A JP 16401488 A JP16401488 A JP 16401488A JP H0212345 A JPH0212345 A JP H0212345A
Authority
JP
Japan
Prior art keywords
watchdog timer
address
instruction
runaway
initialization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63164014A
Other languages
Japanese (ja)
Inventor
Osamu Itoku
井徳 修
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63164014A priority Critical patent/JPH0212345A/en
Publication of JPH0212345A publication Critical patent/JPH0212345A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To avoid a case where a watchdog timer is erroneously initialized during the runaway and this runaway cannot be detected by initializing the watchdog timer only with an initialization instruction for the watchdog timer set in a prescribed address. CONSTITUTION:A 1st control part 5 performs the initialization of a watchdog timer 2 only when an initialization instruction is carried out in a prescribed address. While a 2nd control part 8 produces a runaway detecting signal 10 when a prescribed instruction is carried out in an address other than the prescribed one. Therefore the timer 2 is never initialized even though an initialization instruction executing signal 7 is produced when an address signal 6 has the value other than the prescribed one. Thus it is possible to avoid such a case where the timer 2 is erroneously initialized and a microcomputer is unable to detect the runaway.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明考案は、マイクロコンピュータのプログラム暴走
を検出する方法に関し、特にウォッチドッグ・タイマを
用いた暴走検出を行うマイクロコンピュータに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for detecting program runaway in a microcomputer, and particularly to a microcomputer that detects runaway using a watchdog timer.

〔従来の技術〕[Conventional technology]

従来のウォッチドッグ・タイマを用いたマイクロコンピ
ュータの暴走検出方法とは、所定の期間以内にウォッチ
ドッグ・タイマのカウント値が初期化されずカウントし
続け、オーバーフローが発生してしまうとプログラムの
暴走と見なすというものである。
The conventional method for detecting a runaway in a microcomputer using a watchdog timer is that if the count value of the watchdog timer continues to count without being initialized within a predetermined period and an overflow occurs, the program will run out of control. It means looking at it.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述の従来マイクロコンピュータに用いられているウォ
ッチドッグ・タイマは、ある所定の命令(以後初期化命
令という)でのみカウント値が初期化される構成になっ
ているが、プログラムの暴走時に偶然初期化命令の命令
コードが発生してしまった場合には全く効果がない。例
えば、マイクロコンピュータの外部からのノイズによっ
てプログラム・カウンタの値が破壊されてしまった場合
には、2バイト命令の2バイト目の命令コードを1バイ
ト目として実行してしまうことがあり得る。
The watchdog timer used in conventional microcomputers mentioned above has a configuration in which the count value is initialized only by a certain predetermined instruction (hereinafter referred to as an initialization instruction), but it is possible for the watchdog timer to be initialized by accident when a program runs out of control. It has no effect at all if the instruction code of the instruction occurs. For example, if the value of the program counter is destroyed by noise from outside the microcomputer, the instruction code in the second byte of a 2-byte instruction may be executed as the first byte.

この場合以後のプログラムの実行動作が全くの暴走状態
となっても、偶然に2つの命令にまたがった命令フード
が初期化命令の命令コードとなってしまえば、ウォッチ
ドッグ・タイマが誤って初期化サレ、マイクロコンピュ
ータが暴走を検出できないという欠点がある。
In this case, even if the subsequent execution of the program becomes completely out of control, if the instruction code that spans two instructions accidentally becomes the instruction code of the initialization instruction, the watchdog timer will be initialized by mistake. However, the drawback is that the microcomputer cannot detect runaway behavior.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のマイクロコンピュータは、ウォッチドッグ・タ
イマと、該ウオッチド、グ・タイマのカウント値を初期
化する初期化命令を備え、所定のアドレスで前記初期化
命令が実行されたときのみ前記ウオッチド、グ・タイマ
の初期化を行う第1の制御部と、前記所定のアドレス以
外で所定の命令が実行されたとき暴走検出信号を発生す
る第2の制御部を備えている。
The microcomputer of the present invention includes a watchdog timer and an initialization instruction that initializes the count value of the watchdog timer, and only when the initialization instruction is executed at a predetermined address. - A first control section that initializes a timer and a second control section that generates a runaway detection signal when a predetermined instruction is executed at an address other than the predetermined address.

〔実施例〕〔Example〕

第1図は本発明の一実施例のブロック図である。 FIG. 1 is a block diagram of one embodiment of the present invention.

中央処理部1は、プログラムに基づいて演算処理を行っ
ている。ウォッチドッグ・タイマ2は所定の期間以内に
初期化信号3が入力されなければ、第1の暴走検出信号
4を中央処理部1に出力する。
The central processing unit 1 performs arithmetic processing based on a program. The watchdog timer 2 outputs a first runaway detection signal 4 to the central processing unit 1 if the initialization signal 3 is not input within a predetermined period.

第1の制御部5は現在実行中の命令のアドレス信号6が
所定の値に等しく、かつウォッチドッグ・タイマ2を初
期化する初期化命令実行信号7が入力されたときに、初
期化信号3をウォッチドッグ・タイマ2に出力する。一
方、第2の制御部8は、アドレス信号6が所定の値と異
なっており、かつ、所定命令実行信号9が入力されたと
き、第2の暴走検出信号10を中央処理部1に出力する
The first control unit 5 receives the initialization signal 3 when the address signal 6 of the instruction currently being executed is equal to a predetermined value and an initialization instruction execution signal 7 for initializing the watchdog timer 2 is input. is output to watchdog timer 2. On the other hand, the second control unit 8 outputs a second runaway detection signal 10 to the central processing unit 1 when the address signal 6 is different from the predetermined value and the predetermined command execution signal 9 is input. .

上記の構成により、アドレス信号6が所定の値のとき以
外に、初期化命令実行信号7が発生してもウォッチドッ
グ・タイマ2は初期化されないので、プログラムの暴走
時にウォッチドッグ・タイマ2が誤って初期化されるこ
とがない。ウォッチドッグ・タイマ2の初期化命令が所
定のアドレスに配置されており、正常に命令が実行され
たときのみ、ウオッチド、グ・タイマの初期化が可能で
ある。
With the above configuration, watchdog timer 2 is not initialized even if initialization instruction execution signal 7 is generated other than when address signal 6 is a predetermined value. It is never initialized. An initialization instruction for the watchdog timer 2 is placed at a predetermined address, and the watched timer can be initialized only when the instruction is normally executed.

そして、プログラムの暴走時に誤って所定のアドレス以
外で所定命令が実行されたときには即座に第2の暴走検
出信号10が発生するので、ウォッチドッグ・タイマ2
が第1の暴走検出信号4を発生するよりも早く暴走検出
をすることができる。ここでの所定命令とは所定アドレ
ス以外には配置してはならない命令であり、所定アドレ
ス以外で実行されたときはプログラムの暴走と見なして
いる。所定命令はウォッチドッグ・タイマの初期化命令
であっても良い。
When a predetermined instruction is mistakenly executed at an address other than the predetermined address when the program runs out of control, the second runaway detection signal 10 is generated immediately, so the watchdog timer 2
The runaway can be detected earlier than when the first runaway detection signal 4 is generated. The predetermined instruction here is an instruction that must not be placed at any other address than the predetermined address, and if it is executed at any other address than the predetermined address, it is considered to be a runaway program. The predetermined instruction may be a watchdog timer initialization instruction.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明のマイクロコンピュータでは
、所定のアドレスに配置されたウォッチドッグ・タイマ
の初期化命令以外ではウォッチドッグ・タイマが初期化
されないようにすることにより、暴走中に誤ってウォッ
チドッグ・タイマが初期化され暴走検出できないという
状態を回避することができるという効果がある。さらに
、プログラム暴走時に所定のアドレス以外で誤って所定
の命令が実行されたとき暴走検出信号を発生する機能を
加えることにより、より迅速な暴走検出をすることがで
きる効果がある。
As explained above, in the microcomputer of the present invention, by preventing the watchdog timer from being initialized except for the watchdog timer initialization instruction placed at a predetermined address,・This has the effect of avoiding a situation where the timer is initialized and runaway cannot be detected. Furthermore, by adding a function to generate a runaway detection signal when a predetermined command is mistakenly executed at an address other than a predetermined address during a program runaway, there is an effect that runaway can be detected more quickly.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のプロ、り図である。 1・・・・・・中央処理部、2・・団・ウォッチドッグ
・タイマ、3・・・・・・初期化信号、4・・・・・・
第1の暴走検出信号、5・・・・・・第1の制御部、6
・・・・・・アドレス信号、7・・・・・・初期化命令
実行信号、8・・印・第2の制御部、9・・・・・・所
定命令実行信号、1o・・・・・・第2の暴走検出信号
。 代理人 弁理士 内 原   晋
FIG. 1 is a schematic diagram of an embodiment of the present invention. 1...Central processing unit, 2...Group watchdog timer, 3...Initialization signal, 4...
First runaway detection signal, 5...First control unit, 6
... Address signal, 7 ... Initialization command execution signal, 8 ... Mark - second control section, 9 ... Predetermined command execution signal, 1o ... ...Second runaway detection signal. Agent Patent Attorney Susumu Uchihara

Claims (1)

【特許請求の範囲】[Claims] ウォッチドッグ・タイマと、該ウォッチドッグ・タイマ
のカウント値を初期化する初期化命令を備えたマイクロ
コンピュータにおいて、所定のアドレスで前記初期化命
令が実行されたときのみ前記ウォッチドッグ・タイマの
初期化を行う第1の制御部と、前記所定のアドレス以外
で所定の命令が実行されたとき暴走検出信号を発生する
第2の制御部を備えとことを特徴とするマイクロコンピ
ュータ。
In a microcomputer equipped with a watchdog timer and an initialization instruction that initializes the count value of the watchdog timer, the watchdog timer is initialized only when the initialization instruction is executed at a predetermined address. 1. A microcomputer comprising: a first control section that performs the above operations; and a second control section that generates a runaway detection signal when a predetermined instruction is executed at an address other than the predetermined address.
JP63164014A 1988-06-29 1988-06-29 Microcomputer Pending JPH0212345A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63164014A JPH0212345A (en) 1988-06-29 1988-06-29 Microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63164014A JPH0212345A (en) 1988-06-29 1988-06-29 Microcomputer

Publications (1)

Publication Number Publication Date
JPH0212345A true JPH0212345A (en) 1990-01-17

Family

ID=15785140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63164014A Pending JPH0212345A (en) 1988-06-29 1988-06-29 Microcomputer

Country Status (1)

Country Link
JP (1) JPH0212345A (en)

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