JPH02114313A - High speed external storage device - Google Patents

Abstract

PURPOSE:To attain high speed reading by means of an existing external storage device by dispersedly writing/reading out data in each data length of a minimum reading/writing unit of plural external storage devices included in an arithmetic unit. CONSTITUTION:A series of data are rapidly divided in each minimum data length to be read out/written by the external storage devices 21A to 21D through an address control means 22. The writing addresses of a main memory 12 are allocated to the data obtained by dispersedly writing or reading out the divided data in/from the devices 21A to 21D, rapidly sent and inputted to the prescribed addresses of the main memory 22 by an address control means 22. When N external storage devices are prepared, the external storage devices may writes and read out rapidly transmitted data at 1/N speed. Thereby, when N external storage devices having slow reading/writing speed are prepared, the data can be read out and written at the N times the reading/writing speed of each external storage device.

Description

DETAILED DESCRIPTION OF THE INVENTION "Industrial Application Field" The present invention relates to a high-speed external storage bag [K] that can be used in an arithmetic device that processes data at high speed, such as a Daisei Computer or an ID tester.

``Prior Art'' As the amount of data increases, arithmetic processing units such as computers that process this data, IC testers that test large-scale ICs, and the like are required to be faster.

Processing devices themselves have become considerably faster due to improvements in semiconductor integrated circuits, but external storage devices that exchange data with processing devices are only as fast as hard disks. Even though hard disks are high-speed, their continuous writing speed is much slower than the processing speed of an arithmetic processing unit composed of semiconductor circuits.

``Problem to be Solved by the Invention'' If one simply wants to speed up a storage device, this requirement can be met by using semiconductor memory.

However, considering the handling of large amounts of data, the storage capacity required for the external storage device is on the order of giga or tera. Currently, it is not economically acceptable to replace such a large-capacity external storage device with a semiconductor memory.

Currently, hard disk drives are the best option if they meet the requirements for storage capacity, cost, and reading/writing speed. In addition, optical discs are expected in the future, but reading,
There is not much difference in writing speed compared to a hard disk.

Due to this background, the cost per storage capacity is low,
Moreover, the emergence of an external storage device that can perform high-speed data storage and writing is awaited.

An object of the present invention is to provide an external storage device that is capable of high-speed reading and writing using existing external storage devices.

"Means for Solving the Problem" In the present invention, a plurality of external storage devices are provided for an arithmetic processing device such as a computer that is constituted by a central processing unit and a main memory that can read and write at high speed and is made of semiconductor memory. At the same time, each external storage device is configured to read and write data in a distributed manner with a minimum data length in units of read and write units of the external storage device.

According to the configuration of the present invention, a series of data that is continuous at high speed is divided by the address control means into [external storage device "m-, @ possible minimum data length, and the divided data is divided into multiple external storage devices The written and read data is given a write address in the main memory by the address control means and sent out at high speed. By dividing the data into the minimum data length that can be read and written, and distributing this divided data to each external storage device for writing and reading, if each external storage device is provided on the N side, the external storage The device only needs to write and read data transmitted at high speed at a speed of 1/N.

Therefore, if you use an external storage device with slow read and write speeds,
If each external storage device is provided, data can be read and written at N times the read and write speed of each external storage device.

"Embodiment" FIG. 1 shows an embodiment of the present invention. In the figure, numeral 10 indicates an arithmetic processing device such as a computer. As is well known, the arithmetic processing unit 10 is composed of a central processing unit 11 and a main memory 12 that can be read and written at high speed. are connected, and arithmetic processing is executed by exchanging data.

Reference numeral 20 indicates a high-speed external storage device constructed according to the present invention. The high-speed external storage device 20 according to the present invention includes a plurality of external storage devices such as hard disk drives [21A,
21B, 21C, 21D, and the plurality of external storage devices 2
a controller 22 that accesses each of the external storage devices 1A to 21D in minimum write/read units; 23 buffers connected between each of the external storage devices 21A to 21D and the data bus line 13;
23B.

23C and 23D.

The address controller 22 can be constituted by a microcombiner MP and address counters 22 to 22D provided corresponding to the respective external storage devices @21A to 21D.

The address controller 22 performs writing in each of the external storage devices 21 to 21D and manages the bladder address.

In other words, the address space on the side of the arithmetic processing unit 10 is used as an interface for constructing a plurality of external storage devices 21 to 21D.

Conventionally, the address space on the arithmetic processing unit 10 side was constructed using multiple external storage devices by successively inheriting the addresses of each external storage device. In this case, the access speed is determined by the access speed of each external storage device. Therefore, it is not possible to make the access speed faster than each external storage device. In other words, writing data to N external storage devices requires writing time for N external storage devices.

In contrast, in the present invention, each external storage device 21A to 21
This is an attempt to construct an address space on the arithmetic processing unit side by inheriting the addresses of D in parallel.

In other words, as shown in FIG.
Address: 21C 1st address is 3rd, 21D 1st address is 4th address, 21A 2nd address is 5th address, 21B 2nd address is 6th address.
5K address conversion is performed so that address 21C becomes address 7, address 21D becomes address 8, etc.

By converting addresses in this way, [the time for writing data into each of the external storage devices 921 to 21D and the time to output data from each of the external storage devices 21A to 21D (see Figure 2) Data can be written to and read from all external storage devices 21A to 21D for N units, that is, four units in this example.

The examples will be explained in more detail below. In this example,
This is a case where four external storage devices such as hard disks are provided. Therefore, the data transmission speed between the arithmetic processing unit 10 and the high-speed external storage device 20 is set to be four times faster than the conventional speed.

The controller 22 includes a microcomputer MP and 22 address counters, 22B and 22C.

Z2D is provided. These 22 address counters ~
22D is provided corresponding to each external storage device [21A to 21DK, and has an address (hereinafter referred to as an external address) of each external storage device [21A to 21D] and an address on the arithmetic processing unit side (hereinafter referred to as an external address). This address will be referred to as an internal address) and detects whether or not it has been accessed.

For example, if the arithmetic processing unit 10 writes to row 5, the arithmetic processing unit 10 adds the start address of the write data and sends it out.

This start address is converted into an external address by the address controller 22, the external storage device in which the external address exists is detected, and the address counter of the external storage device is set. The external storage device designated by the start address is accessed by its address counter. When the first address is accessed, the next address becomes the adjacent external storage device.

In other words, if the first address exists in the external storage device 21B, for example, the address of the next data will be in the external storage device 21C. When writing to the external storage device 21C is completed, the external storage device 21D is accessed and data is written to the external storage device 21D. - The data to be written in the number of accesses is selected in the smallest unit (for example, sector unit) that can be written and read from each external storage device 21 to 21D.

The time from when the external storage device 21B is accessed until the next external storage device 21C is accessed depends on each device [21
This corresponds to the time of each access time of A to 21D.

Therefore, the external storage devices 21B, 21C, and 21D.

When the external storage devices 21, 21B, . . . are accessed sequentially in the order of 21, 21B, .

The data to be written is stored in the buffer 23B in the order of addresses.
23C, 23D, 23A, 23B, . . . are fetched in this order and written to each external storage device 21A to 21D.

When a read command is issued from the arithmetic processing unit 10 to the high-speed external storage device 20, the read start address is converted into an external address by the address controller 22, and stored in the address counter of the external storage device where the external address exists. Ru. For example, address counter 2 of external storage device fi21A
When the start address (this is an external address) is stored in 2A, the specified address of the external storage device 21A is read out, and then the corresponding address of the external storage device 21B is read out, and the addresses 21C, 21D, 21A, 21B...
Data is read out to buffers 23 to 23D provided in each of the external storage devices 21A and 21D in this order.

The buffers 23 to 23D send out the stored data to the data bus line 13 each time each of the buffers 23 to 23D receives transmission permission. At this time,
The destination address (internal address) of the data is sent out from the address controller 22 and sent to a predetermined address in the main memory 12.

The transfer speed on the data bus line 13 is
This is more than four times the successive output speed of each of the buffers 21 to 21D, and the buffers 23 to 23D are all empty at the timing when each external storage device 21A to 21D reads the next data.

In addition, although the above-mentioned embodiment explained the case where four external storage devices were provided, it is not particularly possible to provide four VC@s. In addition, although the data transfer speed of the data bus line 13 and address line 14 has been explained as the write/read speed of each external storage device multiplied by the number of external storage devices, even if it is selected to be one or more times the number of external storage devices, idle time will only occur on the bus twin. There is no problem with data exchange.

Further, the external storage device is not limited to a hard disk, but other types such as a rewritable optical disk can also be used.

``Effects of the Invention'' As explained above, according to the present invention, assuming that a 5K storage device such as a hard disk in which writing and reading are performed by mechanical means is used as an external storage device, this storage device can be stored in N units. By providing K, the writing and reading speed can be increased by N times.

Therefore, it is possible to configure a high-speed external storage device using a storage device with a low cost per storage capacity, and there is an advantage that the speed of computers and ICC prototype devices can be improved.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is a diagram for explaining the invention in detail. lO: Arithmetic processing unit, 21 people to 21D: External storage device,
22 people ~ 22D = at, 2 counters, 22 near address controller, 23A ~ 23D = back 7 a.

Claims (1)

[Claims] (1) A plurality of external storage devices are provided for an arithmetic unit consisting of a central processing unit and a main memory capable of high-speed writing/reading, and the minimum reading/writing of this external storage device is performed on the plurality of external storage devices. A high-speed external storage device configured to write and read data in a distributed manner for each unit of data length.