JPH02111843U - - Google Patents
Info
- Publication number
- JPH02111843U JPH02111843U JP1989019347U JP1934789U JPH02111843U JP H02111843 U JPH02111843 U JP H02111843U JP 1989019347 U JP1989019347 U JP 1989019347U JP 1934789 U JP1934789 U JP 1934789U JP H02111843 U JPH02111843 U JP H02111843U
- Authority
- JP
- Japan
- Prior art keywords
- data
- recording
- playback
- cpu
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005236 sound signal Effects 0.000 claims 2
- 230000006870 function Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Bus Control (AREA)
Description
第１図は本考案の一実施例の構成図、第２図は
第１図の詳細を示す構成図、第３図は動作説明の
ための図、第４図は従来例の構成図、第５図は従
来例の動作説明のための図である。
２…録音再生用ＩＣ、３…ＣＰＵ、４…メモリ
、５…ＦＩＦＯメモリ。
Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a block diagram showing the details of Fig. 1, Fig. 3 is a diagram for explaining the operation, Fig. 4 is a block diagram of a conventional example, FIG. 5 is a diagram for explaining the operation of the conventional example. 2...IC for recording and playback, 3...CPU, 4...memory, 5...FIFO memory.
Claims (1)
ータに備えられるものであつて、 アナログ音声信号とデジタル音声信号相互間の
変換を行なう録音再生用ＩＣからのデータをＣＰ
Ｕを介して、あるいは、ＣＰＵを介することなく
メモリに転送し、該メモリからのデータを前記Ｃ
ＰＵを介して、あるいは、ＣＰＵを介することな
く前記録音再生用ＩＣに転送するためのデータ転
送回路において、 前記録音再生用ＩＣと前記ＣＰＵとの間に、前
記録音再生用ＩＣからのデータおよび前記録音再
生用ＩＣへのデータを一時的に蓄えて転送するＦ
ＩＦＯ（フアースト イン フアースト アウト
）メモリを設けたことを特徴とするデータ転送回
路。[Scope of Claim for Utility Model Registration] Data from a recording/playback IC that is provided in a computer equipped with a digital audio recording/playback function and that converts between an analog audio signal and a digital audio signal.
The data from the memory is transferred to the memory via the U or without going through the CPU.
In a data transfer circuit for transferring data to the recording/playback IC through a PU or without going through a CPU, the data from the recording/playback IC and the data are transferred between the recording/playback IC and the CPU. F that temporarily stores and transfers data to the recording/playback IC
A data transfer circuit characterized by having an IFO (first-in first-out) memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989019347U JPH02111843U (en) | 1989-02-20 | 1989-02-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989019347U JPH02111843U (en) | 1989-02-20 | 1989-02-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02111843U true JPH02111843U (en) | 1990-09-06 |
Family
ID=31234776
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989019347U Pending JPH02111843U (en) | 1989-02-20 | 1989-02-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02111843U (en) |
-
1989
- 1989-02-20 JP JP1989019347U patent/JPH02111843U/ja active Pending
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