JPH0195681A - Time base correcting circuit for video disk player - Google Patents

Time base correcting circuit for video disk player

Info

Publication number
JPH0195681A
JPH0195681A JP62253996A JP25399687A JPH0195681A JP H0195681 A JPH0195681 A JP H0195681A JP 62253996 A JP62253996 A JP 62253996A JP 25399687 A JP25399687 A JP 25399687A JP H0195681 A JPH0195681 A JP H0195681A
Authority
JP
Japan
Prior art keywords
signal
regenerative
circuit
horizontal synchronization
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62253996A
Other languages
Japanese (ja)
Inventor
Yoshihiko Morita
芳彦 森田
Takeo Toyama
外山 建夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP62253996A priority Critical patent/JPH0195681A/en
Publication of JPH0195681A publication Critical patent/JPH0195681A/en
Pending legal-status Critical Current

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  • Television Signal Processing For Recording (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

PURPOSE:To correct the time base of a regenerative MUSE signal even when the S/N of a regenerative pilot signal is deteriorated by correcting the time based on the phase fluctuation of the regenerative pilot signal and the phase fluctuation of the regenerative horizontal synchronization signal. CONSTITUTION:A synchronization phase error detecting signal, which is a D/A conversion output, is removed from a band area compression decoder, inputted into a video disk player, and supplied through a switch 19 to an adder circuit 17. The switch 19 is closed by the generation of the synchronization detecting signal derived from a frame synchronizing detector circuit 27. Consequently, when a horizontal synchronization pulse is correctly derived on a band area compression decoder side, the synchronization phase error detecting signal is inputted to the adder circuit, and based on each phase error between the regenerative pilot signal and the horizontal synchronization signal, a jitter is corrected. Thus, even when the S/N of the pilot signal is deteriorated, the time basis correction of the regenerative band area compression video signal (the regenerative MUSE signal) is attained.

Description

【発明の詳細な説明】 イ) 産業上の利用分野 本発明は、高品位映像信号を再生するビデオディスクプ
レーヤの時間軸補正回路の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to an improvement in a time axis correction circuit for a video disc player that reproduces high-quality video signals.

(ロ)従来の技術  、 高品位映像信号を多重サブナイキストサンプリングエン
コード方式を用いて帯域圧縮して成る帯域圧縮映像信号
(MUSID信号)は、正極性の水平同期信号を形成し
ており、アナログ状態での同期分離は容易でない。
(B) Prior art A band compressed video signal (MUSID signal) obtained by band compressing a high-quality video signal using a multiplex sub-Nyquist sampling encoding method forms a horizontal synchronizing signal of positive polarity, and is in an analog state. Synchronous separation is not easy.

そこで、特開昭61−191589号公報(H04N9
/81)では、MUSE信号をビデオディスクレコード
に記録する場合に、FM変調したMUSE信号に定周波
のパイロット信号を周波数多重記録し、再生時に再生パ
イロット信号の位相変動を検出してビデオディスクレコ
ードの時間軸補正を為している。
Therefore, Japanese Patent Application Laid-Open No. 1989-191589 (H04N9
/81), when recording a MUSE signal on a video disc record, a constant frequency pilot signal is frequency multiplexed onto the FM modulated MUSE signal, and the phase fluctuation of the reproduced pilot signal is detected during playback to record the video disc record. Time axis correction has been made.

Vl  発明が解決しようとする問題点しかし、上述す
る従来技術の場合、多重するパイロット信号レベルは、
再生出力にビートを生じない様にFM−MUSE信号に
対して20dB以下に設定されている。よって、再生パ
イロット信ディスクプレーヤに接続される帯域圧縮デコ
ーダが水平同期信号を検出していることに着目して、再
生水平同期信号に基づいて再生MUSE信号の時間軸補
正を為すものである。
Vl Problem to be Solved by the Invention However, in the case of the above-mentioned prior art, the pilot signal level to be multiplexed is
It is set to 20 dB or less with respect to the FM-MUSE signal so as not to cause beats in the reproduced output. Therefore, focusing on the fact that the band compression decoder connected to the reproduction pilot signal disc player detects the horizontal synchronization signal, the time axis correction of the reproduction MUSE signal is performed based on the reproduction horizontal synchronization signal.

に)問題点を解決するための手段 そこで、本発明は再生パイロット信号の位相変動を検出
する第1位相比較手段と、帯域圧縮デコーダより得られ
る再生水平同期信号の位相変動を検出する第2位相比較
手段と、両位相比較手段の出力に基づいて時間軸補正を
為すジッタ補正回路とを配することを特徴とする。
B) Means for Solving the Problems Therefore, the present invention provides a first phase comparison means for detecting phase fluctuations of a reproduced pilot signal, and a second phase comparison means for detecting phase fluctuations of a reproduced horizontal synchronization signal obtained from a band compression decoder. The present invention is characterized in that it includes a comparison means and a jitter correction circuit that performs time axis correction based on the outputs of both phase comparison means.

(ホ)作 用 よって、本発明によれば、再生パイロット信号の位相変
動と再生水平同期信号の位相変動に基づいて時間軸補正
が為される。
(e) Operation According to the present invention, time axis correction is performed based on the phase fluctuation of the reproduced pilot signal and the phase fluctuation of the reproduced horizontal synchronization signal.

(へ)実施例 以下、本発明を図示せる一実施例に従い説明する。(f) Example Hereinafter, the present invention will be explained according to an illustrative embodiment.

まず、第1図は本実施例のビデオディスクプレーヤの回
路ブロック図を示す。この図より明らかな様に、ディス
クレコード(1)を光学的に再生するピックアップ(3
)の出力は、イコライザ(4)を介してバイパスフィル
タ(5) K入力され、再生FM帯域圧縮映像信号が分
離導出される。このバイパス出力は、FM復調回路(6
)にてFM復調された後、ローパスフィルタ(7)を介
してデイエンファシスDO路(8)に入力され、ビデオ
ディスクプレーヤの出力として導出される。
First, FIG. 1 shows a circuit block diagram of the video disc player of this embodiment. As is clear from this figure, the pickup (3) that optically plays back the disc record (1)
) is input to a bypass filter (5) K via an equalizer (4), where a reproduced FM band compressed video signal is separated and derived. This bypass output is connected to the FM demodulation circuit (6
), the signal is input to a de-emphasis DO path (8) via a low-pass filter (7), and is output as the output of the video disc player.

一方、ピックアップ出□力を入力するローパスフィルタ
(9)Fi、再生パイロット信号成分を分離導出してお
り、更に後段のパイロット検出回路Q□に於いて再生バ
イロフト信号は波形整形される。波形成形された再生パ
イロット信号は、ディスクサーボ回路を構成するPLL
回路面と時間軸補正回路を構成する第1位相比較回路Q
[それぞれ入力される。ディスクサーボ回路FiPLL
出力を分周回路■にて分周す石ことにより分周出力を周
波数比較回路α滲の比較入力とすると共に、固定の基醜
信力とすることにより、周波数比較出啓形成している。
On the other hand, a low-pass filter (9) Fi inputting the pickup output □ separates and derives the reproduced pilot signal component, and the reproduced biloft signal is further waveform-shaped in the subsequent pilot detection circuit Q□. The waveform-shaped reproduced pilot signal is sent to the PLL that constitutes the disk servo circuit.
The first phase comparator circuit Q that constitutes the circuit plane and the time axis correction circuit
[Each is input. Disk servo circuit FiPLL
By dividing the output in the frequency dividing circuit (2), the frequency divided output is used as a comparison input of the frequency comparison circuit (α), and by using a fixed base value, a frequency comparison result is formed.

この周波数比較出力は、モータドライバー回路叩に入力
されて、ディスクモータ(2)の回転11i1Jaが為
される。
This frequency comparison output is input to the motor driver circuit to rotate the disk motor (2) 11i1Ja.

また、第1位相比較回路員は、基準信号発生回路03)
の出力を基準入力とし、波形成形された再生パイロット
信号を比較入力として、第1位相比較出力を形成してい
る。この第1位相比較出力は加算回路(14)を経てジ
ッタミラードライバα0に入力され、ピックアップ(3
)内のジッタ補正ミラーを駆動し時間軸補正を為してい
る。前述する構成は、ビデオディスクプレーヤとして周
知の構成である。
In addition, the first phase comparison circuit member is the reference signal generation circuit 03)
A first phase comparison output is formed by using the output of the reference input as a reference input and using the waveform-shaped regenerated pilot signal as a comparison input. This first phase comparison output is input to the jitter mirror driver α0 via the adder circuit (14), and is input to the pickup (3).
) is driven to perform time axis correction. The configuration described above is a well-known configuration for a video disc player.

上述するビデオディスクプレーヤより導出される再生帯
域圧縮映像信号は、第2図に図示せる帯域圧縮デコーダ
に入力される。この帯域圧縮デコーダは、まず帯域圧縮
映像信号をAD変変換回路圧入力してAD変換を為して
おり、AD変換データは、4フイ一ルド分のAD変換デ
ータを記憶すふフレームメモリ(社)に入力される。静
止画処理回路(2)Fi、フレームメモリ0の続出デー
タとAD変換データにより静止画データを形成し、動画
処理回路Q2はAD変換データより動画データを形成し
ている。混合回路(241II′i画面の動きに応じて
動画データと静止画データの混合比を変更し乍ら混合デ
ータを形成する。混合データを入力するTOエデコード
回路Wt−t、色成分と輝度成分を同時化して導出して
おり、次段のDA変換回路■でそれぞれアナログ化され
ることにより、元の面品位映像信号に変換される。
The playback band compression video signal derived from the video disk player mentioned above is input to the band compression decoder shown in FIG. This band compression decoder first inputs the band compression video signal into the AD conversion circuit and performs AD conversion. ) is entered. The still image processing circuit (2) Fi forms still image data using the successive data of frame memory 0 and AD conversion data, and the moving image processing circuit Q2 forms moving image data from the AD conversion data. Mixing circuit (241II'i) Changes the mixing ratio of moving image data and still image data according to the movement of the screen and forms mixed data.TO decoding circuit Wt-t that inputs the mixed data, color component and luminance component The signals are derived simultaneously and converted into analog signals in the next-stage DA conversion circuit (2), thereby converting them into the original surface quality video signals.

一方ADi換データは、フレーム同期検出回路面と水平
同期検出回路(支)にも入力される。水平同期検出回路
@は、フレーム同期検出出力に基づいて各水平同期タイ
ミングに対応する水平同期パルスを形成導出しており、
この水平同期パルスは第2位相比較回路器の基準入力と
して供給される。またこの第2位相比較回路i#−tP
LL回路の一部を構成しており、分周回路(至)の分局
出力を比較入力トシてフィードバックしている。更に第
2位相比較回路囚は水平同期パルスと分局出力の位相差
をディジタル的に計数導出しており、次段のラッチ回路
■けその計数出力をラッチしている。ラッチデータはD
A変換された後電圧制御型発振回路Qの発振周波数をコ
ントロールしている。尚、この発振出力は、前述するデ
ィジタル信号処理のためのタイミングクロックとして利
用される。
On the other hand, the ADi conversion data is also input to the frame synchronization detection circuit and the horizontal synchronization detection circuit (support). The horizontal synchronization detection circuit @ forms and derives horizontal synchronization pulses corresponding to each horizontal synchronization timing based on the frame synchronization detection output,
This horizontal synchronization pulse is supplied as a reference input to the second phase comparison circuit. Also, this second phase comparator circuit i#-tP
It constitutes a part of the LL circuit, and the divided output of the frequency divider circuit (to) is input for comparison and fed back. Further, the second phase comparator circuit digitally counts and derives the phase difference between the horizontal synchronizing pulse and the branch output, and latches the count output of the next stage latch circuit. Latch data is D
After A conversion, the oscillation frequency of the voltage controlled oscillation circuit Q is controlled. Note that this oscillation output is used as a timing clock for the digital signal processing described above.

上述する構成に於いて、本実施例の特徴とする点は以下
の点にある。即ち、本実施例では、DA変換出力である
同期位相誤差検出信号を帯域圧縮デコーダより取り出し
、ビデオディスクプレーヤ内に入力し、スイッチa9を
介して加算回路ロクに供給する点にあり、前記スイッチ
α9け、フレーム同期検出回路−より導出される同期検
出信号の発生によって閉路される。
In the configuration described above, the features of this embodiment are as follows. That is, in this embodiment, the synchronous phase error detection signal, which is the DA conversion output, is extracted from the band compression decoder, inputted into the video disc player, and supplied to the adder circuit Roku via the switch a9. The circuit is closed by the generation of a synchronization detection signal derived from the frame synchronization detection circuit.

従って、本実施例によれば帯域圧縮デコーダ側で正しく
水平同期パルスが導出されると、同期位相誤差検出信号
が加算回路に入力され、再生パイロット信号と水平同期
信号の各位相誤差に基づいてジッタ、補正が為される。
Therefore, according to this embodiment, when the horizontal synchronization pulse is correctly derived on the band compression decoder side, the synchronization phase error detection signal is input to the adder circuit, and the jitter is calculated based on each phase error between the reproduced pilot signal and the horizontal synchronization signal. , a correction is made.

(ト)  発明の効果 よって、本発明によれば、パイロット信号のSNが劣化
しても水平同期信号による時間軸補正が可能になり、そ
の効果は大である。
(G) Effects of the Invention According to the present invention, even if the SN of the pilot signal deteriorates, time axis correction using the horizontal synchronization signal is possible, and the effect is significant.

4、Fl!J面の間車な説明 図は何れも本発明の一実施例を示し、第1図はビデオデ
ィスクプレーヤの回路ブロック図、第2図は帯域圧縮デ
コーダの回路ブロック図を、それぞれ顕わす。
4. Fl! The explanatory diagrams on page J each show one embodiment of the present invention, with FIG. 1 showing a circuit block diagram of a video disc player, and FIG. 2 showing a circuit block diagram of a band compression decoder.

α■・・・第1位相比較回路、■・・・第2位相比較回
路。
α■...First phase comparison circuit, ■...Second phase comparison circuit.

Claims (1)

【特許請求の範囲】[Claims] (1)高品位映像信号を多重サブナイキストサンプリン
グエンコード方式を用いて帯域圧縮して成る帯域圧縮映
像信号をFM変調し、定周波の再生パイロット信号を周
波数多重記録して成るビデオディスクレコードを再生す
るビデオディスクプレーヤと、該ビデオディスクプレー
ヤの再生出力を入力して高品位映像信号を再形成する帯
域圧縮デコーダとを配して成る高品位映像再生システム
に於て、 再生パイロット信号の位相変動を検出する第1位相比較
手段と、 前記帯域圧縮デコーダ内の水平同期分離回路より得られ
る水平同期信号の位相変動を検出する第2位相比較手段
と、 前記第1位相比較手段の出力と、前記第2位相比較手段
の出力に基づいて再生信号の時間軸補正を為すジッタ補
正手段とを、 それぞれ配して成るビデオディスクプレーヤの時間軸補
正回路。
(1) FM-modulate a band-compressed video signal obtained by band-compressing a high-quality video signal using a multiplex sub-Nyquist sampling encoding method, and play a video disc record by frequency-multiplexing recording of a fixed-frequency playback pilot signal. In a high-definition video playback system that includes a video disc player and a band compression decoder that inputs the playback output of the video disc player and regenerates a high-definition video signal, detecting phase fluctuations in a playback pilot signal. a first phase comparison means for detecting a phase fluctuation of a horizontal synchronization signal obtained from a horizontal synchronization separation circuit in the band compression decoder; A time axis correction circuit for a video disc player, comprising: jitter correction means for correcting the time axis of a reproduced signal based on the output of the phase comparison means.
JP62253996A 1987-10-08 1987-10-08 Time base correcting circuit for video disk player Pending JPH0195681A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62253996A JPH0195681A (en) 1987-10-08 1987-10-08 Time base correcting circuit for video disk player

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62253996A JPH0195681A (en) 1987-10-08 1987-10-08 Time base correcting circuit for video disk player

Publications (1)

Publication Number Publication Date
JPH0195681A true JPH0195681A (en) 1989-04-13

Family

ID=17258813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62253996A Pending JPH0195681A (en) 1987-10-08 1987-10-08 Time base correcting circuit for video disk player

Country Status (1)

Country Link
JP (1) JPH0195681A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59146280A (en) * 1983-02-09 1984-08-22 Pioneer Electronic Corp Synchronizing control system in recording information reproducing device
JPS60191589A (en) * 1984-03-12 1985-09-30 Sanyo Electric Co Ltd Video disc record
JPS6171425A (en) * 1984-09-14 1986-04-12 Pioneer Electronic Corp Recording disc information reproducing device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59146280A (en) * 1983-02-09 1984-08-22 Pioneer Electronic Corp Synchronizing control system in recording information reproducing device
JPS60191589A (en) * 1984-03-12 1985-09-30 Sanyo Electric Co Ltd Video disc record
JPS6171425A (en) * 1984-09-14 1986-04-12 Pioneer Electronic Corp Recording disc information reproducing device

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