JPH0194952U

JPH0194952U -

Info

Publication number: JPH0194952U
Application number: JP18943287U
Authority: JP
Priority date: 1987-12-15
Filing date: 1987-12-15
Publication date: 1989-06-22

Description

[Brief explanation of the drawing]

第１図〜第５図は、本考案の一実施例における
複写機について示したものであり、このうち第１
図は本考案の一実施例における複写機の回路構成
を示したブロツク図、第２図は、第１図で示した
電流リミツト信号の電流リミツト値とその目標速
度値との関係を示した関係図、第３図は、第１図
で示した駆動装置に設けられたモータドライバの
回路構成を詳細に示したブロツク図、第４図は、
本考案の一実施例における複写機を用いた場合の
キヤリツジの速度とその助走時間との関係を示し
た特性図、第５図は、本考案の一実施例における
複写機を用いた場合のキヤリツジの露光走査時お
よび復帰時のそれぞれの動作手順を示した流れ図
、第６図は、代表的な複写機の概略的な構成を示
した概略構成図、第７図〜第９図は、従来の複写
機について示したものであり、このうち、第７図
は特開昭６２―１５３７４号公報に開示された速
度制御装置の回路構成を示したブロツク図、第８
図は、第７図で示したモータドライバの回路構成
を詳細に示したブロツク図、第９図は、従来の速
度制御装置を用いた場合のキヤリツジの速度とそ
の助走時間との関係を示した特性図。２１……キヤリツジ、２２……モータ（キヤリ
ツジモータ）、２３……エンコーダ（パルス信号
出力手段）、２６……キヤプチヤレジスタ（演算
手段）、２７……ＣＰＵ（演算手段、目標周期パ
ルス作成手段、電流値設定手段）、２８……１６
ビツトカウンタ（演算手段）、３３……コンパレ
ータ（演算手段）、３６……カウンタ（演算手段
）、４９……モータ駆動回路、６５……電流制限
回路（モータ供給電流制限手段）。 Figures 1 to 5 show a copying machine according to an embodiment of the present invention.
The figure is a block diagram showing the circuit configuration of a copying machine according to an embodiment of the present invention, and FIG. 2 is a diagram showing the relationship between the current limit value of the current limit signal shown in FIG. 1 and its target speed value. 3 is a block diagram showing in detail the circuit configuration of the motor driver provided in the drive device shown in FIG. 1, and FIG.
FIG. 5 is a characteristic diagram showing the relationship between the carriage speed and its run-up time when a copying machine according to an embodiment of the present invention is used. FIG. 6 is a schematic configuration diagram showing the general configuration of a typical copying machine, and FIGS. 7 to 9 are flow charts showing the operating procedures during exposure scanning and recovery. 7 is a block diagram showing the circuit configuration of a speed control device disclosed in Japanese Patent Application Laid-Open No. 15374/1983, and FIG.
The figure is a block diagram showing in detail the circuit configuration of the motor driver shown in Fig. 7, and Fig. 9 shows the relationship between the carriage speed and its run-up time when a conventional speed control device is used. Characteristic diagram. 21...Carriage, 22...Motor (carriage motor), 23...Encoder (pulse signal output means), 26...Capture register (calculation means), 27...CPU (calculation means, target period pulse generation means, current value setting means), 28...16
Bit counter (calculating means), 33... Comparator (calculating means), 36... Counter (calculating means), 49... Motor drive circuit, 65... Current limiting circuit (motor supply current limiting means).

Claims

[Scope of Claim for Utility Model Registration] A platen glass on which an original is placed, a carriage reciprocably disposed directly below the platen glass, and a photoreceptor to which the original is exposed to a light image through the carriage. and pulse signal output means for outputting a pulse signal with a frequency proportional to the moving speed of the carriage; and an error between the period of the pulse signal while the carriage is moving and a target period corresponding to a preset target speed. and an output pulse that generates a pulse width modulated signal that determines the rate of power to be supplied to match the target period according to the calculation results of the calculation means. a carriage motor for reciprocating the carriage; a motor drive circuit for driving the carriage motor by supplying a voltage based on the pulse width of the pulse; and a carriage motor for driving the carriage in accordance with a target speed of the carriage. and a motor supply current control means that limits the current supplied to the carriage motor at the start of scanning of the carriage so that it does not exceed the current limit value. Copy machine.