JPH0194467A - マルチプロセッサシステムにおけるクロック同期方式 - Google Patents

マルチプロセッサシステムにおけるクロック同期方式

Info

Publication number
JPH0194467A
JPH0194467A JP62252787A JP25278787A JPH0194467A JP H0194467 A JPH0194467 A JP H0194467A JP 62252787 A JP62252787 A JP 62252787A JP 25278787 A JP25278787 A JP 25278787A JP H0194467 A JPH0194467 A JP H0194467A
Authority
JP
Japan
Prior art keywords
time
processors
processor
clock
control block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62252787A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0528865B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Shoichiro Nakai
正一郎 中井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62252787A priority Critical patent/JPH0194467A/ja
Priority to US07/253,478 priority patent/US5041966A/en
Publication of JPH0194467A publication Critical patent/JPH0194467A/ja
Publication of JPH0528865B2 publication Critical patent/JPH0528865B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP62252787A 1987-10-06 1987-10-06 マルチプロセッサシステムにおけるクロック同期方式 Granted JPH0194467A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62252787A JPH0194467A (ja) 1987-10-06 1987-10-06 マルチプロセッサシステムにおけるクロック同期方式
US07/253,478 US5041966A (en) 1987-10-06 1988-10-05 Partially distributed method for clock synchronization

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62252787A JPH0194467A (ja) 1987-10-06 1987-10-06 マルチプロセッサシステムにおけるクロック同期方式

Publications (2)

Publication Number Publication Date
JPH0194467A true JPH0194467A (ja) 1989-04-13
JPH0528865B2 JPH0528865B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-04-27

Family

ID=17242257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62252787A Granted JPH0194467A (ja) 1987-10-06 1987-10-06 マルチプロセッサシステムにおけるクロック同期方式

Country Status (1)

Country Link
JP (1) JPH0194467A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Also Published As

Publication number Publication date
JPH0528865B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-04-27

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