JPH0193117A - Manufacture of film - Google Patents

Manufacture of film

Info

Publication number
JPH0193117A
JPH0193117A JP24972287A JP24972287A JPH0193117A JP H0193117 A JPH0193117 A JP H0193117A JP 24972287 A JP24972287 A JP 24972287A JP 24972287 A JP24972287 A JP 24972287A JP H0193117 A JPH0193117 A JP H0193117A
Authority
JP
Japan
Prior art keywords
film
stress
films
layer
tungsten film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24972287A
Other languages
Japanese (ja)
Other versions
JPH061768B2 (en
Inventor
Fujio Asakura
朝倉 藤雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62249722A priority Critical patent/JPH061768B2/en
Publication of JPH0193117A publication Critical patent/JPH0193117A/en
Publication of JPH061768B2 publication Critical patent/JPH061768B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the peeling off of a film as well as to reduce the deterioration in characteristics of a device caused by film stress by a method wherein a plurality of films having different degrees of stress, formed under the condition wherein the change of stress caused by the variation in condition of formation of films is small, are laminated. CONSTITUTION:A two-layer tungsten film of desired thickness is formed on a silicon substrate of low stress. The first layer tungsten film 7 of 400Angstrom is formed on the silicon substrate 6 at Ar gas pressure of 8mTorr, for example. Subsequently, the second tungsten film 8 of 1200Angstrom is formed on the above- mentioned tungsten film 7 using Ar gas pressure of 30mTorr in this case. As a result, the average stress S of the laminated film becomes S={(-1.2)X(400X10<-8>)+0.4X(1200X10<-8>)}/(400X10<-8>+1200X10<-8>)=0dy n/cm<2>. Accordingly, when the ratio of thickness of the films 7 and 8 is 1:3, the condition of average stress of 0 can be obtained. As a result, the peeling off of films can be prevented.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体基板上への膜の形成方法に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of forming a film on a semiconductor substrate.

〔従来技術とその問題点) 半導体デバイス製造工程の一環としての成膜工程におい
ては、膜の剥離防止のため、およびデバイス特性向上の
ため、制御された応力を有する膜の作成が必要である。
[Prior art and its problems] In a film forming process as part of a semiconductor device manufacturing process, it is necessary to create a film with controlled stress in order to prevent film peeling and to improve device characteristics.

近年MO3)ランジスタなどの半導体デバイスの微細化
に伴う配線抵抗の増大防止対策のため、配線膜厚および
ゲート電極膜厚は増加する傾向にある。そのため上述の
膜応力増大の効果は顕著になりつつあり、膜応力制御の
要請はますます高まってきている。従来のスパッタ、C
VD、蒸着等の個々の単層膜作成方法においては、所望
の膜応力を有する膜が形成できる条件を捜す必要があっ
た。しかし、所望する応力を得る膜作成条件の制御性は
一般に悪く、特に要求頻度の高い応力ゼロ条件付近では
経験上相当悪いことがわかっている。これが膜剥離およ
び応力に起因するデバイス特性劣化につながっていた。
In recent years, as semiconductor devices such as MO3) transistors have been miniaturized, the thickness of interconnects and gate electrodes have tended to increase in order to prevent increases in interconnect resistance. Therefore, the above-mentioned effect of increasing film stress is becoming more noticeable, and the demand for film stress control is increasing. Conventional sputter, C
In individual single-layer film forming methods such as VD and vapor deposition, it is necessary to find conditions under which a film having a desired film stress can be formed. However, it has been found from experience that controllability of film forming conditions to obtain the desired stress is generally poor, and is particularly poor near zero stress conditions, which are frequently requested. This led to deterioration of device characteristics due to film peeling and stress.

本発明の目的は、従来の成膜方法のかかる欠点を克服し
、制御された応力を有する膜の製造方法を提供すること
にある。
It is an object of the present invention to overcome these drawbacks of conventional film deposition methods and to provide a method for producing films with controlled stress.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の膜の製造方法は、膜の形成条件の変化による応
力の変化の小さい条件で形成された複数の異なる応力を
有する膜を積層することを特徴としている。
The film manufacturing method of the present invention is characterized by laminating a plurality of films having different stresses, which are formed under conditions in which changes in stress due to changes in film formation conditions are small.

〔作用〕[Effect]

本発明の膜の製造方法の作用を明確化するために、まず
、従来の成膜方法の典型的な一例を説明する。第2図は
基板5上に1種類の膜である第1層膜1を希望の厚さま
で形成したところである。
In order to clarify the operation of the film manufacturing method of the present invention, a typical example of a conventional film forming method will first be described. FIG. 2 shows a state in which a first layer film 1, which is one type of film, has been formed on a substrate 5 to a desired thickness.

第3図は成膜条件のあるパラメータに対する応力特性を
示す図である。縦軸は内部応力Sを、横軸は成膜条件C
を示している。例えば希望の応力が80のとき、成膜条
件パラメータCの値はC0と設定すべきであるが、設定
誤差を±ΔCと見込み、C0−ΔC< C< Co +
ΔCと考えるべきである。−したがって応力は、 C=Co          C= C6と考えるべき
であり、応力の誤差は、 C=C。
FIG. 3 is a diagram showing stress characteristics with respect to certain parameters of film forming conditions. The vertical axis is the internal stress S, and the horizontal axis is the film forming condition C.
It shows. For example, when the desired stress is 80, the value of the film forming condition parameter C should be set to C0, but the setting error is expected to be ±ΔC, and C0-ΔC<C< Co +
It should be considered as ΔC. -The stress should therefore be considered as C=Co C=C6 and the error in stress is C=C.

と考えられる 次に、第1図のように基板5上に異なる応力を有する膜
を、第1層から第1Mまで形成した場合を考える。図中
、1は第1層膜、2は第2層膜、3は第3層膜、・・・
、4は第nl膜をそれぞれ示している。このような多層
膜の第kJi膜の応力をSK%膜厚をxKとする。単層
膜の膜厚誤差Δx0と、多層膜の膜厚誤差の合計ΣΔx
Kとは同に 程度であり、ΔSK(ΔS0が成り立つCKを選ぶこと
によって、多層膜の平均応力の誤差は、単層膜のそれに
比べて、顕著に改善される。
Next, consider the case where films having different stresses are formed on the substrate 5 from the first layer to the first layer M as shown in FIG. In the figure, 1 is the first layer film, 2 is the second layer film, 3 is the third layer film, etc.
, 4 indicate the nl-th film, respectively. Let the stress of the kth Ji film of such a multilayer film be SK% and the film thickness be xK. The sum of the film thickness error Δx0 of the single layer film and the film thickness error of the multilayer film ΣΔx
By selecting CK for which ΔSK (ΔS0 holds true), the error in the average stress of a multilayer film is significantly improved compared to that of a single layer film.

(実施例〕 以下、本発明の典型的な実施例として、2層のタングス
テン膜を平均として低応力で所望の膜厚の膜をシリコン
基板上に形成する方法を説明する。
(Example) Hereinafter, as a typical example of the present invention, a method of forming a film of a desired thickness on a silicon substrate with low stress on the average of two tungsten films will be described.

所望の平均応力は0±0.05 X 10” dyn/
cm” 、膜厚は1600人とする。
The desired average stress is 0±0.05 X 10” dyn/
cm” and the film thickness is 1600 people.

成膜条件は、装置真空室内のアルゴンガス圧を用いて制
御する。RFパワーは3kW、成膜温度は室温、基板バ
イアスはOvとする。第4図に、スパッタ装置でタング
ステンを蒸着させるときの膜応力のアルゴンガス圧依存
性を示す。第4図のようにArガス圧5 mTorrか
らlQmTorrまでの広範囲のガス圧にわたって、応
力はほぼ一定値−1,2X 10”dyn/cm”を保
っており、制御性は良好である。また18mTorrか
ら40mTorrまでの範囲でも同様に制御性が良く、
応力はほぼ0.4 X 10”dyn/cm”と一定値
を保っている。
The film forming conditions are controlled using the argon gas pressure in the vacuum chamber of the apparatus. The RF power is 3 kW, the film forming temperature is room temperature, and the substrate bias is Ov. FIG. 4 shows the dependence of film stress on argon gas pressure when tungsten is deposited using a sputtering device. As shown in FIG. 4, over a wide range of gas pressures from Ar gas pressure of 5 mTorr to 1QmTorr, the stress maintains a substantially constant value of -1.2X 10"dyn/cm", and controllability is good. Also, controllability is similarly good in the range from 18mTorr to 40mTorr,
The stress remains constant at approximately 0.4 x 10"dyn/cm".

まず、第5図(a)に示すように、シリコン基板6上に
第1層タングステン膜7を、Arガス圧8 mTorr
で400人形成する。続いて、第5図(b)に示すよう
に、第1層タングステン膜7上に第2層タングステン膜
8をArガス圧30mTorrで1200人形成する。
First, as shown in FIG. 5(a), a first layer tungsten film 7 is deposited on a silicon substrate 6 under an Ar gas pressure of 8 mTorr.
400 people will be formed. Subsequently, as shown in FIG. 5(b), a second layer tungsten film 8 is formed on the first layer tungsten film 7 by 1200 people at an Ar gas pressure of 30 mTorr.

積層膜の平均応力Sは、次式によって計算できる。The average stress S of the laminated film can be calculated using the following formula.

”A= ((−1,2) x (400xlO−’) 
+0.4x (1200xlO−”) ) / (40
0x10−’+1200xlO−”)= Odyn/c
m2 以上のように、第1層膜7および第2層膜8の厚さの比
を1:3とすることによって、平均応力0の条件を得る
ことができる。
”A= ((-1,2) x (400xlO-')
+0.4x (1200xlO-”) / (40
0x10-'+1200xlO-") = Odyn/c
m2 As described above, by setting the ratio of the thicknesses of the first layer film 7 and the second layer film 8 to 1:3, the condition of zero average stress can be obtained.

次に平均応力の制御性を評価するために、上述の場合と
、単層膜を応力0dyn/Cm” 、膜圧1600人で
形成した場合とを比較してみる。Arガス圧の制御性は
±2 mTorr程度であるので、第4図より、6 m
TorrからlQmTorrまで、および18mTor
rから4層mTorrまでは、応力はほぼ一定値を保持
し、応力ばらつきは無視できるほど小さい。また26m
Torrの条件では、平均応力は0dyn/cm” 、
そのときの応力ばらつきが±0.25 X 10” d
yn/cm”であることがわかる。従って単層膜の応力
ばらつきは±0.25XIO′0dyn/cm2である
。膜厚ばらつきは一般に±5%程度であるので、本発明
を用いることによって二層膜の平均応力ばらつきは±0
.03X10”dyn/cm”となり、応力制御性は格
段と改善させる。
Next, in order to evaluate the controllability of the average stress, we will compare the above case with the case where a single layer film is formed with a stress of 0 dyn/Cm" and a film thickness of 1600 people.The controllability of the Ar gas pressure is Since it is about ±2 mTorr, from Figure 4, 6 m
Torr to lQmTorr, and 18mTorr
From r to 4-layer mTorr, the stress maintains a substantially constant value, and the stress variation is so small that it can be ignored. Also 26m
Under Torr conditions, the average stress is 0 dyn/cm",
The stress variation at that time is ±0.25 x 10” d
Therefore, the stress variation of a single layer film is ±0.25 The average stress variation of the film is ±0
.. The stress controllability is significantly improved.

〔発明の効果〕〔Effect of the invention〕

本発明の膜の製造方法により、多層膜の平均応力を設計
し、かつ設計どおりに設定することが可能となり、膜の
剥離防止ができるとともに、膜応力に起因するデバイス
特性の劣化を減少させることができるので、超高集積回
路の信頼性向上において卓抜した効果をなすことができ
る。
The film manufacturing method of the present invention makes it possible to design the average stress of a multilayer film and set it as designed, thereby preventing film peeling and reducing deterioration of device characteristics caused by film stress. Therefore, an outstanding effect can be achieved in improving the reliability of ultra-highly integrated circuits.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明に係る多層膜の概略断面図、第2図は
、単層膜の概略断面図、 第3図は、成膜条件のあるパラメータに対する応力の一
例を示す図、 第4図は、スパッタ装置でタングステンを蒸着させると
きの膜応力のアルゴンガス圧依存性を示すグラフ、 第5図は、シリコン基板上応力の制御されたタングステ
ン膜を形成する実施例を説明するための図である。 ■・・・・・第1層膜 2・・・・・第2N膜 3・・・・・第3層膜 4・・・・・第n層膜 5・・・・・基板 6・ ・ ・ ・ ・シリコン基板 7・・・・・タングステン膜第1層 8・・・・・タングステン膜第2層 代理人 弁理士  岩 佐  義 幸 第2図 圧縮     引張lノ 応力 ×1010〔dyn/Cm2〕 〉 1/’+       Σ
FIG. 1 is a schematic cross-sectional view of a multilayer film according to the present invention, FIG. 2 is a schematic cross-sectional view of a single-layer film, FIG. 3 is a diagram showing an example of stress for certain parameters of film-forming conditions, and FIG. The figure is a graph showing the dependence of film stress on argon gas pressure when tungsten is deposited using a sputtering device. Figure 5 is a diagram for explaining an example of forming a tungsten film with controlled stress on a silicon substrate. It is. ■...First layer film 2...Second N film 3...Third layer film 4...Nth layer film 5...Substrate 6...・ ・Silicon substrate 7... Tungsten film 1st layer 8... Tungsten film 2nd layer Agent Patent attorney Yoshiyuki Iwasa Figure 2 Compressive tensile l stress × 1010 [dyn/Cm2] 〉 1/'+Σ

Claims (1)

【特許請求の範囲】[Claims] (1)膜の形成条件の変化による応力の変化の小さい条
件で形成された複数の異なる応力を有する膜を積層する
ことを特徴とする膜の製造方法。
(1) A method for manufacturing a film, which comprises stacking a plurality of films having different stresses, which are formed under conditions where changes in stress due to changes in film formation conditions are small.
JP62249722A 1987-10-05 1987-10-05 Membrane manufacturing method Expired - Lifetime JPH061768B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62249722A JPH061768B2 (en) 1987-10-05 1987-10-05 Membrane manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62249722A JPH061768B2 (en) 1987-10-05 1987-10-05 Membrane manufacturing method

Publications (2)

Publication Number Publication Date
JPH0193117A true JPH0193117A (en) 1989-04-12
JPH061768B2 JPH061768B2 (en) 1994-01-05

Family

ID=17197224

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62249722A Expired - Lifetime JPH061768B2 (en) 1987-10-05 1987-10-05 Membrane manufacturing method

Country Status (1)

Country Link
JP (1) JPH061768B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02228034A (en) * 1989-02-28 1990-09-11 Oki Electric Ind Co Ltd Semiconductor device and manufacture thereof
US6344411B1 (en) 1997-11-21 2002-02-05 Nec Corporation OHMIC contact plug having an improved crack free tin barrier metal in a contact hole and method of forming the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5745931A (en) * 1980-09-04 1982-03-16 Fujitsu Ltd Semiconductor device with multilayer passivation film and manufacture thereof
JPS60126839A (en) * 1983-12-13 1985-07-06 Matsushita Electric Ind Co Ltd Semiconductor device
JPS62217419A (en) * 1986-03-17 1987-09-24 Mitsubishi Electric Corp Perpendicular magnetic recording medium and its production

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5745931A (en) * 1980-09-04 1982-03-16 Fujitsu Ltd Semiconductor device with multilayer passivation film and manufacture thereof
JPS60126839A (en) * 1983-12-13 1985-07-06 Matsushita Electric Ind Co Ltd Semiconductor device
JPS62217419A (en) * 1986-03-17 1987-09-24 Mitsubishi Electric Corp Perpendicular magnetic recording medium and its production

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02228034A (en) * 1989-02-28 1990-09-11 Oki Electric Ind Co Ltd Semiconductor device and manufacture thereof
US6344411B1 (en) 1997-11-21 2002-02-05 Nec Corporation OHMIC contact plug having an improved crack free tin barrier metal in a contact hole and method of forming the same
US6787913B2 (en) 1997-11-21 2004-09-07 Nec Electronics Corporation Ohmic contact plug having an improved crack free TiN barrier metal in a contact hole and method of forming the same

Also Published As

Publication number Publication date
JPH061768B2 (en) 1994-01-05

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