JPH0191666A - Controlling circuit of pwm system inverter - Google Patents

Abstract

PURPOSE:To select accurately gain by providing with a power receiving voltage discrimination circuit to discriminate power receiving systems of an inverter by voltage and operating a gain selection circuit according thereto. CONSTITUTION:A PWM inverter device is constituted of a full-wave rectifier 2, a smoothing condenser 3 and a PWM inverter 4 and drives a load 5. This controlling circuit is constituted of a DC voltage detector 6, a gain setting 7, a gain selection circuit 7A, a triangular wave signal generator 9, a voltage commander 10, a frequency commander 11, a sine wave signal generator 12, a comparator 4 and others. At this time, a power receiving system discrimina tion circuit is constituted of a timer 17, a latch circuit 18 and a comparator 19. The said discrimination circuit discriminates automatically power receiving systems after waiting for the smoothing condenser 3 to finish its charging, gain selective signals for power receiving systems on the side of low voltage are formed, and the gain selection circuit 7A sets a gain being set in advance for the power receiving system on the gain setting 7A based on the selecting signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a control circuit for a pulse width modulation type (hereinafter referred to as PWM type) inverter.

[Conventional technology]

The output voltage of a PWM inverter is proportional to the product of the DC voltage of the inverter main circuit and the on/off time ratio of the switching elements that make up the inverter main circuit, so if the DC voltage changes, the output voltage also changes. do. This DC voltage is usually obtained by converting the received voltage (commercial power supply voltage) into DC using a rectifier, so there is ripple fluctuation, and the received voltage is also not constant, so if you leave it as it is, you can avoid fluctuations in the output voltage. Conventionally, some kind of correction or correction means has been provided to suppress fluctuations in the AC output voltage.

FIG. 3 shows an example of a conventional PWM single-phase inverter equipped with this type of correction means. In the figure, 1 is a commercial power supply, 2 is a full-wave rectifier, 3 is a smoothing capacitor (electrolytic capacitor), and 4 is a sine wave converter.
M-type single-phase transistor inverter (hereinafter referred to as PWM
5 is an inverter load, for example, a drive coil of an electromagnetic vibrator.

A DC voltage detector 6 detects the voltage of the DC circuit of the PWM inverter 4, and detects the DC voltage Eo across the capacitor 3. 7 is a gain setter (however, in this example, the gain is set to 1), 7A is a gain selection circuit for the gain setter 7, 8 is a multiplier, and 9 is a triangular wave signal generator. The triangular wave signal generator 9 generates a constant amplitude triangular wave signal VCO, and the multiplier 8 takes out a variable amplitude triangular wave signal (which serves as a carrier wave) Vc having an amplitude of E.

Reference numeral 10 designates a voltage command device that creates the voltage command ■0, 11 a frequency command device that creates the frequency command F", 12 a sine wave signal generator, and 13 a multiplier. The sine wave signal generator 12 designates a frequency command F". A sine wave signal v3 with a frequency corresponding to F* is created, and a voltage signal (modulated wave) 1 whose amplitude is proportional to the magnitude of the voltage command v9 is taken out from the multiplier 13.1
4 is a comparator that creates a pwM signal, and the voltage signal V
A PWM signal is created by comparing the triangular wave signal `` and the triangular wave signal .
turns each transistor of the PWM inverter 4 on and off. Note that K and 2 are the gains selected by the gain selection circuit 7A and set in the gain setter 7, and the gain 1 is, for example, the gain for 100 volt grid power reception; /2) is the line-in for the 200-volt system power reception.

[Problem that the invention seeks to solve]

In this configuration, the amplitude of the triangular wave signal V is made to follow the DC voltage ED, thereby preventing fluctuations in the inverter output voltage due to voltage ripples in the DC voltage ED and fluctuations in the inverter output voltage due to fluctuations in the received voltage.

Triangular wave signal ■. For example, assuming that the amplitude is 4 volts when receiving power from a 100 volt system, it must be 4 volts even when receiving power from a 200 volt system and trying to obtain twice the output voltage as when receiving power from a 100 volt system. Therefore, the gain of the gain setter 7 is switched from 1, which is the gain when receiving power from the 100-volt system, to the gain Kt.

However, since the gain selection circuit (changeover switch) 7A for changing the gain has conventionally been manually operated by an operator, there is a risk of erroneous operation.

This invention was made to solve the above problem.
A PW that can automatically switch the gain of the gain setting device that provides the amplitude of the carrier wave to the gain that corresponds to the power receiving system.
The present invention aims to provide a control circuit for an M-type inverter.

[Means for solving problems]

In order to achieve the above object, the present invention includes a power receiving system discrimination circuit that compares the detected DC voltage value of the inverter main circuit with a set value, determines the inverter power receiving system based on a command, and sends a gain selection signal; The device is provided with a detection circuit that detects the completion of charging of the smoothing capacitor and creates the above-mentioned command, and a gain selection circuit of a gain setter that receives the above-mentioned gain selection signal and selects a gain corresponding to the signal.

[Effect]

In this invention, the power receiving system discrimination circuit waits for completion of charging of the smoothing capacitor, automatically determines the power receiving system, and generates a gain selection signal for the power receiving system with lower voltage or a gain selection signal for the power receiving system with higher voltage. A selection signal is created, and the gain selection circuit selects a gain preset for the power receiving system based on the selection signal and sets it in the gain setter.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

In FIG. 1, 16 is a power supply circuit (constant voltage power supply circuit, DC/DC converter) for the control circuit, and the PW
The voltage of the DC circuit of the M inverter 4 is taken in as human power. 17 is a timer to which a timer set signal (pulse) is applied from the power supply circuit 16. This timer set signal is a signal synchronized with the rise of the output of the power supply circuit 16, and is generated within the power supply circuit 16. The timer 17 is an off timer with a set time T, and together with the power supply circuit 16 constitutes a detection circuit for detecting the completion of charging of the capacitor 3 in the DC circuit of the PWM inverter 4. ] 8 is a latch circuit, 19 is a comparison circuit, and both constitute a power receiving system discrimination circuit. The timer output of the timer 17 is supplied to the latch circuit 18 as a latch signal R. The comparison circuit 19 takes in the DC voltage E11 (more precisely, the detected DC voltage value) and compares the DC voltage E0 with the set value EDc. The set value EDC is the DC voltage EDO value (this is defined as El, Io
o) and the DC voltage E after charging of the capacitor 3 is completed when the PWM inverter 4 receives power from, for example, a 200-volt power receiving system (this is defined as ED!.G). . When ED<EDC, the comparison circuit 19 determines that the commercial type aX is a 100-volt system and sends an H-level determination signal Z, and when ED>Eoc, it determines that it is a 200-volt system. and sends out an L level discrimination signal Z. The output Z of this comparison circuit 19 is latched by the latch circuit 18. When the latch circuit 18 latches the H level output Z, it sends out a selection command signal S (H level) for selecting the gain,
When the L level output Z is latched, a selection command signal S (L level) for selecting 2 as the gain is sent out. The set time T of the timer 17 is set to a value that is not smaller than the time required to complete charging of the capacitor 3 after the timer set signal is generated. Since the other configurations are the same as those in FIG. 3, the same components are given the same reference numerals.

Next, the operation of this device will be explained with reference to the waveform time chart shown in FIG.

In this configuration, it is assumed that the commercial power supply 1 is a 200 volt system. When the power switch 3w is turned on, the rectified voltage of the rectifier 2 starts charging the capacitor 3, the output of the control power supply circuit 16 rises, and the timer 17 starts timing operation. When the charging of the capacitor 3 is completed, the timer 17 counts up and sends the latch signal R to the latch circuit 18.
latches the output Z of the comparison circuit 19. At this time, ED
>Eoc, the comparison circuit 19 sends out the determination signal Z at L level. The latch circuit 18 latches this L level signal Z and sends out the L level selection command signal S, so the gain selection circuit 7A changes the gain to 2.
and set it on the gain setting device 7.

When the commercial power supply 1 is a 100 volt system, when the timer 17 completes the count-up, ED is 1Eoc, so the output of the comparison circuit 19 becomes I (level), and the output S of the latch circuit 18 becomes H level. Therefore, the gain selection circuit 7A selects the gain, and the gain setting device 7 sets the gain.

Note that if the rectified voltage of the inverter DC circuit fluctuates greatly, for example when receiving 200 volts, E may drop beyond EDC, and in such a case, As shown by the symbol N in FIG. 2, the output Z of the comparison circuit 19 is inverted, and even though 200 volts are being received, the gain is switched to 1, and the second
As shown by the symbol Nt in the figure, the same thing occurs when the power is turned off, so in order to prevent this, in this embodiment,
A latch circuit 18 that latches the output of the comparison circuit 19 is provided in the power receiving system discrimination circuit to improve reliability.

Note that if the series of operations of determining the power receiving system and selecting the gain in this embodiment are executed by software of a microcomputer, the timer 17 is set (started) at the time of starting the microcomputer. The setting time may be set according to the power reception timing.

Further, the present invention can be applied to a PWM type multiphase inverter to obtain similar effects.

〔Effect of the invention〕

As explained above, this invention includes a receiving voltage discrimination circuit that discriminates the power receiving system of the inverter on the voltage side, and operates a gain selection circuit according to discrimination information sent by the discrimination circuit, so that a gain corresponding to the received voltage is set. It is possible to select automatically and accurately without making erroneous selections.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a waveform time chart of essential parts in the above embodiment, and FIG. 3 is a block diagram showing a conventional control circuit for a PWM inverter. 4--PWM inverter, 6--DC voltage detector, 7A
---Gain selection circuit, 16-power supply circuit for control circuit, 1
7...Timer, 18-latch circuit, 19-comparison circuit.

Claims (4)

[Claims] (1) A control circuit for a PWM inverter that has a gain setter from which the detected value of the inverter main circuit DC voltage is derived, and controls the inverter output voltage by using a carrier wave with a variable amplitude proportional to the output of the gain setter. , the DC voltage detection value is compared with the set value, and when a command is received, a power receiving system discrimination circuit that discriminates the inverter power receiving system according to the receiving voltage and creates a gain selection signal, and a smoothing capacitor inserted in the inverter DC circuit. a detection circuit that detects the completion of charging and creates the command; a gain selection circuit that receives the gain selection signal and selects a pre-assigned gain for the level of the gain selection signal; A control circuit for a PWM inverter, characterized in that the selected gain is set to the gain setter. (2) A control circuit for a PWM inverter according to claim 1, wherein the power receiving system discrimination circuit comprises a comparison circuit into which a detected DC voltage value is introduced and a latch circuit into which a command is introduced. (3) The detection circuit has a timer, and the set signal of the timer is created in synchronization with the rise of the output of the inverter control circuit power supply circuit that creates a constant DC voltage by inputting the inverter DC circuit voltage. A control circuit for a PWM inverter according to claim 1 or 2, characterized in that: (4) The set value of the power receiving system discriminating circuit is an intermediate value of the DC voltage detection values after completion of startup of the smoothing capacitor of the inverter DC circuit corresponding to each of the different power receiving voltages. A control circuit for a PWM inverter according to the first, second, or third range.