JPH0189752U - - Google Patents
Info
- Publication number
- JPH0189752U JPH0189752U JP15957688U JP15957688U JPH0189752U JP H0189752 U JPH0189752 U JP H0189752U JP 15957688 U JP15957688 U JP 15957688U JP 15957688 U JP15957688 U JP 15957688U JP H0189752 U JPH0189752 U JP H0189752U
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- circuit board
- brazed
- conductor pin
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000000919 ceramic Substances 0.000 claims 1
- 230000008018 melting Effects 0.000 claims 1
- 238000002844 melting Methods 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988159576U JPH0536275Y2 (US20020095090A1-20020718-M00002.png) | 1988-12-08 | 1988-12-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988159576U JPH0536275Y2 (US20020095090A1-20020718-M00002.png) | 1988-12-08 | 1988-12-08 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0189752U true JPH0189752U (US20020095090A1-20020718-M00002.png) | 1989-06-13 |
| JPH0536275Y2 JPH0536275Y2 (US20020095090A1-20020718-M00002.png) | 1993-09-14 |
Family
ID=31440912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988159576U Expired - Lifetime JPH0536275Y2 (US20020095090A1-20020718-M00002.png) | 1988-12-08 | 1988-12-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0536275Y2 (US20020095090A1-20020718-M00002.png) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016048728A (ja) * | 2014-08-27 | 2016-04-07 | 株式会社村田製作所 | 導電性ポスト、及び、導電性ポストを用いた積層基板の製造方法 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5559746A (en) * | 1978-10-27 | 1980-05-06 | Hitachi Ltd | Semiconductor device and its mounting circuit device |
| JPS5743452A (en) * | 1980-08-28 | 1982-03-11 | Mitsubishi Electric Corp | Mounting structure for integrated circuit substrate |
| JPS5791586A (en) * | 1980-11-29 | 1982-06-07 | Tokyo Shibaura Electric Co | Hybrid integrated circuit device |
| JPS57121256A (en) * | 1981-01-21 | 1982-07-28 | Hitachi Ltd | Ceramic multilayer wiring structure |
| JPS57181144A (en) * | 1981-05-01 | 1982-11-08 | Toshiba Corp | Semiconductor device |
-
1988
- 1988-12-08 JP JP1988159576U patent/JPH0536275Y2/ja not_active Expired - Lifetime
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5559746A (en) * | 1978-10-27 | 1980-05-06 | Hitachi Ltd | Semiconductor device and its mounting circuit device |
| JPS5743452A (en) * | 1980-08-28 | 1982-03-11 | Mitsubishi Electric Corp | Mounting structure for integrated circuit substrate |
| JPS5791586A (en) * | 1980-11-29 | 1982-06-07 | Tokyo Shibaura Electric Co | Hybrid integrated circuit device |
| JPS57121256A (en) * | 1981-01-21 | 1982-07-28 | Hitachi Ltd | Ceramic multilayer wiring structure |
| JPS57181144A (en) * | 1981-05-01 | 1982-11-08 | Toshiba Corp | Semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016048728A (ja) * | 2014-08-27 | 2016-04-07 | 株式会社村田製作所 | 導電性ポスト、及び、導電性ポストを用いた積層基板の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0536275Y2 (US20020095090A1-20020718-M00002.png) | 1993-09-14 |
