JPH0183367U - - Google Patents
Info
- Publication number
- JPH0183367U JPH0183367U JP1987178202U JP17820287U JPH0183367U JP H0183367 U JPH0183367 U JP H0183367U JP 1987178202 U JP1987178202 U JP 1987178202U JP 17820287 U JP17820287 U JP 17820287U JP H0183367 U JPH0183367 U JP H0183367U
- Authority
- JP
- Japan
- Prior art keywords
- layer
- recess
- insulating layer
- insulating
- conductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
第１図は本考案の実施例を示す一部平面図、第
２図はの実施例を示す一部平面図、及び第３図は
、従来技術になる接続部を示す図である。
１０…絶縁基板、１１，１１′…絶縁基板の凹
部、１２…下部導体層、１３，１４…絶縁層、１
５…上部導体層。
FIG. 1 is a partial plan view showing an embodiment of the present invention, FIG. 2 is a partial plan view showing the embodiment, and FIG. 3 is a diagram showing a connection part according to the prior art. DESCRIPTION OF SYMBOLS 10... Insulating substrate, 11, 11'... Recessed part of insulating substrate, 12... Lower conductor layer, 13, 14... Insulating layer, 1
5...Top conductor layer.
Claims (1)
刷してなる厚膜回路基板において、前記絶縁基板
の表面の一部に凹部を形成し、前記凹部の底面に
下部導体層を通し、前記凹部を覆うようにこの上
に絶縁層を形成し、さらに該絶縁層の表面上に、
前記下部導体層に交差させて上部導体層を形成し
たことを特徴とする厚膜回路基板のクロスオーバ
ー部。 In a thick film circuit board formed by printing an electrode wiring pattern layer and an insulating layer on an insulating substrate, a recess is formed in a part of the surface of the insulating substrate, a lower conductor layer is passed through the bottom of the recess, and the recess is closed. An insulating layer is formed on the insulating layer so as to cover it, and further, on the surface of the insulating layer,
A crossover portion of a thick film circuit board, characterized in that an upper conductor layer is formed to cross the lower conductor layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987178202U JPH0183367U (en) | 1987-11-21 | 1987-11-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987178202U JPH0183367U (en) | 1987-11-21 | 1987-11-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0183367U true JPH0183367U (en) | 1989-06-02 |
Family
ID=31469829
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987178202U Pending JPH0183367U (en) | 1987-11-21 | 1987-11-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0183367U (en) |
-
1987
- 1987-11-21 JP JP1987178202U patent/JPH0183367U/ja active Pending
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