JPH0178330U - - Google Patents

Info

Publication number
JPH0178330U
JPH0178330U JP1987171374U JP17137487U JPH0178330U JP H0178330 U JPH0178330 U JP H0178330U JP 1987171374 U JP1987171374 U JP 1987171374U JP 17137487 U JP17137487 U JP 17137487U JP H0178330 U JPH0178330 U JP H0178330U
Authority
JP
Japan
Prior art keywords
semiconductor memory
converter
signal
input audio
tape recorder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987171374U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987171374U priority Critical patent/JPH0178330U/ja
Publication of JPH0178330U publication Critical patent/JPH0178330U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示すブロツク図、
第2図は本考案のVOR機能の動作説明図である
。 図中、1は録音再生ヘツド、6はマイクロホン
、9A〜9Fはスイツチ、10は信号処理回路、
11は半導体メモリ、12は制御部、13はシス
テムコントローラ、16は音声検出部を示す。
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is an explanatory diagram of the operation of the VOR function of the present invention. In the figure, 1 is a recording/playback head, 6 is a microphone, 9A to 9F are switches, 10 is a signal processing circuit,
11 is a semiconductor memory, 12 is a control section, 13 is a system controller, and 16 is a voice detection section.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力されたオーデイオ信号をデジタル信号に変
換するA/D変換器と、該A/D変換器の出力を
記憶し、読み出すことができる半導体メモリと、
前記半導体メモリから読み出されたデータをアナ
ログ信号に変換するD/A変換器を備えたテープ
レコーダにおいて、リピート再生モードでは前記
半導体メモリから出力される遅延信号によつてリ
ピート再生が行われるようにすると共に、VOR
記録モードでは前記半導体メモリによつて所定の
時間遅延した入力オーデイオ信号を録音ヘツドに
供給するように制御することを特徴とするテープ
レコーダ。
an A/D converter that converts an input audio signal into a digital signal; a semiconductor memory that can store and read the output of the A/D converter;
In a tape recorder equipped with a D/A converter that converts data read from the semiconductor memory into an analog signal, in a repeat playback mode, repeat playback is performed by a delayed signal output from the semiconductor memory. At the same time, VOR
A tape recorder characterized in that, in a recording mode, the semiconductor memory controls the input audio signal delayed by a predetermined time to be supplied to the recording head.
JP1987171374U 1987-11-11 1987-11-11 Pending JPH0178330U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987171374U JPH0178330U (en) 1987-11-11 1987-11-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987171374U JPH0178330U (en) 1987-11-11 1987-11-11

Publications (1)

Publication Number Publication Date
JPH0178330U true JPH0178330U (en) 1989-05-26

Family

ID=31463154

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987171374U Pending JPH0178330U (en) 1987-11-11 1987-11-11

Country Status (1)

Country Link
JP (1) JPH0178330U (en)

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