JPH0164142U - - Google Patents
Info
- Publication number
- JPH0164142U JPH0164142U JP1987159341U JP15934187U JPH0164142U JP H0164142 U JPH0164142 U JP H0164142U JP 1987159341 U JP1987159341 U JP 1987159341U JP 15934187 U JP15934187 U JP 15934187U JP H0164142 U JPH0164142 U JP H0164142U
- Authority
- JP
- Japan
- Prior art keywords
- converter
- tape recorder
- built
- solid
- bits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims description 2
- 230000005236 sound signal Effects 0.000 claims 1
- 238000011144 upstream manufacturing Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
Description
第1図は本考案の一実施例を示す固体メモリ内
蔵テープレコーダのブロツク図、第2図はA/D
変換レベルを示す説明図、第3図は利得可変アン
プの一例を示す回路図、第4図は従来のA/D変
換レベルを示す説明図である。
図中、3はプリアンプ、3Aは利得コントロー
ル回路、7は信号処理回路、8は半導体メモリ、
9はコントローラを示す。
Figure 1 is a block diagram of a tape recorder with a built-in solid-state memory showing one embodiment of the present invention, and Figure 2 is an A/D recorder.
FIG. 3 is a circuit diagram showing an example of a variable gain amplifier, and FIG. 4 is an explanatory diagram showing a conventional A/D conversion level. In the figure, 3 is a preamplifier, 3A is a gain control circuit, 7 is a signal processing circuit, 8 is a semiconductor memory,
9 indicates a controller.
Claims (1)
らなるデジタル信号に変換するA/D変換器と、
該A/D変換器の出力を記憶し、読み出すことが
できる半導体メモリを備えているテープレコーダ
において、前記A/D変換器の前段に設けられた
増幅器の利得特性が、前記A/D変換器のほぼ最
大変換レベルに対応する入力レベルで飽和特性と
なるように構成されていることを特徴とする固体
メモリ内蔵テープレコーダ。 an A/D converter that converts an input audio signal into a digital signal consisting of a predetermined number of bits;
In a tape recorder equipped with a semiconductor memory capable of storing and reading out the output of the A/D converter, the gain characteristic of an amplifier provided upstream of the A/D converter is different from that of the A/D converter. A tape recorder with a built-in solid-state memory, characterized in that the tape recorder is configured to have saturation characteristics at an input level corresponding to approximately the maximum conversion level of the tape recorder.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987159341U JPH075579Y2 (en) | 1987-10-20 | 1987-10-20 | Playback device with built-in solid-state memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987159341U JPH075579Y2 (en) | 1987-10-20 | 1987-10-20 | Playback device with built-in solid-state memory |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0164142U true JPH0164142U (en) | 1989-04-25 |
JPH075579Y2 JPH075579Y2 (en) | 1995-02-08 |
Family
ID=31440470
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987159341U Expired - Lifetime JPH075579Y2 (en) | 1987-10-20 | 1987-10-20 | Playback device with built-in solid-state memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH075579Y2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07170306A (en) * | 1993-12-15 | 1995-07-04 | Nec Corp | Demodulator |
-
1987
- 1987-10-20 JP JP1987159341U patent/JPH075579Y2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07170306A (en) * | 1993-12-15 | 1995-07-04 | Nec Corp | Demodulator |
Also Published As
Publication number | Publication date |
---|---|
JPH075579Y2 (en) | 1995-02-08 |
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