JPH0160567U - - Google Patents
Info
- Publication number
- JPH0160567U JPH0160567U JP1987156410U JP15641087U JPH0160567U JP H0160567 U JPH0160567 U JP H0160567U JP 1987156410 U JP1987156410 U JP 1987156410U JP 15641087 U JP15641087 U JP 15641087U JP H0160567 U JPH0160567 U JP H0160567U
- Authority
- JP
- Japan
- Prior art keywords
- optical semiconductor
- heat sink
- semi
- insulating heat
- fixed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
- 230000003287 optical effect Effects 0.000 claims description 5
- 239000008188 pellet Substances 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Description
第1図は本考案による光半導体装置の第1の実
施例の斜視図、第2図はその上面図、第3図は第
2の実施例の上面図、第4図は第3の実施例の上
面図、第5図は従来の半導体レーザの斜視図、第
6図はその上面図、第7図は本考案の半絶縁性ヒ
ートシンクの一例を示す斜視図である。 1……半導体レーザペレツト、2……ヒートシ
ンク、3……錫、4……金電極、5……銅ブロツ
ク、6……金線、7……リード、8……リード、
9……金線、10……ホトダイオード、11……
金線、12……ボンデイング部、20……光出射
点、21……中心線。
施例の斜視図、第2図はその上面図、第3図は第
2の実施例の上面図、第4図は第3の実施例の上
面図、第5図は従来の半導体レーザの斜視図、第
6図はその上面図、第7図は本考案の半絶縁性ヒ
ートシンクの一例を示す斜視図である。 1……半導体レーザペレツト、2……ヒートシ
ンク、3……錫、4……金電極、5……銅ブロツ
ク、6……金線、7……リード、8……リード、
9……金線、10……ホトダイオード、11……
金線、12……ボンデイング部、20……光出射
点、21……中心線。
Claims (1)
- ステムに固着した良導体ブロツク上に表面を導
電性処理された半絶縁性ヒートシンクを固着し、
前記半絶縁性ヒートシンクに光半導体ペレツトを
固着した構成を少なくとも備えている光半導体装
置において、光半導体ペレツトの光ビーム出射点
又は受光面中心を通る中心線に対して、前記半絶
縁性ヒートシンクが非対称になつていることを特
徴とする光半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987156410U JPH0160567U (ja) | 1987-10-12 | 1987-10-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987156410U JPH0160567U (ja) | 1987-10-12 | 1987-10-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0160567U true JPH0160567U (ja) | 1989-04-17 |
Family
ID=31434924
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987156410U Pending JPH0160567U (ja) | 1987-10-12 | 1987-10-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0160567U (ja) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59151484A (ja) * | 1983-02-18 | 1984-08-29 | Agency Of Ind Science & Technol | 半導体レ−ザ装置 |
JPS6424870A (en) * | 1987-07-02 | 1989-01-26 | Ici Plc | Bottom coat paint composition and its production |
-
1987
- 1987-10-12 JP JP1987156410U patent/JPH0160567U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59151484A (ja) * | 1983-02-18 | 1984-08-29 | Agency Of Ind Science & Technol | 半導体レ−ザ装置 |
JPS6424870A (en) * | 1987-07-02 | 1989-01-26 | Ici Plc | Bottom coat paint composition and its production |