JPH0160543U - - Google Patents

Info

Publication number
JPH0160543U
JPH0160543U JP15631687U JP15631687U JPH0160543U JP H0160543 U JPH0160543 U JP H0160543U JP 15631687 U JP15631687 U JP 15631687U JP 15631687 U JP15631687 U JP 15631687U JP H0160543 U JPH0160543 U JP H0160543U
Authority
JP
Japan
Prior art keywords
semiconductor
semiconductor device
utility
insulating sheet
solid material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15631687U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15631687U priority Critical patent/JPH0160543U/ja
Publication of JPH0160543U publication Critical patent/JPH0160543U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第3図は本考案の半導体装置の一実
施例を示し、第1図は組立て前の斜視図、第2図
は組立て後の斜視図、第3図は第2図の―断
面図、第4図は従来の半導体装置の一例を示す構
成図である。 1…半導体チツプ(半導体部品)、2…絶縁シ
ート、3…端子、4…樹脂、5…固形材。
1 to 3 show an embodiment of the semiconductor device of the present invention, in which FIG. 1 is a perspective view before assembly, FIG. 2 is a perspective view after assembly, and FIG. 3 is a cross-section of FIG. 2. 4 are configuration diagrams showing an example of a conventional semiconductor device. 1... Semiconductor chip (semiconductor component), 2... Insulating sheet, 3... Terminal, 4... Resin, 5... Solid material.

Claims (1)

【実用新案登録請求の範囲】 (1) フレキシブルな絶縁シートの一方の表面に
、半導体チツプ又は半導体パツケージ等の半導体
部材を取付け、この半導体部材が取付けられてい
る表面が内側となるように上記絶縁シートをほぼ
U字状に曲げ、内側の空間に絶縁性の固形材を固
着したことを特徴とする半導体装置。 (2) 固形材は樹脂を内側の空間に注入して固化
させたものより成ることを特徴とする実用新案登
録請求の範囲第1項記載の半導体装置。 (3) U字状に成形された絶縁シートにおける対
向片の先端に、外方に直角に折曲された接地片を
設け、この接地片の表面に端子を形成したことを
特徴とする実用新案登録請求の範囲第1項記載の
半導体装置。 (4) 両対向片の内側に半導体部材が設けられて
いることを特徴とする実用新案登録請求の範囲第
1項記載の半導体装置。
[Claims for Utility Model Registration] (1) A semiconductor component such as a semiconductor chip or a semiconductor package is attached to one surface of a flexible insulating sheet, and the above insulating sheet is placed so that the surface on which the semiconductor component is attached is on the inside. A semiconductor device characterized by a sheet bent into a substantially U-shape and an insulating solid material fixed to the inner space. (2) The semiconductor device according to claim 1, wherein the solid material is made of a resin injected into the inner space and solidified. (3) A utility model characterized in that a grounding piece bent outward at right angles is provided at the tip of the opposing piece of the U-shaped insulating sheet, and a terminal is formed on the surface of this grounding piece. A semiconductor device according to claim 1. (4) The semiconductor device according to claim 1 of the utility model registration, characterized in that a semiconductor member is provided inside both opposing pieces.
JP15631687U 1987-10-13 1987-10-13 Pending JPH0160543U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15631687U JPH0160543U (en) 1987-10-13 1987-10-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15631687U JPH0160543U (en) 1987-10-13 1987-10-13

Publications (1)

Publication Number Publication Date
JPH0160543U true JPH0160543U (en) 1989-04-17

Family

ID=31434749

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15631687U Pending JPH0160543U (en) 1987-10-13 1987-10-13

Country Status (1)

Country Link
JP (1) JPH0160543U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001026432A1 (en) * 1999-10-01 2001-04-12 Seiko Epson Corporation Wiring board, semiconductor device and method of producing, testing and packaging the same, and circuit board and electronic equipment

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001026432A1 (en) * 1999-10-01 2001-04-12 Seiko Epson Corporation Wiring board, semiconductor device and method of producing, testing and packaging the same, and circuit board and electronic equipment
US6867496B1 (en) 1999-10-01 2005-03-15 Seiko Epson Corporation Interconnect substrate, semiconductor device, methods of fabricating, inspecting, and mounting the semiconductor device, circuit board, and electronic instrument
US7009293B2 (en) 1999-10-01 2006-03-07 Seiko Epson Corporation Interconnect substrate, semiconductor device, methods of fabricating, inspecting, and mounting the semiconductor device, circuit board, and electronic instrument

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