JPH0158885B2 - - Google Patents
Info
- Publication number
- JPH0158885B2 JPH0158885B2 JP58029676A JP2967683A JPH0158885B2 JP H0158885 B2 JPH0158885 B2 JP H0158885B2 JP 58029676 A JP58029676 A JP 58029676A JP 2967683 A JP2967683 A JP 2967683A JP H0158885 B2 JPH0158885 B2 JP H0158885B2
- Authority
- JP
- Japan
- Prior art keywords
- power
- high frequency
- voltage
- circuit
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000605 extraction Methods 0.000 claims description 7
- 230000005284 excitation Effects 0.000 claims description 3
- 230000002265 prevention Effects 0.000 claims description 3
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/52—Circuit arrangements for protecting such amplifiers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Description
【発明の詳細な説明】
本発明は高周波増幅器もしくは高周波発振器の
真実の過負荷動作を保護するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention protects against true overload operation of high frequency amplifiers or high frequency oscillators.
一般にこのような場合に、該当する入力電力
（電源電圧が一定の場合には入力電流）と負荷か
らの反射電力が設定値よりも超過した際に、電源
を遮断したり、励振高周波電力を低下させるなど
の保護回路を採用してきた。 Generally, in such cases, when the corresponding input power (input current if the power supply voltage is constant) and reflected power from the load exceed set values, the power supply is shut off or the excitation high-frequency power is reduced. We have adopted protection circuits such as
然し実際に該当する高周波増幅器や高周波発振
器に損傷を与える電力は、電源入力電力から高周
波出力電力を減じたものであつて、印加電源電圧
や電流に余裕のある範囲内では、電源入力電力が
増加しても高周波出力電力がそれ以上上昇すれ
ば、損傷を与えるべき電力は反つて減少して安全
である。 However, the power that actually damages the high-frequency amplifier or high-frequency oscillator is the power supply input power minus the high-frequency output power, and within the range where there is enough margin for the applied power supply voltage and current, the power supply input power increases. However, if the high-frequency output power increases further, the amount of power that would cause damage decreases and is safe.
然るに従来の保護回路では、電源電圧、電源電
流（陽極電流またはコレクタ電流等）と反射波電
力に各個単独の設定値を設け、いずれかが設定値
を超過した所で動作を停止させるようにしてい
た。この際に電源電圧、電源電流等を、規格の最
大値に設定すればそれらが安全圏内にあつても高
周波出力電力の減少によつて危険電力を超過する
事態が発生する。これを保護するために、電源関
係の設定値を低くすれば、高周波出力電力の増加
による安全動作範囲内にあつても、動作を遮断さ
せるような過保護状態になつてしまう。 However, in conventional protection circuits, individual set values are set for the power supply voltage, power supply current (anode current or collector current, etc.), and reflected wave power, and the operation is stopped when any of them exceeds the set value. Ta. At this time, if the power supply voltage, power supply current, etc. are set to the maximum values of the standard, even if they are within the safe range, a situation will occur in which the dangerous power is exceeded due to a decrease in the high frequency output power. In order to protect against this, if the set values related to the power supply are lowered, an overprotection state will occur in which the operation is cut off even if the high frequency output power is within the safe operating range due to the increase in the output power.
通信機などのように負荷が安定な場合はとも
角、工業用の用途においては一般に負荷の変動が
激しいために、安全にしかもできるだけ多くの高
周波電力が出力できるような適切な過負荷防止回
路が望まれる。 While it may be the case that the load is stable, such as in communications equipment, in industrial applications the load generally fluctuates rapidly, so an appropriate overload prevention circuit is required to safely output as much high-frequency power as possible. desired.
高周波増幅器などの高周波出力電力は負荷回路
との間に流れる進行波高周波電力と負荷回路から
の反射波電力との差である。従つて電源入力電力
Wpから負荷への進行波高周波電力Wfを減じ、負
荷からの反射波高周波電力Wrを加えた電力が増
幅器内で損失となる電力W1である。 The high frequency output power of a high frequency amplifier or the like is the difference between the traveling high frequency power flowing between the high frequency amplifier and the load circuit and the reflected wave power from the load circuit. Therefore the power input power
The power obtained by subtracting the traveling wave high frequency power Wf to the load from Wp and adding the reflected wave high frequency power Wr from the load is the power W1 that becomes a loss within the amplifier.
W1＝Wp−（Wf−Wr）＝Wp−Wf＋Wr …(1)
本発明はこの原理によつて高周波増幅器もしく
は高周波発振器の真実損失となる電力が設定値を
超過したときに、回路を遮断して、安全を計るも
のである。 W1=Wp-(Wf-Wr)=Wp-Wf+Wr...(1) Based on this principle, the present invention shuts off the circuit when the actual power loss of the high-frequency amplifier or high-frequency oscillator exceeds a set value. , is a measure of safety.
第１図は本発明の一実施例の概略図を示してい
る。この例では出力段にトランジスタを使用して
いるので、電源電圧は安定化したものを採用し
た。従つて出力トランジスタの電源入力電力はコ
レクタ電流またはエミツタ電流に比例する。 FIG. 1 shows a schematic diagram of one embodiment of the invention. In this example, a transistor is used in the output stage, so a stabilized power supply voltage is used. Therefore, the power input to the output transistor is proportional to the collector current or emitter current.
トランジスタ１のベースには前段の励振器から
高周波電力２が印加されており定電圧電源ライン
３から電源電圧を受けている。 A high frequency power 2 is applied to the base of the transistor 1 from an exciter in the previous stage, and a power supply voltage is received from a constant voltage power supply line 3.
トランジスタ１で増幅された高周波出力電力は
同調回路４を通して出力端子５に達し、負荷に加
えられるが、その間には進行波電力抽出器６と反
射波電力抽出器７が挿入されており、それぞれ進
行波成分および負荷からの反射波成分を抽出して
いる。これらの抽出器には通常の方向性結合器を
使用すればよい。この両抽出器の高周波出力は検
波器８と同９で直流電圧に変換され、結合抵抗器
１１を経て加算器１２に加えられるが、この際
に、進行波成分用の検波器のみは極性を逆にして
負電圧を加算器に加えている。 The high frequency output power amplified by the transistor 1 reaches the output terminal 5 through the tuning circuit 4 and is applied to the load, but a traveling wave power extractor 6 and a reflected wave power extractor 7 are inserted between them. Wave components and reflected wave components from the load are extracted. Ordinary directional couplers may be used for these extractors. The high-frequency outputs of both extractors are converted into DC voltage by detectors 8 and 9, and then added to adder 12 via coupling resistor 11. At this time, only the detector for the traveling wave component changes the polarity. This is reversed and a negative voltage is applied to the adder.
一方、トランジスタ１への電源入力電力は前述
の如く、コレクタまたはエミツタ電流に比例する
ようになつているから、この回路に挿入された抵
抗器１０の直流電圧降下が電源入力電力に相当す
ることになる。この電圧も結合抵抗器１１を経て
加算器１２に印加される。加算器１２に印加され
る電圧は結合抵抗器１１の値を適当にすれば、そ
れぞれ電源入力電力Wp、出力高周波信号の進行
波成分Wfおよび反射波成分Wrに同一比率を乗じ
たものに相当させられるから、前記(1)式の如く、
加算器１２の出力電圧は出力トランジスタ１内の
電圧損失W1に相当することになる。 On the other hand, since the power input to the transistor 1 is proportional to the collector or emitter current as described above, the DC voltage drop across the resistor 10 inserted in this circuit corresponds to the power input to the transistor. Become. This voltage is also applied to the adder 12 via the coupling resistor 11. If the value of the coupling resistor 11 is set appropriately, the voltage applied to the adder 12 corresponds to the power supply input power Wp, the traveling wave component Wf of the output high-frequency signal, and the reflected wave component Wr multiplied by the same ratio. Therefore, as in equation (1) above,
The output voltage of the adder 12 corresponds to the voltage loss W1 within the output transistor 1.
加算器１２の出力電圧は差動増幅器１３の一方
の入力端子に加えられるが、差動増幅器の他方の
入力端子には電圧調整器１４の出力可変電圧が印
加される。従つて、この電圧調整器１４の出力電
圧レベルを変化させれば、差動増幅器１３の出力
に接続されているリレー１５を動作させる電力損
失W1のレベルを調整できる。 The output voltage of the adder 12 is applied to one input terminal of the differential amplifier 13, while the output variable voltage of the voltage regulator 14 is applied to the other input terminal of the differential amplifier. Therefore, by changing the output voltage level of this voltage regulator 14, the level of power loss W1 that operates the relay 15 connected to the output of the differential amplifier 13 can be adjusted.
リレー１５が動作すると、その接点１６が開放
される。第１図の回路ではこの際に出力トランジ
スタ１の電源電圧Vccがリレー接点１６の開放に
よつて遮断されるように保護しているが、このリ
レー接点１６によつて前段からの高周波励振電力
を遮段するようにしてもよい。或いは両者共完全
に遮断はせずに、低く制御することによつて再起
動し易くすることもできる。 When relay 15 operates, its contacts 16 are opened. In the circuit shown in FIG. 1, the power supply voltage Vcc of the output transistor 1 is protected at this time by being cut off by opening the relay contact 16, and the high-frequency excitation power from the previous stage is protected by the relay contact 16. It may also be shielded. Alternatively, it is possible to make it easier to restart by controlling both of them to a low level without completely shutting them off.
尚、第１図中で、１７は高周波バイパス用コン
デンサ、１８は電源電圧供給端子である。 In FIG. 1, 17 is a high frequency bypass capacitor, and 18 is a power supply voltage supply terminal.
次に本発明の方式を採用した場合に、どの程度
の改善が行われるか一例について説明する。今終
段のトランジスタのコレクタに電源電圧100Vが
加わり、コレクタ電流の制限を1.5Aとし、また
反射波電力を10Wと設定した従来の方式を考え
る。このとき入力電力は100×1.5＝150Wで能率
を50％とすると、高周波出力電力Wo＝150×0.5
＝75Wである。反射波電力Wrを10Wとすると、
進行波電力Wfは
Wf＝Wo＋Wr＝85W
となり、反射係数｜Γ｜＝√＝√1085
≒0.343で電圧定在波比VSWR＝（１＋｜Γ｜）／
（１−｜Γ｜）＝2.044となる。 Next, an example of how much improvement can be achieved when the method of the present invention is adopted will be explained. Now consider a conventional method in which a power supply voltage of 100V is applied to the collector of the final stage transistor, the collector current is limited to 1.5A, and the reflected wave power is set to 10W. At this time, if the input power is 100 x 1.5 = 150W and the efficiency is 50%, then the high frequency output power Wo = 150 x 0.5
=75W. When the reflected wave power Wr is 10W,
The traveling wave power Wf is Wf=Wo+Wr=85W, and the reflection coefficient |Γ|=√=√1085
≒0.343 and voltage standing wave ratio VSWR = (1 + | Γ |) /
(1-|Γ|)=2.044.
このとき負荷回路を調整してVSWRを1.2まで
改善したとする。VSWRの改善に伴い、当然能
率も60％にまで上昇したとすると、コレクタ電流
が1.5Aのままとして高周波出力Woは75×（0.6／
0.5）＝90Wになる。このとき反射波電力Wrは反
射係数｜Γ｜がVSWR＝1.2から｜Γ｜＝（1.2−
１）／（1.2＋１）≒0.091まで低下し、また｜Γ
｜2＝Wr／Wf＝Wr／（Wo＋Wr）＝0.0083だか
ら、Wr＝Wo／（１／｜Γ｜2−１）＝90／（１／
0.0083−１）＝0.75W即ち、10Wの制限に対して
十分小さくなつたが、Ic＝1.5Aの制限のために高
周波出力Woは90Wであり、コレクタ損失W1は
W1＝150−90＝60W
で、VSWR＝2.044の場合に比べて、75W−60W
＝15Wと15Wだけ軽くなつたが、その分だけ実力
を発揮できない状態におくことになる。 At this time, suppose that the load circuit is adjusted to improve the VSWR to 1.2. Assuming that the efficiency has naturally increased to 60% with the improvement of VSWR, the high frequency output Wo will be 75 × (0.6/
0.5) = 90W. At this time, the reflected wave power Wr has a reflection coefficient |Γ| from VSWR=1.2 to |Γ|=(1.2−
1)/(1.2+1)≒0.091, and |Γ
｜ 2 = Wr / Wf = Wr / (Wo + Wr) = 0.0083, so Wr = Wo / (1 / | Γ | 2 −1) = 90 / (1 /
0.0083-1) = 0.75W, which is sufficiently small compared to the 10W limit, but due to the Ic = 1.5A limit, the high-frequency output Wo is 90W, and the collector loss W1 is W1 = 150-90 = 60W. , compared to the case of VSWR=2.044, 75W−60W
= 15W It is lighter by 15W, but it means that it will not be able to demonstrate its full potential by that much.
このような場合に本発明の方式を採用すると、
電源入力電力150Wに相当する電圧Epを1.5V、進
行波電力100Wに相当する電圧Efを−1V、また反
射波電力100Wに相当する電圧Erを1Vとなるよう
に加算器デバイダの倍率を調整して、第２図の如
く加えると、加算器の出力電圧Eaは
Ea＝Ep＋Er−Ef …(2)
となる。前述の計算例では電源入力電力Wp＝
150W、反射波電力Wr＝10W、進行波電力
Wf85Wで高周波出力電力Wo＝Wf−Wr＝75Wで
あるから、これらに相当する各電圧はEp＝1.5V、
Er＝0.1V、Ef＝0.85VでEa＝1.5＋0.1−0.85＝
0.75Vとなる。これは(1)式によつて、トランジス
タの損失電力に相当する電圧である。 If the method of the present invention is adopted in such a case,
Adjust the magnification of the adder divider so that the voltage Ep corresponding to 150W power supply input power is 1.5V, the voltage Ef corresponding to 100W traveling wave power is -1V, and the voltage Er corresponding to 100W reflected wave power is 1V. Then, by adding as shown in FIG. 2, the output voltage Ea of the adder becomes Ea=Ep+Er-Ef (2). In the above calculation example, power supply input power Wp=
150W, reflected wave power Wr=10W, traveling wave power
Since the high frequency output power Wo = Wf - Wr = 75W at Wf85W, the corresponding voltages are Ep = 1.5V,
Er=0.1V, Ef=0.85V and Ea=1.5+0.1−0.85=
It becomes 0.75V. This is a voltage corresponding to the power loss of the transistor according to equation (1).
一応、このトランジスタの最大損失を75Wとす
ると、この値に相当する電圧は0.75Vとなる。そ
こで、差動増幅器１３に加える基準電圧即ち調整
器１４の出力電圧レベルEbを同一レベルに設定
しておくと、トランジスタの損失電圧が75Wを超
過したときに差動増幅器ほ出力電流が流れ、リレ
ー１５を動作させて、トランジスタの動作を停止
させて保護するようになる。 Assuming that the maximum loss of this transistor is 75W, the voltage corresponding to this value is 0.75V. Therefore, if the reference voltage applied to the differential amplifier 13, that is, the output voltage level Eb of the regulator 14, is set to the same level, when the loss voltage of the transistor exceeds 75W, the output current flows to the differential amplifier, and the relay 15 is activated and the operation of the transistor is stopped for protection.
この状態で、負荷のVSWRを1.2まで整合させ
ると、前述のように能率が50％から60％に上昇す
る。このときトランジスタ内の損失電力W1を一
定とすると、改善された場合の電源入力電力を
Wp′とし、Wf＝Wr＝Woに対応する高周波出力
電力Wo′＝Wf′−Wr′は次の関係がある。 In this state, if you match the VSWR of the load to 1.2, the efficiency will increase from 50% to 60% as described above. At this time, assuming that the power loss W1 in the transistor is constant, the input power of the power supply in the case of improvement is
The high-frequency output power Wo'=Wf'-Wr' corresponding to Wp' and Wf=Wr=Wo has the following relationship.
W1＝Wp−Wo＝Wp′−Wo′
然るにWo／Wp＝0.5、Wo′／Wp′＝0.6となつ
ているから、
W1＝Wp（１−Wo／Wp）＝0.5Wp
＝Wp′（１−Wo′／Wp′）＝0.4Wp′
故に
Wp′＝Wp×0.5／0.4＝Wp×1.25
即ちトランジスタ内の損失を等しくすれば、本
発明の方式では、電源入力を25％増加させ、必然
的に高周波出力電力も25％増加させることができ
る。このとき、電源入力は150W×1.25＝187.5W
であり、高周波出力電力は187.5W×0.6＝112.5W
となり、従来の方式に比して112.5−90＝22.5W
の増加が得られる。即ち本発明の過負荷防止回路
では真実に保護を必要とするトランジスタの内部
損失を対象として制限を計るので、負荷の変化に
対し、常に充分な力を発揮させることができる。 W1=Wp−Wo=Wp′−Wo′ However, since Wo/Wp=0.5 and Wo′/Wp′=0.6, W1=Wp(1−Wo/Wp)=0.5Wp=Wp′(1− Wo'/Wp') = 0.4Wp' Therefore, Wp' = Wp x 0.5/0.4 = Wp x 1.25 In other words, if the losses in the transistors are made equal, the method of the present invention increases the power input by 25%, which inevitably results in High frequency output power can also be increased by 25%. At this time, the power input is 150W x 1.25 = 187.5W
The high frequency output power is 187.5W x 0.6 = 112.5W
Therefore, compared to the conventional method, the power consumption is 112.5−90=22.5W.
is obtained. That is, since the overload prevention circuit of the present invention limits the internal loss of the transistor that really requires protection, it is possible to always exert sufficient power against changes in load.
トランジスタは電子管に比して、過負荷に対す
る耐力が弱いので、本発明は特に半導体回路に有
利であるとはいえ、電子管回路にも有効なことは
論をまたない。また負荷の変動の著しい工業的応
用に対しては特に本発明が効果的である。 Since transistors have weaker overload resistance than electron tubes, the present invention is particularly advantageous for semiconductor circuits, but it goes without saying that it is also effective for electron tube circuits. Further, the present invention is particularly effective for industrial applications where load fluctuations are significant.
第１図は本発明の一実施例の概略を示す回路
図、第２図はその加算器動作説明図である。
１は出力トランジスタ、２は高周波電力、３は
電源供給ライン、４は同調回路、５は出力端子、
６は進行波成分抽出回路、７は反射波成分抽出回
路、８，９は検波器、１０はトランジスタ電流検
出用抵抗器、１１は結合抵抗器、１２は加算器、
１３は差動増幅器、１４は電圧調整器、１５はリ
レー、１６はリレー接点、１７は高周波バイパス
コンデンサ、１８は電源供給端子。
FIG. 1 is a circuit diagram schematically showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram of the adder operation thereof. 1 is an output transistor, 2 is a high frequency power supply, 3 is a power supply line, 4 is a tuning circuit, 5 is an output terminal,
6 is a traveling wave component extraction circuit, 7 is a reflected wave component extraction circuit, 8 and 9 are detectors, 10 is a transistor current detection resistor, 11 is a coupling resistor, 12 is an adder,
13 is a differential amplifier, 14 is a voltage regulator, 15 is a relay, 16 is a relay contact, 17 is a high frequency bypass capacitor, and 18 is a power supply terminal.
Claims (1)
路との間に、進行波成分抽出回路と反射波成分抽
出回路を置き、前記高周波増幅器もしくは高周波
発振器の入力電源電力に相当する電圧から、上記
進行波成分抽出回路で抽出した進行波電力に相当
する電圧を減じ、かつ上記反射波成分抽出回路で
抽出した反射波電力に相当する電圧を加え、その
合計値が、予め設定した値を超過したとき、該当
する電源回路または高周波励振電力を遮断または
制御する如く構成することを特徴とする高周波増
幅器等の過負荷防止回路。1 A traveling wave component extraction circuit and a reflected wave component extraction circuit are placed between the high frequency amplifier or high frequency oscillator and the load circuit, and the traveling wave component extraction circuit When the voltage corresponding to the forward wave power extracted by the above-mentioned reflected wave component extraction circuit is subtracted, and the voltage corresponding to the reflected wave power extracted by the reflected wave component extraction circuit is added, and the total value exceeds a preset value, the corresponding power supply An overload prevention circuit for a high frequency amplifier or the like, characterized in that it is configured to cut off or control a circuit or high frequency excitation power.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58029676A JPS59154807A (en) | 1983-02-24 | 1983-02-24 | Overload preventing circuit for high frequency amplifier or the like |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58029676A JPS59154807A (en) | 1983-02-24 | 1983-02-24 | Overload preventing circuit for high frequency amplifier or the like |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59154807A JPS59154807A (en) | 1984-09-03 |
| JPH0158885B2 true JPH0158885B2 (en) | 1989-12-14 |
Family
ID=12282711
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58029676A Granted JPS59154807A (en) | 1983-02-24 | 1983-02-24 | Overload preventing circuit for high frequency amplifier or the like |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59154807A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5223243A (en) * | 1975-08-16 | 1977-02-22 | Nippon Telegr & Teleph Corp <Ntt> | Protective circuit for power amplifier |
-
1983
- 1983-02-24 JP JP58029676A patent/JPS59154807A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5223243A (en) * | 1975-08-16 | 1977-02-22 | Nippon Telegr & Teleph Corp <Ntt> | Protective circuit for power amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59154807A (en) | 1984-09-03 |
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