JPH0156391B2 - - Google Patents

Description

[Detailed Description of the Invention] This invention is an underwater detection device that transmits and receives ultrasonic waves in a wide range of directions, and is capable of clearly identifying and displaying a detection signal even when the display of the detection signal is unstable due to movement of the ship, etc. Realize a device that can obtain

An underwater detection device that simultaneously detects a wide range of directions,
Generally, ultrasonic pulses are simultaneously transmitted in a wide range of directions, and the reflected waves returning from each direction are received by an ultrasonic receiver having a directivity direction in each direction. The reception signal of each receiver is time-seriesized at high speed to sample the reflected waves on the equidistant line, and the sampling signal is used to brightness-modulate the electron beam of the cathode ray tube that performs spiral scanning. The reflected waves of are displayed at each corresponding azimuth position.

However, in such a display device, reflected waves returning from a wide range of directions are sampled in each direction and converted into a time series, resulting in a mosaic-like display on the cathode ray tube. Furthermore, since the reflected waves returning from the water are relatively unstable due to the movement of the ship, etc., the displayed image on the cathode ray tube tends to blink, making it difficult to identify the displayed image. In particular, when the detected object is a small object, a dotted display image is displayed blinking on the display, so it is difficult to distinguish whether the display is due to noise or the display of the detected object.

In addition, since conventional display devices instantaneously convert the detected object into a semiconductor, the operator must rely on the operator to determine the movement of the detected object over time, and therefore it is difficult to accurately grasp the continuous movement of the detected object. Can not do it.

In order to deal with the above-mentioned drawbacks, this invention integrates and displays the reflected waves returning from a specific section in a predetermined distance direction separately for each direction, and also displays the elapsed time of the detection signal. This provides an underwater detection device that can clearly identify the presence or absence of a detected object.

Examples of the present invention will be described below.

In FIG. 1, _z1 to zm indicate ultrasonic transducers. Each of the ultrasonic transducers z ₁ to zm has a directivity angle of 2θ/m, and as shown in Fig. 2, the directivity direction is sequentially different by 2θ/m from the sea surface S toward the seabed B. are arranged within an angle of 2θ.

The ultrasonic transducers _z1 to zm are simultaneously excited by the transmitter 1 and transmit ultrasonic pulses in the 2θ angle range shown in FIG. In addition, the transmission output of the transmitter 1 is transmitted to the ultrasonic transducer z ₁ via the switch 2 ₁ to 2 m.
Or guided by zm.

Ultrasonic pulses transmitted in the 2θ angular direction of the ocean floor are reflected by detection objects in each direction, and ultrasonic transducers z ₁ to zm are directed in each direction.
The waves are received by each of the following. Then, the received signals received by each of the ultrasonic transducers _z1 to zm are passed through each of the switching devices ₂₁ to 2m to the integrating circuit _31.
3m to 3m.

Integration circuit 3 Each of ₁ to 3 m is an ultrasonic transducer
Among the received signals from _z1 to zm, the received signals within a specific section are integrated. For example, in FIG. 2, when the depth r ₀ is set, the received signals from the depth r ₀ to the seabed are integrated. In addition, integration circuit 3 ₁ to 3
A specific example of m will be described later.

The integration outputs of the integration circuits 3 ₁ to 3m are led to the time series circuit 4, where each integration output is converted into a time series and sent out. The time series operation of the time series circuit 4 is performed by an x-axis counter 5. x-axis counter 5
is composed of an m-adic counter and counts the pulse train of the clock pulse source 7 guided through the gate circuit 6. Then, when the x-axis counter 5 counts the clock pulse train, the time series circuit 4 sends the integrated outputs of the integrating circuits ₃₁ to 3m corresponding to the count value of the x-axis counter 5. Furthermore, when the x-axis counter 5 counts m clock pulse trains from the clock pulse source 7, it sends an output pulse to the transmitter 1. The transmitter 1 uses this output pulse to transmit the above-mentioned transmission pulse.

The output pulse of the x-axis counter 5 is sent to the transmitter 1 and is also sent to the reset terminal of the flip-flop 8, resetting the Q output of the flip-flop 8 to a low level and the output to a high level.

The Q output of the flip-flop 8 is sent to the gate circuit 6, making the gate circuit 6 conductive while the Q output remains at a high level. Therefore, the x-axis counter 5 counts the clock pulse train while the Q output of the flip-flop 8 is sending out a high level output, and uses the output pulse to
At the same time as is reset, the gate circuit 6 is cut off and counting is stopped.

At the same time as flip-flop 8 is reset, the Q output is inverted to a high level, making gate circuit 9 conductive. The gate circuit 9 sends the pulse train of the clock pulse source 7 to the distance counter 1 via the frequency dividing circuit 22 while it is conductive. The frequency dividing circuit 22 divides the frequency of the clock pulse train and sends out a pulse train with a period corresponding to a unit distance. For example, ultrasound
Since it travels a distance of 1m in 1.33meec,
Sends out a pulse train with a period of 1.33msec. The distance counter 10 counts the pulse train of the frequency dividing circuit 22, and the counted value is compared with the set value of the detection distance setting device 11 in the comparison circuit 12. The detection distance setting device 11 is used to set the detection distance at which the ultrasonic transducers z ₁ to zm transmit and receive ultrasonic pulses for detection. When they match, comparison circuit 1
Output pulses are sent from 2. The flip-flop 8 is set by the output pulse.

Therefore, as shown in FIG. 3a, when the output pulse _A1 is sent out from the x-axis counter 5, the flip-flop 8 is reset and the distance counter 10 starts counting at the same time as the transmitter 1 sends out the transmission pulse. do. When the counted value of the distance counter 10 matches the set value of the detection distance setting device 11, _the matching pulse _B1 shown in FIG. is set. When the flip-flop 8 is set, the Q output is inverted to a high level and the pulse train of the clock pulse source 7 is sent from the gate circuit 6 to the x-axis counter 5. The x-axis counter 5 counts this pulse train, sends the counted value to the time series circuit 4, and sends out the output of the integrating circuit corresponding to the counted value from one of the integrating circuits ₃₁ to 3m. Therefore, the integration outputs of the integration circuits ₃₁ to 3m are sent out in time series from the time series circuit 4 in accordance with changes in the count value of the x-axis counter 5. Then, when the integrated outputs of the integrating circuit 3 ₁ to 3 m are sent out in sequence, the next output pulse A ₂ is sent out from the x-axis counter 5, and this output pulse causes the transmitter 1 to operate as described above again. to start.

Therefore, the x-axis counter 5 receives the signal from the gate circuit 6 as shown in FIG. Count the clock pulse trains sent out as shown in c.

The time series circuit 4 converts the integration outputs of the integration circuits 3 ₁ to 3 m into a time series in accordance with the counting operation of the x-axis counter 5 and sends it to the storage circuit 13 .

The memory circuit 13 has m memory addresses in the x-axis direction and n memory addresses in the y-axis direction, and each memory address has a storage capacity of i bits and stores the integrated outputs of the integrating circuits ₃₁ to 3m.

When the time series circuit 4 sends the integrated outputs of the integrating circuits 3 ₁ to 3 m to the memory circuit 13 , the address of the memory circuit 13 is specified by the x-axis counter 5 . Specify the address in the x-axis direction. Therefore, the time series output of the integrating circuit 3 ₁ to 3 m is x of the counting circuit 13.
It is stored in the corresponding numbered counting address of the axial storage address. Further, the storage address in the y-axis direction of the storage circuit 13 is specified by the y-axis counter 14. The y-axis counter 14 is composed of an n-ary subtraction counter,
Each time the output pulse (FIG. 3a) of the x-axis counter 5 is sent out, the count value decreases in order. Therefore, after the x-axis counter 5 stores the integrated outputs of the integrating circuits 3 ₁ to 3 m in the x-axis direction storage addresses, the storage circuit 13 stores the x-axis counter 5 when the count value of the y-axis counter 14 changes. When the next x-axis direction address is specified by the axis counter 5, the number of addresses is decreased by one address in the y-axis direction, and the x-axis direction address is specified.

Integration circuit 3 ₁ to 3 written in memory circuit 13
After the write address is specified by the x-axis counter 5 and the y-axis counter 14, the integrated output of m is
Axis scan counter 15, y-axis scan counter 16
The read address of the stored data is specified by .

The x-axis scanning counter 15 is composed of an m-ary counter, counts the pulse train of the clock pulse source 7, and reads out the memory address in the x-axis direction of the memory circuit 13 corresponding to the counted value. The x-axis scanning counter 15 sends an output pulse to the y-axis scanning counter 16 every time an address in the x-axis direction of the memory circuit 13 is specified.

The y-axis scanning counter 16 is composed of an n-ary counter, and the count value changes in order every time the output pulse of the x-axis scanning counter 15 is sent out. and,
The count value of the y-axis scanning counter 16 is calculated by the adding circuit 2.
3, it is added to the counted value of the y-axis counter 14, and the read address in the y-axis direction is designated by the added value. Note that the addition circuit 23 uses an n-ary register, and when the count value of the y-axis scanning counter 16 changes from 0 to (n-1), the addition value of the addition circuit 23 is equal to the count value i of the y-axis counter 14. Based on i, i+1, i+2...n-
It changes like 1, n, 0, 1, 2, . . . i-1.

In the above, switching between writing and reading of the memory circuit 13 is performed by the clock pulse train of the clock pulse source 7. The clock pulse train of the clock pulse source 7 is guided to the write/read switching terminal of the memory circuit 13, and switching between writing and reading is performed within one cycle period. For example, since a clock pulse train has high level sections and low level sections repeated at a constant ratio, writing is performed during the high level sections, and reading is performed during the low level sections. Furthermore, the pulse train of the clock pulse source 7 is also guided to the switching circuit 17, and a switching operation is performed in conjunction with the writing/reading switching of the memory circuit 13. That is, the switching circuit 17 guides the count values of the x-axis counter 5 and the y-axis counter 14 to the memory circuit 13 when the memory circuit 13 performs a write operation, and guides the counted values of the x-axis counter 5 and the y-axis counter 14 to the memory circuit 13 when the memory circuit 13 performs a read operation. The count value of 15 and the added value of the adder circuit 23 are sent from the switching circuit 17 to the storage circuit 13.

Therefore, the memory circuit 13 is the x-axis scanning counter 1
The storage address storage data corresponding to the count value of 5 and the addition value of the addition circuit 23 is read out. Then, the read stored data is converted into an analog signal by the D/A converter 18 and then sent to the display 19.

There are m displays 19 in the x-axis direction and n displays in the y-axis direction.
Pixel scanning is performed by a scanning circuit 20. The scanning circuit 20 performs pixel scanning in the x-axis direction based on the count value of the x-axis scanning counter 15, and performs pixel scanning in the y-axis direction using the y-axis direction scanning counter 16.
Performs axial pixel scanning. As a result, the stored data read from the storage circuit 13 is displayed on the display 19.
is displayed at the corresponding pixel address. That is, the storage address in the x-axis direction of the storage circuit 13 is displayed at the pixel address having the same number as the x-axis storage address, based on the count value of the x-axis scanning counter 15. On the other hand, the memory circuit 13
The y-axis storage address corresponding to the added value of the adder circuit 23 is read out from the y-axis storage address. This addition value is calculated by the y-axis scanning counter 16 as explained above.
When the count value of changes from 0 to (n-1),
It changes based on the count value i of the y-axis counter 14. Therefore, when the pixel addresses in the y-axis direction of the display device 19 are sequentially designated by the y-axis scanning counter 16 starting from address 0, the storage addresses in the y-axis direction of the memory circuit 13 are read out in order starting from address i. Furthermore, the y-axis counter 14 uses a subtraction counter, and during writing, the write address in the y-axis direction changes in the direction of decreasing address number. As a result, when the addition value of the addition circuit 23 changes in the addition direction from the current count value i of the y-axis counter 14, among the stored data at the storage address in the y-axis direction of the storage circuit 13, the stored data starts from the newest to the oldest. The data is read out and y on the display 19
The axial pixel addresses are displayed in order starting from address 0.

As a result of the above, the display 19 displays changes over time in the integrated outputs of the integrating circuits 3 ₁ to 3 m.

In the above, the counting circuits ₃₁ to 3m are the second
As shown in the figure, the received signals within a specific section are integrated from among the received signals returning from each direction.

The distance setting device 21 determines the specific section for integrating the received signal.
It is carried out by. In the distance setter 21, when the distance _r0 is set with the sea surface S as a reference, each of the integration circuits ₃₁ to 3m integrates the received signal from the depth _r0 to the seabed B. Alternatively, if the distance setter 21 sets the distance rb based on the seabed B, the distance from the seabed B is as shown in FIG.
Integrate the received signals within the range of rb.

Each of the integration circuits 3 ₁ to 3m is configured in the same way,
For example, it is configured as shown in FIG. 5 or 6.

In FIG. 5, the received signal of the i-th transducer zi among the ultrasonic transducers _z1 to zm in FIG. 1 is introduced to the input end Pi. After this received signal is amplified by an amplifier 101, it is sent to an A/D converter 10.
2. The A/D converter 102 converts the amplified received signal into a digital value and sends it out. Then, the converted digital value is delayed by a minute time in the delay circuit 103, and then added to the adder circuit 1.
You will be guided to 04.

On the other hand, the received signal amplified by the amplifier 101 is also guided to the seabed discriminator 105, where the seabed signal is detected from the received signal. The seabed discriminator 105 is the third
The seabed reflected wave Br is detected from the received signal shown in Figure d, and a detection pulse as shown in Figure 3e is sent out. This detection pulse e is led to the reset terminal of flip-flop 107 via OR circuit 106, and resets flip-flop 107. This signal 1
07 is set by the output pulse of the comparison circuit 113. The comparator circuit 113 compares the count value of the distance counter 10 (FIG. 1) derived from the terminal Tr and the converted value sent from the distance converter 114, and when the two values match, a coincidence pulse shown in FIG. 3f is generated. Send out.

The distance converter 114 converts the distance data r ₀ of the distance setting device 21 (FIG. 1) derived from the terminal R into distance data in the direction of transmitting and receiving the ultrasonic beam. That is, in Fig. 2, when the depth r ₀ is set, the transmitting/receiving beam Bi that transmits and receives waves in the θi direction
The detection distance li for detecting to depth r ₀ is expressed as li=r ₀ /cosθi. The distance converter 114 performs the above conversion using the directivity θi of the transmitted and received beam and the depth data r ₀ . This conversion can be performed using a read-only memory, for example. Since the directional azimuth θi of the transmitting/receiving beam is known in advance for each beam, the conversion distance li corresponding to the depth data r ₀ is written in advance, and the conversion can be performed by reading out the distance corresponding to the set depth r ₀ . Can be done.

Therefore, in FIG.
07, the set state continues from the time when the distance setting pulse f is sent out until the time when the seabed detection pulse e is sent out, as shown in FIG. 3g. In addition, flip-flop 1
The reset terminal 07 is connected to the comparator circuit 12 shown in FIG.
A coincidence pulse (FIG. 3b) is led from the terminal Ts through an OR circuit 106, and is reset by the coincidence pulse b when the seabed detection pulse e is not sent out.

Q output of flip-flop 107 (Figure 3g)
is sent to the gate circuit 108, making the input and output conductive during the set period of the flip-flop 107. Gate circuit 108 passes the divided pulse of frequency divider circuit 109 during its conduction period. Frequency divider circuit 1
09 sends out a clock pulse train guided to terminal CP.

The pulse train that has passed through the gate circuit 108 is led to a latch circuit 111 via a delay circuit 110, and the latch circuit 111 latches the added output of the adder circuit 104 every time a pulse wave is applied. Addition circuit 10
4 adds the digital value of the A/D converter 102 sent from the delay circuit 103 and the latch output of the latch circuit 112. And the latch circuit 11
2 latches the latch output of latch circuit 111 by the passing pulse of gate circuit 108 guided through delay circuits 113 and 110.

The latch circuits 111 and 112 have a first terminal connected to the terminal Tr.
The output pulse of the x-axis counter 5 shown in the figure (Figure 3 a)
Each time the latch value is applied, each latch value is reset. Then, during the gate conduction period in FIG. 3g, A/
A/D of the received signal sent from the D converter 102
The conversion output and the addition output of latch circuit 112 are latched by latch circuit 111, and the latch output of latch circuit 111 is latched by latch circuit 112. Therefore, the latch circuit 112 closes the A/D converter 10 every time a pulse wave is sent out from the gate circuit 108.
Since the latch value increases by an output value of 2, the data signals within the conduction period of the gate circuit 108 are integrated.

In the above, the delay time of the delay circuit 103 is set so that the submarine signal Br (Fig. 3 d) is not transmitted during the conduction period of the gate circuit 108 (Fig. 3 g), thereby preventing the reflection from the underwater detection object. Integrates only waves. Further, the delay circuit 110 delays the output pulse of the gate circuit 108 so that the latch circuit 111 latches the added value after the addition operation of the adder circuit 104 is completed. Furthermore, the delay circuit 113
delays the pulse wave sent out from the delay circuit 110 so that the latch circuit 112 performs the latching operation after the latching operation of the latch circuit 111 is completed.

Therefore, the latch circuit 112 is connected to the gate circuit 108.
After integrating the received signals during the conduction period (Fig. 3g), the integrated output is sent from the output terminal _P0 to the time series circuit 4 of Fig. 1.

FIG. 6 shows a specific example of integrating the received signals of objects to be detected within a certain distance rb from the seabed B, as shown in FIG. 4, and shows the same numbered objects or the same objects as in FIG. 5.

In FIG. 6, the A/D conversion output of the received signal sent out from the A/D converter 102 is
03 to the shift register 114. Shift register 114 shifts the input signal using a pulse train sent from frequency divider circuit 109. Then, the shifted signals, rb ₁ bit, rb ₂ bit, and rb ₃ bit output, are led to the changeover switch 115, and one of the shifted outputs is sent to the adder 104.

The changeover switch 114 selects one of the shift outputs according to the distance setting data led from the terminal R. For example, when the distance setting data is rb ₁ , rb ₁ bit shift output is selected, and when the distance setting data is rb ₂ , rb ₃ , rb ₂ bits, rb _{3 are} selected.
Each shift output selects a bit. In addition, terminal R
The distance setting data rb ₁ , rb ₂ , rb ₃ applied to
It is sent out from the distance setting device 21 in FIG. Therefore _, when integrating the received signals within a _certain distance rb based on the seabed _B as shown in FIG. Switch and send.

This distance data rb is sent from terminal R to changeover switch 115 in FIG. 6 and at the same time to comparison circuit 116. Comparison circuit 116 compares distance data rb and the count value of counter 117, and sends out an output pulse when both values become the same value. A counter 117 counts the output pulses of the frequency dividing circuit 109. Then, the frequency dividing circuit 109 sends out a pulse train with a period corresponding to a unit distance. Therefore, the comparison circuit 116 sends out an output pulse when the counter 117 reaches a value corresponding to the distance data at the terminal R. Further, the counter 117 is reset by the discrimination output of the seabed discriminator 105. As a result, the output pulse of the comparison circuit 116 is as shown in FIG.
As shown in f', it is sent out after a time equivalent to the set distance rb has elapsed after the appearance of the seabed detection pulse e'.

The output pulse f' of the comparator circuit 116 is sent to the OR circuit 11
8 to the reset terminal of flip-flop 107. The flip-flop 107 is set by the discrimination pulse e' of the seabed discriminator 105.
Therefore, as shown in FIG. 7g', the Q output of the flip-flop 107 remains at a high level for a time corresponding to the distance rb from the appearance of the seabed detection pulse e'. The gate circuit 108 is made conductive by this Q output g'. Therefore, the latch circuit 112 has a gate conduction period from the appearance of the seabed detection pulse e'.
The signal output sent from the shift register 114 is integrated into g'.

The bit outputs of rb ₁ , rb ₂ , and rb ₃ of the shift register 114 are as follows when the signal detection pulse e' is sent out.
Received signals at distances rb ₁ , rb ₂ , and rb ₃ from the seabed reflected wave Br′ are transmitted, respectively. Therefore, when the distance data of the terminal R is set to rb ₁ , the rb ₁ bit output of the shift register 114 is sent from the changeover switch 115, so the latch circuit 112 sets the distance rb ₁ based on the seabed detection pulse e'. The received signals within the range are integrated.

In the embodiment shown in FIG. 1, each of the integrating circuits 3 ₁ to 3 m is configured to integrate the received signals in a specific section with the seabed as a reference, but it is also possible to integrate the received signals over an arbitrary distance section. good. for example,
In FIG. 5, the flip-flop 107 is configured to remain set from the set depth until the bottom pulse is detected, but if the set state is maintained for a certain distance from the set depth, it is possible to integrate any distance section. Can be done. Then, by changing the display color on the display 19 according to the integrated depth region, the depth of the received signal can be known from the displayed image. Furthermore, in FIG. 1, each received signal of the ultrasonic transducers _z1 to zm is
The received signals of one section are integrated by one set of integration circuits, but the ultrasonic transducer z ₁
By using a plurality of sets of integration circuits corresponding to each of zm to zm, it is possible to integrate the received signals in a plurality of sections. By changing the display color for each section, received signals in different depth regions can be displayed and identified on a common display.

Furthermore, in FIG. 1, the integrating circuits 3 ₁ to 3 m are provided for each received signal of the ultrasonic transducers Z ₁ to Zm, but they are not necessarily provided for all received signals. It is not necessary and may be provided only for any desired ultrasonic transducer among _Z1 to Zm.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of this invention.
Figure 2 is a diagram to explain the detection operation, Figure 3
FIG. 4 is a waveform diagram for explaining the operation, FIG. 4 is a waveform diagram for explaining other detection operations, FIGS. 5 and 6 show specific examples of the integrating circuit, and FIG.
The figure shows a waveform diagram for explaining another detection operation.

Claims (1)

[Scope of Claims] 1. A transmitter that sequentially transmits ultrasonic pulses having fan-shaped directional characteristics toward the water bottom in both lateral directions with respect to the direction of travel of the own ship as the own ship advances; The reflected wave caused by the above ultrasonic pulse returning from
A receiver that separately receives waves with m reception beams having directivity in each direction divided into equal parts, and a reception signal determined in advance among the reception signals received by the m reception beams. an integrating circuit that separately integrates the reflected waves returning from the specified section in each of the first to m-th directions, and a memory address having an address m in the X-axis direction and an address n in the Y-axis direction, and The received signals in the first to mth directions received by the beam and integrated by the integration circuit are written to the corresponding address in the X-axis direction, and the X-axis writing address is set to the ultrasonic wave. A memory circuit that changes in the Y-axis direction every time a pulse is transmitted; a memory signal in the memory circuit is read out in synchronization with pixel scanning on a display screen; and the read memory signal is displayed at a corresponding pixel address on the display screen. A detection signal integration display device in a wide range underwater detection device comprising a display device.