JPH01500394A - Improved insensitivity to channel distortion of MAC signals - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] Improving MAC signal insensitivity to channel distortion (background of the invention) (Technical field) The present invention provides a clock regeneration signal and a DC regeneration signal during the horizontal blanking period of the video line. Channels of a multiplexed analog component television signal are transmitted independently. This invention relates to improving insensitivity to channel distortion. More specifically, the clock re- The raw signal and the DC reproduction signal are transmitted on independent lines.

(Background information) A typical line of a time division multiplexed analog component (MAC) television signal is As shown in the figure. the MAC television signal has a horizontal blanking interval (HBI) of 12; Screen information is not transmitted through this HB112, and the chrominance signal 14 and A luminance signal 16 follows, one of which is time compressed. Kuromi A guard is placed between the nonce signal and the luminance signal to help prevent interference between the two signals. There is a code band 18.

The acquisition of the MAC color television signal in Figure 1 is based on conventional luminance signals and chrominance signals. color (conventional NTSC or other composite color television signals) ), sample those signals, and then store them separately. It can be achieved by Luminance signal is sampled at the luminance sampling frequency image and then stored in the luminance storage. On the other hand, the chrominance signal sampled at the nonce sampling frequency and then stored in the chrominance storage. Stored. The luminance or chrominance sample is then Each is written to the memory at a separate sampling frequency, and the corresponding data is written at a higher frequency. The time is compressed by reading from the storage unit.

The multiplexer adjusts the luminance for readout at the appropriate time during the active line period. Select either the storage or chrominance storage and thus generate a number. If desired, audio samples can be transmitted into the HBI. good. These samples are multiplexed (and compressed) in the same way as video samples. The sample rate at which all samples appear in the multiplexed MAC signal is the MAC signal This is called the sampling frequency.

In all typical MAC signal transmissions, the reference clock frequency burst is also Transmitted during HBI. The reference burst is typically at the MAC sampling frequency. It is approximately 10 cycles of a constant amplitude sine wave, and includes clock recovery and DC recovery recovery (clamp). It is used in the receiver for Reference clock burst is used for clock recovery, while the average (rational) frequency of the reference clock burst is used for clock recovery. (ideally zero) is used for clamping. Accurate video signal dc after transmission The luminance (or Clamping to the pedestal value is extremely important. Kuromi obtained for transmission The nonce value is related to a constant reference brightness level that is represented by the DC level of the signal. subordinate Therefore, in order to accurately reconstruct the received signal on the display, the received signal must be converted to the above basis. It is necessary to compare it with the junior level. This reference level will be used as the DC regeneration value from now on. It is called.

There are several traditional methods of averaging reference clock bursts to obtain DC reproduction values. For example, receiver discriminator (Foster-Seeley or FM discriminator) If the position of the reference clock burst is not properly adjusted, the average value of the reference clock burst will be is not the ideal zero reference point of the reference clock burst; Low-pass filter clock bursts when large data spikes occur When ringing, data spikes cause interference and shift the DC level. Ru. Additionally, other distortions typically inherent to FM discriminators are such that the DC reproduction value When obtained by averaging the lock bursts, it does not introduce errors. Ru.

This error, sometimes referred to as chrominance/luminance intermodulation, is caused by misalignment. or the nonlinear distortions likely to be encountered especially in FM discriminators as a result of drift. be. This also applies to various bases, especially as a result of differences in circuit component value tolerances. Occurs in band video amplifiers. The test signal is particularly sensitive to distortion in the FM demodulator. It was expressed for the purpose of measurement. Reference: International Radio Consultative Committee, CCIR Recommendations and Reports on the Transmission of Long-Range Acoustic Broadcasting and Television Signals, Vol. ps, 13.20 (XVth Plkenary Assembly, Gene va 1982).

One way to solve this problem is to add a separate clock recovery signal to each transmission line. There is a method of providing a flow reproduction signal. Both reference clock burst and DC reproduction signal If both are 3 μs per line, then these two intervals are a typical 63° 5 μs line. This method is uneconomical, representing about 10% of the in. In other words, the bandwidth required for transmission is Not only does the bandwidth increase, but larger antenna reflectors and/or more expensive Since a low-noise amplifier is required, the signal-to-noise ratio also increases. DC reproduction values are obtained from the reference burst. The inherent problems in this case are not only due to the distortions typically inherent to FM discriminators; , also stems from the fact that the two values are unrelated. Therefore, the purpose of the present invention is to , the clock reproduction signal and the DC reproduction signal are transmitted independently of each other.

Another object of the invention is to transmit these values on separate lines.

According to the object of the invention, even if the clock recovery signal is not transmitted on each line, It has been determined that the integrity of the receiver system is not compromised. fact, Approximately the majority of transmission lines per frame are clocked for proper operation. There is no need for a playback signal to be present. Therefore, avoiding the problems inherent in the prior art is During a part of the horizontal blanking period of the This is done by transmitting the signals independently on separate lines. Clock regeneration signal and The clock recovery signal can be transmitted on alternate lines, or the clock recovery signal can be transmitted on each N line, whereas the DC reproduction signal can be transmitted on the line between them. be done.

(Brief explanation of the drawing) FIG. 1 is a diagram showing the amplitude versus time of one video line of the MAC signal. Figure 2 is M FIG. 3 is a diagram showing lines of an AC video signal. Required to reproduce the 3rd symbol and the DC reproduction signal Circuit configuration diagram.

(Description of preferred embodiments) Transmission and reproduction of clock reproduction signal and DC reproduction signal with reference to Figures 2 to 4 I will explain about it. As shown in Figure 2, the MAC video signal line is the horizontal retrace line. Erasure period (HBI) 21° Chrominance component 22. Guard band 23 and luminan A multiplexed analog component transmission system developed by the assignee of the present invention including indicated with reference to the system. As shown in Figure 3, the horizontal blanking period is guard band 34. and 35 constitute data segments 31°32.33. suitable In the example, the HBI has 47 4-level data for data segment 31. 20 4-level data symbols for symbols, data segments 32 , seven four-level data symbols for data segment 33, and each Consists of 78 symbols divided into 2 symbols for code band 34.35 do. The data segment 32 is a clock recovery signal depending on the transmission line in question. It is used to store either the signal or the DC reproduction signal. clock regeneration signal During the transmission period of , a data segment 32 having a duration of preferably about 2 μs is , includes a series of alternating minimum and maximum values of four-level data values, has constant amplitude, of a DC regenerated signal, representing a clock regenerated signal with a frequency of the AC sample frequency. During transmission, the data segment 32 is a 501RE (i.e., dynamic data segment containing 20 data symbols (exactly in the middle of the range) 31 and 33 are other data such as acoustic information and/or scramble information. including. Descriptions of these data segments 31.33 are both available in the art. These are well known and are not necessary for a full understanding of the present invention.

Referring to FIG. 4, as described above, the clock signal transmitted during the horizontal blanking period A circuit diagram of a receiver required for reproducing a reproduced signal and a DC reproduced signal will be explained.

In the preferred embodiment, the clock recovery signal is transmitted every other line and the received B - The MAC signal is input on line 41. The N-divided counter 42 preferably has two divided counters. counter, reset according to field rate reset pulse, clocked by the in frequency fn. The output of the counter 42 is an AND game) 43.44 by concatenating one of the two inputs to Q and Q, respectively. They are enabled to operate in a more mutually exclusive manner.

The other input to AND gate 43.44 is the keying pulse on line 45. Ru. This pulse is issued during data segment 32 (Figure 3) during the horizontal blanking period. the duration of the data segment of 20 symbols, preferably about 2 μs has. Keying pulses are generated by a key pulse generator (not shown). Ru.

The construction of this key pulse generator will be obvious to those skilled in the art. first lie When a signal is received at input 41, the first line also receives the lock playback signal as described above. AND gate 43 is enabled and the clock recovery signal is The signal is a transmission gain signal to a phase-locked loop circuit (not shown) connected to line 47. can pass through route 46. During lines that occur alternately, AND gate 4 4 is enabled, resulting in transistor 48 being turned on and transmission gate 4 being enabled. The 501 RE signal generated by inputs fi 49a, 49b of 9 is on line 50. can pass through the system.

Note that the minimum and maximum voltage values connected to each of points 49a and 49b are the second It represents the minimum and maximum values of the four-path data included in the transmission line in the figure.

Preferred implementations related to the transmission of clock recovery signals and DC recovery signals on alternating lines Although the example has been explained, the clock reproduction signal is transmitted every two lines, and the DC reproduction signal is transmitted every two lines. It is also possible to transmit during that time. In this type of implementation, an N-divided counter 42 is replaced with a 3-division counter, and the reset pulse of the counter is a frame pulse. Rate reset pulse (i.e. reset on line 1 of each field) become.

Furthermore, assuming that the number (N+1) is an integer multiple of the number of lines per frame, The reset pulse to clock counter 42 is preferably adjusted to match the frame rate. A clock recovery signal can also be transmitted on every Nth line as a reset pulse. It is possible. In addition, the DC reproduction signal is transmitted on every Nth line, and the clock reproduction signal is It is also possible to transmit between them.

Although exemplary embodiments of the invention have been described in detail with reference to the accompanying drawings, the invention may be It is to be understood that the scope or spirit of the invention is not limited to the embodiments of the invention. Various changes or modifications can be made by those skilled in the art without departing from the above.

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Claims (15)

[Claims] 1. A luminance component, a chrominance component, and a clock reproduction signal or DC reproduction signal. Time division multiplexing with lines containing horizontal blanking periods containing either side of the raw signal transmitting multiple lines of the video signal in a converted analog component video signal. A method of the horizontal blanking period is a first line of the video signal that includes the clock recovery signal; the horizontal blanking period includes the DC reproduction signal; transmitting N consecutive lines of video signals. 2. (N+1) is an integer multiple of the number of lines per frame of the video system A method according to claim 1, characterized in that: 3. Method according to claim 1, characterized in that N=1. 4. 2. Method according to claim 1, characterized in that N=2. 5. A claim characterized in that the DC reproduction signal is a signal corresponding to 50 IRE. The method described in Section 1. 6. (N+1) is an integer multiple of the number of lines per frame of the video system The method according to claim 5, characterized in that: 7. 6. Method according to claim 5, characterized in that N=1. 8. 6. Method according to claim 5, characterized in that N=2. 9. A clock recovery signal that is transmitted during a predetermined portion of the horizontal blanking period of each line. of a time-division multiplexed analog component video signal with a signal or a DC reproduction signal. In a video signal receiver that receives multiple lines, the clock recovery signal and the DC recovery signal are A device for recovering the raw signal is has a timing and duration corresponding to a predetermined portion of the horizontal blanking period for each line. first pulse generating means for generating a first enable pulse to comprising first and second output ports and having a duration corresponding to the transmission line time. A second enable pulse is generated to enable the first and second enable pulses after every N line time duration. a second output port that alternately outputs the second enable pulse at a second output port; a pulse output means; the first enable signal and the second enable signal at the first output port; said first pulse generating means for outputting a first gate signal during coincidence with a pulse signal; a first coincidence gate coupled to the first output port of the second pulse generating means; a gate and coupled to said first coincidence gate for receiving a transmitted video line. , and a first gate outputting a portion of the video line corresponding to the first gate signal. the first enable signal at the second output port and the first enable signal at the second output port; said first gate signal to output a second gate signal during coincidence with the second enable signal. coupled to the pulse generating means and the second output port of the second pulse generating means; a second matching gate, 50 IRE signals corresponding to the duration of the second gate signal. a second gate means coupled to the second coincidence gate; A device equipped with 10. 10. Device according to claim 9, characterized in that N=1. 11. 10. Device according to claim 9, characterized in that N=2. 12. (N+1) is an integer multiple of the number of lines per frame of the video system. 10. The device according to claim 9, characterized in that: 13. characterized in that a transmission video line is received at said second gating means. 10. The apparatus according to claim 9. 14. the video signal corresponding to the gate signal output from the first gate means; 10. The device according to claim 9, wherein the O line portion is a clock recovery signal. Place. 15. the duration of the second gate signal output from the second gate means; Claim 9, wherein the corresponding 50IRE signal is a DC reproduction signal. equipment.