WO1985003609A1 - Zero crossing switching modulation systems and methods - Google Patents

Zero crossing switching modulation systems and methods Download PDF

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Publication number
WO1985003609A1
WO1985003609A1 PCT/US1985/000165 US8500165W WO8503609A1 WO 1985003609 A1 WO1985003609 A1 WO 1985003609A1 US 8500165 W US8500165 W US 8500165W WO 8503609 A1 WO8503609 A1 WO 8503609A1
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output
input
register
voltage
bits
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PCT/US1985/000165
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French (fr)
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Leon C. Webb
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Webb Leon C
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B14/00Transmission systems not characterised by the medium used for transmission
    • H04B14/002Transmission systems not characterised by the medium used for transmission characterised by the use of a carrier modulation
    • H04B14/006Angle modulation

Definitions

  • Modern communication systems are characterized by having a transmitter, a medium, and a receiver.
  • the medium may control the form of modulation and/or demodulation and the equipment used for particular kinds of communication.
  • voice telephone lines are quite low grade and, as a result, permit only modulation and demodulation systems used with narrow bandwidth signal communication.
  • amplitude modulation AM
  • phase modulation PM
  • frequency modulation FM
  • quadrature amplitude modulation QAM
  • FSK Frequency shift key modulaction
  • a patent teaching a demodulator for FSK modulation is United States Patent 3,801,918 issued to D. T. Milne et al. FSK modulation is not taught, per se; rather, the patent teaches a demodulator with low phase shift which uses zero crossing signals to provide a command pulse which is used to generate a second reset pulse.
  • the system is a sampling system where samples are taken to determine the digital wave shape.
  • Zero crossings are determined by the points where a signal passes through the long time average value, defined as the zero value. Therefore, the points where the speech signal passes this value are defined as zero-crossing points.
  • Zero crossing measurement is widely found in communication devices throughout the industry.
  • Prior art communication systems sample wave forms at least twice for information, i.e., at least at the beginning and the end with the known wave and, with an unknown wave, at the beginning, at the end and at least one other time to determine the wave shape.
  • United States Patent 4,057,836 issued to C.J. Munsey utilizes a system of storing and retreiving video information at slow and fast scan rates.
  • a counter of the appropriate speed provides a count used by an address selector to locate the video information signals in random access memory and to enable the address selector to indicate where the selected data is to be located in the memory.
  • Munsey converts his slow scan picture elements to FM on a regular time interval per pixel. The system could operate much faster in the asynchronous mode used by this invention.
  • United States Patent 4,099,202 issued L.F. Cavanaugh uses time-division, multiplexing in the transmission slow-scan of video and audio signals in a phone line.
  • the facsimile and security technologies have used real time T.V. and slow scan T.V. sparingly because of telephone line and video equipment costs. Finally, the T.V., facsimile and security industries have been handicapped by the costs of recording equipment and media.
  • Zero crossings are utilized in many portions of the communications equipment spectrum.
  • U.S. Patent 4,238,736 issued to F. M. Slay. This patent teaches a method for accomplishing peak limited bipolar signal voltages where the signal is processed as a running series of half waves, each of which is individually examined and dynamically controlled in amplitude.
  • the serially connected, multiple-sectioned, delay-line technique is used to derive control signals from operating the amplitude control function.
  • Zero-crossing switching circuits are used in obtaining the desired results.
  • This invention provides a new method of transmitting information which I call zero crossing switching (ZXS) which more than doubles transmission rates for a given bandwidth and broadcast power input.
  • ZXS zero crossing switching
  • the system of this invention operates at the analog equivalent of approximately 12,000 baud on an ordinary voice telephone line instead of 1200 digital baud.
  • Prior art communication systems sample wave forms at least twice for information, i.e., at least at the beginning and the end with a known wave and, with an unknown wave, at the beginning, the end, and at least one other time to determine wave shape.
  • known and unknown wave forms are sampled only once.
  • modulation and demodulation methods of this invention are quite stable and do not require many of the stabilization mechanisms found in the prior art.
  • Modulation and demodulation stability problems are affected by feedback, line noise (added signals), skewed outputs and lost signals. The occurrence of any one of these conditions imbalances the modulation/demodulation system and interferes with communications.
  • instabilities and a variety of solutions are mentioned quite frequently in the prior art. For examples, see U. S. Patents 3,801,918 issued to D.T. Milne, et al; 3,893,163 issued to J.H. Wessels, et al; 3,783,398 issued to B.H. Dann; 4,296,412 issued to J. Mastner; 3,284,567 issued to G.R.
  • the transmission signal is made up of "words" contained in single 360° cycles whose period is inversely proportional to the frequency, which is proportional to the input voltage which is proportional to the magnitude of the digital word output from memory for transmission purposes.
  • the reception mechanisms reverse the transmission mechanisms.
  • signal periods are proportional to the input voltages, which are proportional to the input.
  • the analog receiver mechanism reverses these steps to create the analog signal.
  • magnitude is defined as the base ten value of the binary numbers in a word.
  • the invention has utility in asynchronous analog communications. It is particularly useful where communication band widths are limited. Under equivalent comamunication conditions the invention can, in effect, more than double the channels available for TV, satellite communication, ham and commercial radio communication, computer-to-computer, governmental and other forms of communication.
  • the invention allows multiple transmission channels where formerly only a single channel was available, i.e., video and voice, through an ordinary voice telephone line. It also provides a basis for recording data in much greater densities on a given recording medium. For example, using the invention, slow scan TV-audio broadcast transmissions can be recorded on ordinary magnetic tape cassettes used for voice and music recording. Thus, it is now possible to make good electronic photographs and record them on such a cassette.
  • the invention also provides a basis for cheaper, faster facsimile systems using ordinary phone lines. GENERAL DISCUSSION OF THE DRAWINGS
  • Figure 1 depicts, in its simplest explanatory form, a diagram of the ZXS modulator.
  • Figure 2 teaches, in the same manner, a ZXS demodulator.
  • Figure 3 depicts a ZXS modulator operating from the input of an analog voltage rather than the digital voltage of Figs. 1 and 2.
  • Figure 4 depicts a block diagram of an asynchronous ZXS modulation system utilizing a digital input, set out with greater specificity.
  • Figure 5 depicts, in block diagram form, two asynchronous demodulation systems useful in this invention.
  • Figure 6 is a generalized block diagram of a modulator-demodulator utilized with a slow scan television and audio input with an output suitable for magnetic tape recorder and telephone transmission.
  • Figure 7 is the breakdown of the signal conversion section of Fig. 6 in block form.
  • Figure 8 is a breakdown of the timing and control unit of Fig. 6.
  • Figure 9 is a breakdown of the components of the telephone and tape recorder switching systems of Fig. 6 in block form.
  • Figure 10 sets out the detail of a slow scan television-audio telephone system with the capability of recording on and reading from magnetic memory and the further capability of teletype, facsimile, and modem operation.
  • Figure 11 sets out the timing and control coding for the operation of the system of Fig. 10.
  • Figure 12 sets out the input and output switching of the system of Fig. 10.
  • Figure 13 is a functional flow chart for the operations of the systems of Figs. 6 and 10.
  • a digital word of "n" bits is input into the zero crossing switching modulator 10 and a single analog sinusoid of FM information is transmitted. On transmission of the single sinusoid, the modulator sends a sync bit which requests the next word.
  • a pixel indicating a light magnitude word on a vidicon, CCD or the like is input into modulator 10 where it is converted to one sinusoid of a frequency which varies for each word.
  • the output is a continuous-phase, variable frequency output, i.e., the next cycle always begins at the zero crossing.
  • a sinusoid regardless of .the magnitude of the input word, always makes up one full modulated cycle. The frequency of each cycle corresponds to the information input in a predetermined manner.
  • a ZXS modulator encoded FM cycle i.e., sinusoid
  • ZXS demodulator 11 passes through the demodulator 11 and is converted into a digital output word proportional to the frequency of the received sinusoid. Additionally, ZXS demodulator 11 broadcasts a strobe output signifying the beginning of the next sinusoid.
  • Asynchronous modulator 10 operates when sample-and-hold 12 receives a variable voltage input which is converted into an FM output by voltage-to-frequency converter 13.
  • the FM output passes through buffer 14 if desired (as indicated by the use of brackets) into transmitter 15.
  • Transmitter 15 may be a radio frequency, microwave, laser, or other standard transmitter or a solid link, i.e., fiber optics, telephone lines, or a metallic link.
  • a portion of the FM output also passes through comparator 16 and digitial differentiator 17 to provide the "sync" bit needed to request the next bit for sample-and-hold unit 12.
  • This asychronous ZXS modulator is adapted for slow scan T.V. and video transmission over voice-quality telephone lines.
  • a black and white video output is created by converting the sinusoidal wave forms received from a slow-scan video input 20 into a scale such as the one shown.
  • Analog information received from video input 20 is stored in memory 21 and output in 6-bit words.
  • a word and a transmitting sync bit are introduced to register 22.
  • register 22 sequentially dumps each word into the digital-to-analog converter 23 where a transmitted base band slow scan video signal or other carrier is introduced to form a one cycle per word analog signal.
  • the voltage (amplitude) of the word is then converted into frequency by the voltage-to-frequency converter 24.
  • the frequency-modulated signal is transmitted as indicated and a portion is output to comparator 25 for zero crossings measurement.
  • the output of comparator 25 clocks register 22 to establish a phase lock loop. This signal also clocks address counter 26, driving address bus 27 and computer memory storage 21.
  • Figure 5 describes two demodulation schemes for the signals output by a system utilizing the modulation mechanism of Figure 4.
  • Each cycle of information representing a word is input into comparator 27 where it is combined with a phase correction bit and output as a variable, more squared wave, into one shots 28 and 29 generating delayed pulses into integrator 30 (shown by the dashed lines).
  • the integrated signal then outputs into track-and-hold unit 31.
  • An output signal taken from a point between one shots 28 and 29 provides a sample pulse for track-and-hold unit 31 which outputs one analog voltage level per input word.
  • the output of comparator 27 drives counter 34 where an enabling pulse and a reset pulse are combined with the output of a high frequency clock and fed into a second counter 35.
  • Counter 35 puts out a 7-bit word which passes into register 36.
  • Register 36 separates the word into a digital word containing six bits for input into memory and a sync level detector bit.
  • One output of counter 34 syncs through latch 37 and subsequently register 36 and provides a clock for the received zero crossings.
  • FIG. 6 is a block diagram of a slow scan video-phone system which can be used for a variety of other purposes.
  • the components of the system are more fully described in Figures 7, 8 and 9.
  • the system shown is made up of color or black and white video input section 38, conversion section 39, telephone and tape recorder switching systems 40, timing and control (TAC) unit 41, and memory 42.
  • Video input section 38 and the telephone and tape recorder switching systems 40 are conventional. If the phone hook up circuitry is eliminated the system functions as an electronic camera and recorder. It can serve as all or a part of home and industrial security systems, either with or without the phone output. If another input, for example, a digital output of a scientific or other instrument, is substituted for the video camera, a high data volume data recording system is created which can be used either with or without the phone equipment.
  • Figure 7 is a block diagram of conversion section 39.
  • a sinusoidal signal from video 38 is input into track-and-hold 43, for predetermined periods of time. It provides a sampled analog voltage-to-digital converter 44 which outputs six bits per pixel to tristater 45 which acts as a digital buffer and, in turn, outputs a signal to 6-bit data bus 46.
  • the data bus 46 connects with latch 47 which outputs a 6-bit word to digital-to-analog converter 48 which outputs an analog voltage to summer 49.
  • Surmier 49 combines a sync bit from transmit sync unit 50 with the six bits from digital-to-analog converter 48 and feeds the 7-bit digital word into voltage-to-frequency converter 51 where the 7-bit word is converted to one cycle of frequency representing the 6-bit word.
  • the single cycle sinusoid is passed into band pass filter 52 which eliminates out-of-band frequencies in the signal.
  • the filtered signal is then introduced into the telephone and tape recorder switching systems 53.
  • Incoming signals pass through telephone and tape recorder switching systems 53, pass through comparator 54 and enter TAC 41 (Figs. 6 and 8) through the transmitter zero crossings signal path.
  • Signals from telephone and tape recorder switching systems 53 also pass through, respectively, band pass filter 55 and line 56 into analog multiplexer (MUX) 57.
  • the signal from MUX 57 is introduced into comparator 58 and thence into TAC 41 through the received zero crossing's signal path.
  • a signal from comparator 58 passes into frequency-to-voltage converter 59 where it is reconverted into a sampled analog voltage and then passed into analog-to-digital converter 60 to form six digital bits which are then output into 6-bit data bus 46.
  • Output from bus 46 is introduced into latch 61, a series of flip flops.
  • the 6-bit output of latch 61 is introduced into digital-to-analog converter 62 where a single analog word is formed which outputs to sunnier 63 along with a pulse from sync pulse generator 64.
  • the sync pulses provide blanking during the return of the video signal to the left margin of the frame.
  • FIG. 8 is a block diagram of TAC unit 41 with its various inputs and outputs.
  • the TAC unit can be switched to any mode by using the "to" mode and “from” mode switches 65 and 66. It also has stop-start switch 66 and single/continuous mode switch 67.
  • Figure 9 is a blopk diagram of memory section 42.
  • Memory section 42 is made up of a 16 bit slow access counter 69 which receives information relative to the frames and lines from the video input unit 38. It outputs a 16-bit word into MUX 70 where "cycle stealing" occurs, i.e., the slow access counter's output address is momentarily substituted for the sequential video counter's output address, enabling the slow address counter to have access to the memory's address bus.
  • Sixteen-bit video counter 71 inputs a 16-bit word into MUX unit 70 which is supplied a single bit sync (memory access) signal from TAC 41.
  • MUX unit 70 multiplexes the signals and provides its 16-bit multiplexed output into the address bus of the transmit and receive memory 72 which outputs data onto 6-bit data bus 46.
  • the transmit and receive memory contains six 64K dynamic RAM memory chips.
  • the clock function for the system is provided by an accurate crystal oscillator or other equally accurate clock. Additional data regarding the switching system is set out in the discussion of Figure 10.
  • FIG. 10 is a diagram of another form of a system of this invention utilizing a single microprocessor.
  • Video-audio input 75 made up of lens, CCD or vidicon, motor switch, lens and CCD positioner, and ancillary electronics outputs to analog-to-digital converter 74.
  • the signal is standard for a slow scan T.V. input.
  • the analog-to-digital converter 74 outputs n-bits digital which drive microcomputer 75 to input into n-bit data bus 76.
  • Microcomputer 75 has the indicated inputs and outputs.
  • the cam input is a part of the lens and CCD positioner of video input 73 and actuates a microswitch to signal microcomputer 75 on the completion of the scan of each picture.
  • the microcomputer operates, when programmed, with read-only memory 77.
  • n-bit words from analog-to-digital converter 74 travel along data bus 76 to memory section 78 where the signal is input into the dynamic RAM 79 containing the addresses of the horizontal and vertical pixels.
  • Microcomputer 75 provides the slow-memory access control 80 with signals for the operation of address selection MUX 81 which provides an input signal to one of twp row and column MUXs 82. These MUXs are n-bit+2 bits wide. MUXs 82 receive sync bits from T.V. sync bit generator 83.
  • Video control 83 provides the necessary standard control signals for MUX 81.
  • Video control 83 is driven by T.V. sync generator 91 which provides all specification signals, video blanking, sync, vertical and horizontal blanking, and other components to provide R.S. 170 composite video.
  • the sync signal from T.V. sync generator 91 inputs into video pixel sync unit 85, and to video counter 86 thereby syncing the system through output from video counter 86 into MUX 81.
  • RAS CAS generator 84 is synced by the timing circuits 87 (made up of crystal oscillator 88 and downcounter 89.
  • Timing circuits 87 provide clocking signals to properly time the various activities of the system and to activate RAS and CAS generator 84 which provides input to the DRAM 79 of memory section 78.
  • Latches 90 synchronize the RAS and CAS pixel generation timing with the T.V. sync generator 91.
  • T.V. sync generator signals and blanking signals are output to analog gates 92 and output to T.V. screens, monitors, etc.
  • Microcomputer 75 provides a transmit sync signal which is introduced into ZXS modulator/demodulator 92 which is made up of a bi-directional set of 6- and 8-bit latches 93, a tristate chopper 94, a voltage frequency converter 95, and a comparator 96.
  • the ZXS modulator operates by having an n-bit word to be transmitted on n-bit data bus 76 into a smaller latch and subsequently input into the larger latch of latches 93.
  • the latch 93 output is the original n-bit plus an additional transmitter sync bit and a white pixel command bit which is passed through the tristate and chopper 94 to establish the analog voltages proportional to sync black, white and the gray scales between black and white.
  • the output of the tristate and chopper 94 to the voltage-to-frequency converter 95 provides the sinusoidal "word" which is the FM to be broadcast. This FM cycle passes into microcomputer 75 through either the transmit or phone. It outputs to the switching network 97.
  • Switching network 97 routes analog signals from their sources to their intended destination and this result is accomplished by seven (shown) analog gates for use (for purposes of this invention) with a conventional 6-bit system. Additional bits totaling n+1 must be provided where a greater or lesser number of bits are being utilized in the transmission scheme.
  • the analog gates shown are, respectively; transmit mode 98, phone to memory 99, tape to memory 100, memory to tape 101, phone to tape 102, memory to phone 103, and tape to phone 104.
  • Gates 101 and 102 output through the mike jack of a recorder and the earjack of a recorder inputs through the filter 105 to analog gate 104 which outputs to phone band pass filter 106 for the telephone circuitry.
  • Band pass filters 105 and 106 eliminate frequencies which are out of the desired bandwidth.
  • Microcomputer 75 also provides signals, incoming and outgoing, for RS 232 interface 107 to teletype, facsimile, computer digitizer, and other machines through which transmissions are made. This provides a means for the microcomputer to send and receive signals to any other computer-based devices.
  • Figure 11 sets out the time and control coding for the system of Fig. 10 when used in a standard 8-bit system.
  • FIG. 12 details the timing and control unit input and output switching for the system of Fig. 10 in an 8-bit configuration.
  • Timing aid control unit is made up of switching unit 107 which is controlled by logic switching circuit unit 108.
  • the inputs and outputs of asynchronous logic controls unit 109 complete the description of the embodiment of Fig. 10 in the 8-bit standard unit mode.
  • the modulators/demodulators of this invention are intended to use the standard interfaces, protocols, i.e., "handshakes” or “echo-backs”; auto-calls, auto-answering, self-testing or diagnostic features, dial back-up, multiple speed selection, and other features of the prior art.
  • the terms used in the description of the invention are varied to indicate that a variety of components can be utilized to arrive at the results Obtained by the modulation/demodulation system. While terms having specific meanings are utilized in describing the invention, it is intended that the terms of description be defined in the generic context when utilized in the claims.
  • a register can be a standard "register”, a “sample-and-hold”, a “track-and-hold”, or other means utilized in the industry which serve the purpose of a "register.”
  • data includes linear or other format digital form and data in sinusoidal, i.e. analog, form.
  • bits includes a singular or plurality of information making up “words”.
  • words means a group of a predetermined number (n) of "bits” of information utilized in a modulator or demodulator of this invention.
  • buffer is a taped or "bucket brigade” or other analog storage means when pertaining to analog data storage.

Abstract

Zero crossing switching modulation systems are used in television, facsimile, modem and teletype transmission through voice phone lines; recording on voice quality media, i.e., magnetic tapes; electronic cameras, security systems and instrumentation. The transmission signal period is inversely proportional to the frequency, which is proportional to the input voltage which is proportional to the magnitude of the digital word output from memory for transmission purposes. Under equivalent communication conditions the invention can, in effect, more than double the channels available for TV, satellite communication, ham and commercial radio communication, computer-to-computer, governmental and other forms of communication. When viewed from another aspect, the invention allows multiple transmission channels where formerly only a single channel was available, i.e. video and voice, through an ordinary voice telephone line. It also provides a basis for recording data in much greater densities on a given recording medium. An asynchronous modulator operates when a register (22) receives a variable voltage input which is converted into an FM output by a voltage-to-frequency converter (24). The FM output passes into a transmitter. A portion of the FM output also passes through a comparator (25) and digital differentiator to provide a "synch" bit needed to request the next bit for the sample-and-hold unit.

Description

ZERO CROSSING SWITCHING MODULATION SYSTEMS AND METHODS
This application is a continuation-in-part of U.S. Serial No. 06/575,906 filed February 1, 1984 and U.S. Serial No. 06/614/682 filed May 29, 1984.
BACKGROUND OF THE INVENTION Modern communication systems are characterized by having a transmitter, a medium, and a receiver. The medium may control the form of modulation and/or demodulation and the equipment used for particular kinds of communication. Thus, voice telephone lines are quite low grade and, as a result, permit only modulation and demodulation systems used with narrow bandwidth signal communication.
Among the better known modulation mechanisms are amplitude modulation (AM), phase modulation (PM), and frequency modulation (FM). There are variations on these various generic modulation schemes. Thus, quadrature amplitude modulation (QAM) combines amplitude and phase modulation to achieve increased data transmission. Frequency shift key modulaction (FSK), a variety of frequency modulation, is used for low speed, asynchronous transmission. A patent teaching a demodulator for FSK modulation is United States Patent 3,801,918 issued to D. T. Milne et al. FSK modulation is not taught, per se; rather, the patent teaches a demodulator with low phase shift which uses zero crossing signals to provide a command pulse which is used to generate a second reset pulse. Basically, the system is a sampling system where samples are taken to determine the digital wave shape. Zero crossings are determined by the points where a signal passes through the long time average value, defined as the zero value. Therefore, the points where the speech signal passes this value are defined as zero-crossing points.
Other patents teaching zero crossing systems include U.S.P. 3,491,305 issued to R.B. Stone; U.S.P. 3,581,220 issued to A. J. Bell et al; U.S.P. 3,876,945 issued to D. Gossel; and U.S.P. 4,429,406 issued to J.M. Hale. The first two of these patents relate to demodulators and, the third to a means of suppressing interference in FM receivers. The fourth provides a mechanism for checking the synchronization of data signals having a power vs. a frequency spectrum with two side bands and assembled frequency.
Zero crossing measurement is widely found in communication devices throughout the industry. Prior art communication systems sample wave forms at least twice for information, i.e., at least at the beginning and the end with the known wave and, with an unknown wave, at the beginning, at the end and at least one other time to determine the wave shape.
High speed modems, facsimile machines, T.V. broadcasts and tape recording are all limited to special phone lines. The following paragraphs address art which addresses the problems of the arts to which this invention pertains and are selected to provide those working with the concepts a good understanding of the systems and methods of the invention.
Kim Maxwell, "Byte", Dec. 1984, pp. 179-182, discusses the state of art with respect to modems and notes that 1200 baud modems are considered to be the maximum practical for ordinary voice phone lines although there is a decided need for much faster inexpensive systems. He discusses several mechanisms for improving modem transmission.
The Bell System pioneered the Picture-Phone in the 1950s and recently made another attempt at commercializing this device. Both failed. One of the problems inherent in the Bell system was that the television equipment, per se, was far too expensive for most users. The especially clean telephone lines which had to be dedicated to such transmissions were also expensive.
Single frame T.V., i.e., slow scan T.V. was originally developed by Copthorne MacDonald who thoroughly described the technology in QST magazine, August, 1958, 11-142; Sept. 1958, 31-40; April 1960, 36-40; Jan. 1961, 28-32; and Feb. 1961, 32-35. Other references to the slow scan and real time video methods are:
United States Patent 3,663,749 issued to M. R. Cannon. This patent uses digital sampling pulses which form a narrow band signal that may be recorded on magnetic tape or transmitted over telephone lines.
United States Patent 3,769,452 issued to R.F. Stone. Stone pseudo-randomly samples picture elements in a fast-scan, broad bandwidth video signal on a pseudo-random basis. Signals representative of the amplitude of the samples are transmitted over a narrowband channel to a receiver which is equipped with a pseudo-random gating system identical in its pattern selection and synchronized with the pseudo-random selection system in the transmitter. The synchronized gating system at the receiver reshapes the amplitude signal which has been "smeared" and applies it to a conventionally fast-scan cathode ray tube. Stone needs a long persistence screen to get an optimum picture. Slow scan systems need to be operable with conventional screens for inexpensive systems.
United States Patent 4,057,836 issued to C.J. Munsey, utilizes a system of storing and retreiving video information at slow and fast scan rates. A counter of the appropriate speed provides a count used by an address selector to locate the video information signals in random access memory and to enable the address selector to indicate where the selected data is to be located in the memory. Munsey converts his slow scan picture elements to FM on a regular time interval per pixel. The system could operate much faster in the asynchronous mode used by this invention.
United States Patent 4,099,202 issued L.F. Cavanaugh, uses time-division, multiplexing in the transmission slow-scan of video and audio signals in a phone line.
United States Patent 4,400,717 issued to G.R. Southworth et al, teaches a color slow-scan video system. The video signal is digitized, written into a conventional memory and read out of memory through a digital-to-analog converter at a rate suitable for transmission in a given medium. The procedure is reversed for demodulation of received signals.
U.S. Patents 2,911,207 issued to M.N. Barwick; 3,581,220 issued to A.J. Bell; and 3,859,459 issued to H.P. Ford deal with problems in facsimile transmission. U.S. Patents 3,783,398 issued to B.H. Dann; and 3,919,641 issued to A. Kurokawa et al address problems of T.V. recordings.
The facsimile and security technologies have used real time T.V. and slow scan T.V. sparingly because of telephone line and video equipment costs. Finally, the T.V., facsimile and security industries have been handicapped by the costs of recording equipment and media.
Electronic photography is becoming more practical because of the solid state charge coupled devices (CCD) and newer modulation and storage techniques, but a cheaper technology is needed for a more rapid impact on the home market.
Another aspect of zero crossing is found in U.S. Patent 3,528,011 issued to R. E. Anderson. Anderson seeks the same objective as Applicant in that both seek to broadcast a maximum amount of information with a minimum power input so as to achieve maximum efficiency within the contraints of the Shannon-Hartley theorem, which defines the parameters of information transmission through a particular medium and the Nyquist theorem which enables those skilled in the art to calculate the parameters of an information system's stability. Anderson digitizes an input speech signal by developing time sequential pulses representative of the zero positions of the input speech signals.
Zero crossings are utilized in many portions of the communications equipment spectrum. For example, U.S. Patent 4,238,736 issued to F. M. Slay. This patent teaches a method for accomplishing peak limited bipolar signal voltages where the signal is processed as a running series of half waves, each of which is individually examined and dynamically controlled in amplitude. The serially connected, multiple-sectioned, delay-line technique is used to derive control signals from operating the amplitude control function. Zero-crossing switching circuits are used in obtaining the desired results.
This invention provides a new method of transmitting information which I call zero crossing switching (ZXS) which more than doubles transmission rates for a given bandwidth and broadcast power input. Thus, the system of this invention operates at the analog equivalent of approximately 12,000 baud on an ordinary voice telephone line instead of 1200 digital baud.
Prior art communication systems sample wave forms at least twice for information, i.e., at least at the beginning and the end with a known wave and, with an unknown wave, at the beginning, the end, and at least one other time to determine wave shape. In the methods and mechanisms of this invention, known and unknown wave forms are sampled only once.
The modulation and demodulation methods of this invention are quite stable and do not require many of the stabilization mechanisms found in the prior art. Modulation and demodulation stability problems are affected by feedback, line noise (added signals), skewed outputs and lost signals. The occurrence of any one of these conditions imbalances the modulation/demodulation system and interferes with communications. These instabilities and a variety of solutions are mentioned quite frequently in the prior art. For examples, see U. S. Patents 3,801,918 issued to D.T. Milne, et al; 3,893,163 issued to J.H. Wessels, et al; 3,783,398 issued to B.H. Dann; 4,296,412 issued to J. Mastner; 3,284,567 issued to G.R. Southworth; 3,581,220 issued to A.J. Bell, et al; and 4,477,845 issued to C.E. Mortlock, et al. Milne, Wessels, Dann and Mastner are concerned with non-linearity and differential gain problems which cause errors in the signal. Southworth and Bell concern themselves with the problem of line noise. C.E. Mortlock concerns himself with the matter of skewed outputs. This invention avoids these problems in a very simple manner. SUMMARY OF THE INVENTION In the transmission and reception of signals using the methods and mechanisms of this invention, the transmission signal is made up of "words" contained in single 360° cycles whose period is inversely proportional to the frequency, which is proportional to the input voltage which is proportional to the magnitude of the digital word output from memory for transmission purposes. The reception mechanisms reverse the transmission mechanisms. In transmitting analog voltage signals, signal periods are proportional to the input voltages, which are proportional to the input. The analog receiver mechanism reverses these steps to create the analog signal. The term "magnitude" is defined as the base ten value of the binary numbers in a word.
UTILITY OF THE INVENTION The invention has utility in asynchronous analog communications. It is particularly useful where communication band widths are limited. Under equivalent comamunication conditions the invention can, in effect, more than double the channels available for TV, satellite communication, ham and commercial radio communication, computer-to-computer, governmental and other forms of communication. When viewed from another aspect, the invention allows multiple transmission channels where formerly only a single channel was available, i.e., video and voice, through an ordinary voice telephone line. It also provides a basis for recording data in much greater densities on a given recording medium. For example, using the invention, slow scan TV-audio broadcast transmissions can be recorded on ordinary magnetic tape cassettes used for voice and music recording. Thus, it is now possible to make good electronic photographs and record them on such a cassette. Obviously, the invention also provides a basis for cheaper, faster facsimile systems using ordinary phone lines. GENERAL DISCUSSION OF THE DRAWINGS
Figure 1 depicts, in its simplest explanatory form, a diagram of the ZXS modulator.
Figure 2 teaches, in the same manner, a ZXS demodulator.
Figure 3 depicts a ZXS modulator operating from the input of an analog voltage rather than the digital voltage of Figs. 1 and 2.
Figure 4 depicts a block diagram of an asynchronous ZXS modulation system utilizing a digital input, set out with greater specificity.
Figure 5 depicts, in block diagram form, two asynchronous demodulation systems useful in this invention.
Figure 6 is a generalized block diagram of a modulator-demodulator utilized with a slow scan television and audio input with an output suitable for magnetic tape recorder and telephone transmission.
Figure 7 is the breakdown of the signal conversion section of Fig. 6 in block form.
Figure 8 is a breakdown of the timing and control unit of Fig. 6.
Figure 9 is a breakdown of the components of the telephone and tape recorder switching systems of Fig. 6 in block form.
Figure 10 sets out the detail of a slow scan television-audio telephone system with the capability of recording on and reading from magnetic memory and the further capability of teletype, facsimile, and modem operation.
Figure 11 sets out the timing and control coding for the operation of the system of Fig. 10.
Figure 12 sets out the input and output switching of the system of Fig. 10.
Figure 13 is a functional flow chart for the operations of the systems of Figs. 6 and 10.
The following discussion teaches the invention from the general to the specific. Modulation and demodulation diagrams are set out. Then, various facets of the invention are taught in a specific system using both the transmission and the reception system in a combination of devices.
DESCRIPTION OF THE PREFERRED EMBODIMENTS Figure 1. In the modulator, a digital word of "n" bits is input into the zero crossing switching modulator 10 and a single analog sinusoid of FM information is transmitted. On transmission of the single sinusoid, the modulator sends a sync bit which requests the next word. For example, a pixel indicating a light magnitude word on a vidicon, CCD or the like, is input into modulator 10 where it is converted to one sinusoid of a frequency which varies for each word. Where a number of pixels are introduced into ZXS modulator 10, the output is a continuous-phase, variable frequency output, i.e., the next cycle always begins at the zero crossing. Further, a sinusoid, regardless of .the magnitude of the input word, always makes up one full modulated cycle. The frequency of each cycle corresponds to the information input in a predetermined manner.
Figure 2. In demodulator 11, a ZXS modulator encoded FM cycle, i.e., sinusoid, is received, passes through the demodulator 11 and is converted into a digital output word proportional to the frequency of the received sinusoid. Additionally, ZXS demodulator 11 broadcasts a strobe output signifying the beginning of the next sinusoid.
Figure 3. Asynchronous modulator 10 operates when sample-and-hold 12 receives a variable voltage input which is converted into an FM output by voltage-to-frequency converter 13. The FM output passes through buffer 14 if desired (as indicated by the use of brackets) into transmitter 15. Transmitter 15 may be a radio frequency, microwave, laser, or other standard transmitter or a solid link, i.e., fiber optics, telephone lines, or a metallic link. A portion of the FM output also passes through comparator 16 and digitial differentiator 17 to provide the "sync" bit needed to request the next bit for sample-and-hold unit 12. Figure 4. This asychronous ZXS modulator is adapted for slow scan T.V. and video transmission over voice-quality telephone lines. A black and white video output is created by converting the sinusoidal wave forms received from a slow-scan video input 20 into a scale such as the one shown. Analog information received from video input 20 is stored in memory 21 and output in 6-bit words. A word and a transmitting sync bit are introduced to register 22. Using the transmitted sync pulse, register 22 sequentially dumps each word into the digital-to-analog converter 23 where a transmitted base band slow scan video signal or other carrier is introduced to form a one cycle per word analog signal. The voltage (amplitude) of the word is then converted into frequency by the voltage-to-frequency converter 24. The frequency-modulated signal is transmitted as indicated and a portion is output to comparator 25 for zero crossings measurement. The output of comparator 25 clocks register 22 to establish a phase lock loop. This signal also clocks address counter 26, driving address bus 27 and computer memory storage 21.
Figure 5 describes two demodulation schemes for the signals output by a system utilizing the modulation mechanism of Figure 4. Each cycle of information representing a word is input into comparator 27 where it is combined with a phase correction bit and output as a variable, more squared wave, into one shots 28 and 29 generating delayed pulses into integrator 30 (shown by the dashed lines). The integrated signal then outputs into track-and-hold unit 31. An output signal taken from a point between one shots 28 and 29 provides a sample pulse for track-and-hold unit 31 which outputs one analog voltage level per input word.
In the second mode, the output of comparator 27 drives counter 34 where an enabling pulse and a reset pulse are combined with the output of a high frequency clock and fed into a second counter 35. Counter 35 puts out a 7-bit word which passes into register 36. Register 36 separates the word into a digital word containing six bits for input into memory and a sync level detector bit. One output of counter 34 syncs through latch 37 and subsequently register 36 and provides a clock for the received zero crossings.
Figure 6 is a block diagram of a slow scan video-phone system which can be used for a variety of other purposes. The components of the system are more fully described in Figures 7, 8 and 9. The system shown is made up of color or black and white video input section 38, conversion section 39, telephone and tape recorder switching systems 40, timing and control (TAC) unit 41, and memory 42. Video input section 38 and the telephone and tape recorder switching systems 40 are conventional. If the phone hook up circuitry is eliminated the system functions as an electronic camera and recorder. It can serve as all or a part of home and industrial security systems, either with or without the phone output. If another input, for example, a digital output of a scientific or other instrument, is substituted for the video camera, a high data volume data recording system is created which can be used either with or without the phone equipment.
Figure 7 is a block diagram of conversion section 39. Here a sinusoidal signal from video 38 is input into track-and-hold 43, for predetermined periods of time. It provides a sampled analog voltage-to-digital converter 44 which outputs six bits per pixel to tristater 45 which acts as a digital buffer and, in turn, outputs a signal to 6-bit data bus 46. The data bus 46 connects with latch 47 which outputs a 6-bit word to digital-to-analog converter 48 which outputs an analog voltage to summer 49. Surmier 49 combines a sync bit from transmit sync unit 50 with the six bits from digital-to-analog converter 48 and feeds the 7-bit digital word into voltage-to-frequency converter 51 where the 7-bit word is converted to one cycle of frequency representing the 6-bit word. The single cycle sinusoid is passed into band pass filter 52 which eliminates out-of-band frequencies in the signal. The filtered signal is then introduced into the telephone and tape recorder switching systems 53.
Incoming signals pass through telephone and tape recorder switching systems 53, pass through comparator 54 and enter TAC 41 (Figs. 6 and 8) through the transmitter zero crossings signal path. Signals from telephone and tape recorder switching systems 53 also pass through, respectively, band pass filter 55 and line 56 into analog multiplexer (MUX) 57. The signal from MUX 57 is introduced into comparator 58 and thence into TAC 41 through the received zero crossing's signal path. A signal from comparator 58 passes into frequency-to-voltage converter 59 where it is reconverted into a sampled analog voltage and then passed into analog-to-digital converter 60 to form six digital bits which are then output into 6-bit data bus 46. Output from bus 46 is introduced into latch 61, a series of flip flops. The 6-bit output of latch 61 is introduced into digital-to-analog converter 62 where a single analog word is formed which outputs to sunnier 63 along with a pulse from sync pulse generator 64. The sync pulses provide blanking during the return of the video signal to the left margin of the frame.
Figure 8 is a block diagram of TAC unit 41 with its various inputs and outputs. The TAC unit can be switched to any mode by using the "to" mode and "from" mode switches 65 and 66. It also has stop-start switch 66 and single/continuous mode switch 67.
Figure 9 is a blopk diagram of memory section 42. Memory section 42 is made up of a 16 bit slow access counter 69 which receives information relative to the frames and lines from the video input unit 38. It outputs a 16-bit word into MUX 70 where "cycle stealing" occurs, i.e., the slow access counter's output address is momentarily substituted for the sequential video counter's output address, enabling the slow address counter to have access to the memory's address bus.
Sixteen-bit video counter 71 inputs a 16-bit word into MUX unit 70 which is supplied a single bit sync (memory access) signal from TAC 41. MUX unit 70 multiplexes the signals and provides its 16-bit multiplexed output into the address bus of the transmit and receive memory 72 which outputs data onto 6-bit data bus 46. The transmit and receive memory contains six 64K dynamic RAM memory chips. The clock function for the system is provided by an accurate crystal oscillator or other equally accurate clock. Additional data regarding the switching system is set out in the discussion of Figure 10.
Figure 10 is a diagram of another form of a system of this invention utilizing a single microprocessor. Video-audio input 75, made up of lens, CCD or vidicon, motor switch, lens and CCD positioner, and ancillary electronics outputs to analog-to-digital converter 74. The signal is standard for a slow scan T.V. input. The analog-to-digital converter 74 outputs n-bits digital which drive microcomputer 75 to input into n-bit data bus 76.
Microcomputer 75 has the indicated inputs and outputs. The cam input is a part of the lens and CCD positioner of video input 73 and actuates a microswitch to signal microcomputer 75 on the completion of the scan of each picture. The microcomputer operates, when programmed, with read-only memory 77.
The n-bit words from analog-to-digital converter 74 travel along data bus 76 to memory section 78 where the signal is input into the dynamic RAM 79 containing the addresses of the horizontal and vertical pixels.
Microcomputer 75 provides the slow-memory access control 80 with signals for the operation of address selection MUX 81 which provides an input signal to one of twp row and column MUXs 82. These MUXs are n-bit+2 bits wide. MUXs 82 receive sync bits from T.V. sync bit generator 83.
Video control 83, as indicated, provides the necessary standard control signals for MUX 81. Video control 83 is driven by T.V. sync generator 91 which provides all specification signals, video blanking, sync, vertical and horizontal blanking, and other components to provide R.S. 170 composite video. The sync signal from T.V. sync generator 91 inputs into video pixel sync unit 85, and to video counter 86 thereby syncing the system through output from video counter 86 into MUX 81. RAS CAS generator 84 is synced by the timing circuits 87 (made up of crystal oscillator 88 and downcounter 89. Timing circuits 87 provide clocking signals to properly time the various activities of the system and to activate RAS and CAS generator 84 which provides input to the DRAM 79 of memory section 78. Latches 90 synchronize the RAS and CAS pixel generation timing with the T.V. sync generator 91. T.V. sync generator signals and blanking signals are output to analog gates 92 and output to T.V. screens, monitors, etc.
Microcomputer 75 provides a transmit sync signal which is introduced into ZXS modulator/demodulator 92 which is made up of a bi-directional set of 6- and 8-bit latches 93, a tristate chopper 94, a voltage frequency converter 95, and a comparator 96.
The ZXS modulator operates by having an n-bit word to be transmitted on n-bit data bus 76 into a smaller latch and subsequently input into the larger latch of latches 93. The latch 93 output is the original n-bit plus an additional transmitter sync bit and a white pixel command bit which is passed through the tristate and chopper 94 to establish the analog voltages proportional to sync black, white and the gray scales between black and white. The output of the tristate and chopper 94 to the voltage-to-frequency converter 95 provides the sinusoidal "word" which is the FM to be broadcast. This FM cycle passes into microcomputer 75 through either the transmit or phone. It outputs to the switching network 97. Switching network 97 routes analog signals from their sources to their intended destination and this result is accomplished by seven (shown) analog gates for use (for purposes of this invention) with a conventional 6-bit system. Additional bits totaling n+1 must be provided where a greater or lesser number of bits are being utilized in the transmission scheme. The analog gates shown are, respectively; transmit mode 98, phone to memory 99, tape to memory 100, memory to tape 101, phone to tape 102, memory to phone 103, and tape to phone 104. Gates 101 and 102 output through the mike jack of a recorder and the earjack of a recorder inputs through the filter 105 to analog gate 104 which outputs to phone band pass filter 106 for the telephone circuitry. Band pass filters 105 and 106 eliminate frequencies which are out of the desired bandwidth.
Microcomputer 75 also provides signals, incoming and outgoing, for RS 232 interface 107 to teletype, facsimile, computer digitizer, and other machines through which transmissions are made. This provides a means for the microcomputer to send and receive signals to any other computer-based devices.
Figure 11 sets out the time and control coding for the system of Fig. 10 when used in a standard 8-bit system.
Figure 12 details the timing and control unit input and output switching for the system of Fig. 10 in an 8-bit configuration. Timing aid control unit is made up of switching unit 107 which is controlled by logic switching circuit unit 108. The inputs and outputs of asynchronous logic controls unit 109 complete the description of the embodiment of Fig. 10 in the 8-bit standard unit mode.
The modulators/demodulators of this invention are intended to use the standard interfaces, protocols, i.e., "handshakes" or "echo-backs"; auto-calls, auto-answering, self-testing or diagnostic features, dial back-up, multiple speed selection, and other features of the prior art. The terms used in the description of the invention are varied to indicate that a variety of components can be utilized to arrive at the results Obtained by the modulation/demodulation system. While terms having specific meanings are utilized in describing the invention, it is intended that the terms of description be defined in the generic context when utilized in the claims. Thus, for example, a register can be a standard "register", a "sample-and-hold", a "track-and-hold", or other means utilized in the industry which serve the purpose of a "register." Definitions used herein, except where context indicates otherwise, are as follows: The term "data", includes linear or other format digital form and data in sinusoidal, i.e. analog, form. The term "bits", includes a singular or plurality of information making up "words". The term "words", means a group of a predetermined number (n) of "bits" of information utilized in a modulator or demodulator of this invention. The term "buffer" is a taped or "bucket brigade" or other analog storage means when pertaining to analog data storage.
Those skilled in the communications equipment method design arts will have to modify present designs and equipment and adapt present-day teachings to this new communication method. However, no more experimentation should be required than that of the architect who may have to conduct routine testing of material strengths, corrosion, etc., for new architectural designs. It is possible to misconstrue the teachings of this art to provide inoperable results under some conditions; however, those desiring to obtain a constructive result will do so without more than routine testing.

Claims

What is claimed is:
Claim 1. In an FM modulation system utilizing zero crossing detection, including a modulator and demodulator with computer and memory and register means, adapted to receive data and output words of n bits, means for adding to the output of the register means a sync bit to form a word of n +1 bits, voltage-to-frequency conversion means adapted to receive the n +1 bit words and output such words as a sinusoid signal having single cycle per word continuous phase transmission signal wherein the transmission signal period is proportional to the input voltage which is proportional to the input signal, sync bit separation means for separating a sync bit from the n +1 bit word and means for establishing a phase locked loop by introducing an output from the sync bit separation means into the register means to release the next word from the register means.
Claim 2. The system of Claim 1 wherein the register means is adapted for the input of data in digital form, and includes a digital-to-analog converter adapted to receive the output of the register and to input an analog word to the voltage-to-frequency conversion means, voltage-to-frequency conversion means adapted to output the sinusoidal signal, comparator means adapted to compare the incoming signal with signals in memory and output to a counter means, and counter and address means adapted to locate the data received from the comparator means in memory.
Claim 3. The system in Claim 1 wherein the register is adapted for the input of data in analog form.
Claim 4. The system of Claim 1 including a demodulator adapted to receive and demodulate a sinusoidal signal, said demodulator comprising comparator means adapted to output n +1 bits derived from the words of said sinusoidal signal into counter means, counter means adapted to receive the output n +1 bits and to convert each of the input n +1 bits into data bits and a sync bit and input the data bits into a register means adapted to provide a predetermined data form output and a bit for input into the register means.
Claim 5. The demodulator of Claim 4 wherein the counter means includes a series of one shots and integrator means adapted to input from the comparator means and output into the register means.
Claim 6. The demodulator of Claim 4 wherein the counter means includes a digital microprocessor preprogramed with software adapted to convert the n +1 bits derived from words received from the comparator means into n-digital bits and to output said bits into the register means.
Claim 7. The system of Claim 3 wherein the modulated analog voltage input data is stored in a register means, outputted as an analog word to a voltage-to-frequency converter means to provide continuous phase variable frequency output sinusoid output having one word containing n analog bits per 360° cycle of output, comparator means for comparing sinusoidal output of the voltage-to-frequency means and outputting to a digital differentiator means, digital differentiator adapted to output a digital signal to the register means and release a word stored in memory.
Claim 8. The modulator of Claim 7 wherein the register is a sample and hold means.
Claim 9. The modulator of Claim 7 wherein the voltage-to-frequency converter means outputs into a buffer.
Claim 10. The modulator of Claim 7 wherein the voltage-to-frequency converter means outputs into a transmitter.
Claim 11. The system of Claim 2 wherein the modulator includes addressable memory means adapted to input into a register means.
Claim 12. The system of Claim 11 including address counter means adapted to receive input from the comparator means and to input into address bus means to locate data from the comparator means in memory.
Claim 13. The system of Claim 2 including a video input adapted to input into conversion section means, conversion section means adapted to input into switching systems means for at least one of telephone line and recorder means.
Claim 14. The system of Claim 2 where the register means is a timing and control means.
Claim 15. The system of Claim 2 wherein the counter and address means is a computer including memory.
Claim 16. The system of Claim 2 wherein the system includes video-audio input.
Claim 17. The system of Claim 16 wherein the video-audio input is a slow-scan video input.
Claim 18. The system of Claim 17 wherein the output of the voltage-to-frequency converter means outputs into at least one of a transmission medium, a recorder and a display.
Claim 19. The system of Claim 17 wherein the system is an electronic camera.
Claim 20. The system of Claim 17 wherein the system is a facsimile system.
Claim 21. The system of Claim 2 wherein the system is a modem.
Claim 22. The system of Claim 2 wherein the system is a teletype transmission system.
Claim 23. The system of Claim 2 wherein the system is at least a part of a security system.
Claim 24. The system of Claim 2 wherein the system is at least a part of an instrument.
Claim 25. The system of Claim 1 adapted for transmission of n +1 bit words into a transmission medium.
Claim 26. The system of Claim 25 wherein the medium is a voice quality telephone line.
Claim 27. The system of Claim 25 wherein the medium is an electromagnetic coimmunication medium.
Claim 28. The system of Claim 1 adapted for recording of n +1 bit words on a recording medium.
Claim 29. The system of Claim 29 wherein the recording medium is a magnetic tape cassette.
Claim 30. The system of Claim 3 wherein the computer is preprogramed with a program including the logic steps of Figure 13.
Claim 31. All inventions described herein.
PCT/US1985/000165 1984-02-01 1985-02-01 Zero crossing switching modulation systems and methods WO1985003609A1 (en)

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US4987586A (en) * 1987-07-31 1991-01-22 Compaq Computer Corporation Modem-telephone interconnect

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