JPH0147899B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor substrate bias method for a semiconductor integrated circuit.

In a semiconductor integrated circuit, a plurality of island-like regions are generally formed in a semiconductor layer of one conductivity type formed on a semiconductor substrate, separated by a reverse biased PN junction or a dielectric material, and each island is separated by a reverse biased PN junction or a dielectric material. Elements such as transistors and resistors are formed in the shaped region. For example, in a conventional PN junction isolated integrated circuit in which a P-type semiconductor substrate is used and N-type island-like regions are formed on the substrate by PN junctions, a P-type semiconductor substrate (hereinafter simply referred to as a P-type substrate) is used. ) to the lowest potential terminal of the circuit, biases the PN junction between the P-type substrate and each N-type island region (hereinafter referred to as N-type island) in the opposite direction, and insulates each N-type island. It's summery. However, the analog switch
N in AC plasma display drivers etc.
When the potential of the type island is driven by a pulse signal or an alternating current signal, a charging/discharging current flows through the PN junction capacitance (hereinafter referred to as substrate capacitance) between the N type island and the P type substrate. In particular, as the driving frequency increases and the scale of the integrated circuit increases, the power consumption for supplying charging and discharging currents increases, and the heat generated inside the integrated circuit also increases.

In addition, even in a dielectric-separated integrated circuit that uses a dielectric material to insulate each N-type island, when the semiconductor substrate is connected to a constant potential, the dielectric capacitance between the N-type island and the P-type substrate is charged and discharged. There is a similar drawback because the current flows.

An object of the present invention is to provide a semiconductor integrated circuit that eliminates these drawbacks.

In the integrated circuit of the present invention, the semiconductor substrate is connected to the constant voltage terminal of the circuit only via a diode. As a result, the maximum value or minimum value of the potential of the semiconductor substrate is fixed to a constant voltage via the forward voltage of the diode. In particular, when the P-type substrate is connected to the lowest potential of the circuit via a forward diode, the maximum value of the P-type substrate potential is approximately fixed to the lowest potential of the circuit.

As described above, according to the present invention, when the island-like region is driven by a pulse signal or the like, after the substrate capacitance is once charged with the peak value of the pulse signal, the substrate potential changes in accordance with the pulse signal. Therefore, thereafter, there will be almost no charging/discharging current to the substrate capacitance, and the power consumption for charging and discharging the substrate capacitance will be significantly reduced. Furthermore, in order to fix the highest or lowest value of the substrate electrode to a constant potential, the parasitic thyristor effect and parasitic MOS that are likely to occur in PN contact isolation type and dielectric isolation type semiconductor integrated circuits when the semiconductor substrate is made floating are avoided. There are ways to prevent the effects.

The following will be explained with reference to the drawings.

FIG. 1 shows a part of an equivalent circuit diagram when an AC plasma display driver circuit is realized with a conventional PN junction separated integrated circuit using a P-type semiconductor substrate. When the input signal V _IN and gate signal V _GATE shown in FIG. 4 are applied to the input 1 and gate 2 terminals, respectively, the waveform of the output voltage V _put appears at the output terminal 3. At this time, the collectors of transistors Q ₁ and Q ₂ have substrate capacitances C ₁ and C ₂ due to PN junctions between them and the semiconductor substrate, and a charging/discharging current I _CHG(b) flows to C ₁ and C ₂ . . Average charging current when the gate signal V _GATE is at a low level in the cycle shown in Figure 1
I _CHG is, C ₁ = 6PF, C ₂ = 6PF, P _W = 2μs, V _P = 150V, I _CHG = C ₁ + C ₂ /P _W V _PS = 0.9 mA For example, an AC that includes 40 circuits of the circuit shown in Figure 1. In the case of a semiconductor integrated circuit for a plasma display driver I _CHG = 0.9 x 40 = 36 mA This increases the power consumption by 5.4 W.

FIG. 2 and FIG. 3 are according to an embodiment of the present invention.
This is part of an equivalent circuit and cross-sectional view of a semiconductor integrated circuit for an AC plasma display driver. It has N-type islands 11 and 12 on a P-type semiconductor substrate 10, and transistors Q ₁ and Q ₂ are formed on each N-type island. The ground terminal 5' of the circuit is provided with a ground potential separately from the P-type semiconductor substrate 10, so that the P-type semiconductor substrate 10 is floating. The equivalent circuit is almost the same as the conventional example shown in FIG. 1, but the P-type semiconductor substrate 10 is connected to the terminal 6 via the diode D1 from the terminal 4 at a potential slightly lower than the ground potential, for example -
Connected to negative power supply -Vs which is 1V. The potential of the semiconductor substrate 10 is not fixed, and the potential of the substrate 1 between the N-type islands 11 and 12 and the semiconductor substrate 10 is
The potential V _SUB is determined by the substrate capacitances C ₁ and C 2 between C 1 and C ₂ and the capacitance C ₃ of the diode D ₁ , and changes in conjunction with the input voltage V _IN , as shown in the substrate voltage V _SUB in Figure 4. It becomes a waveform. Note that −V _s + V _F (forward voltage of D ₁ ) < 0
By setting , the substrate potential V _SUB is always negative compared to the input signal Vin, and the transistors Q ₁ and Q ₂
The collector N islands 11, 12 of are electrically isolated by a reverse biased PN junction.

In this embodiment, the charging/discharging current I _CHG(a) to the substrate capacitances _C1 and C2 is determined by the series capacitance of the parallel capacitance of the substrate capacitances C1 and _C2 and _the junction capacitance _C1 of the diode D1.

Therefore, the average charging current I _CHG when the gate signal V _GATE is at a low level is C ₃ = 0.5PF, I _CHG = C ₃ /PWV _CS = C ₃ /PW×C ₁ +C ₂ /C ₁ +C ₂ +C ₃ V _p = 0.036mA The increase in total current and power consumption in the case of a semiconductor integrated circuit for an AC plasma display driver that includes 40 circuits of the circuit of this example is I _CHG = 1.44mA Ploss = 0.216W and the conventional circuit. significantly decreased compared to

In this way, a fixed potential is applied to the ground potential terminal 5 of the circuit separately from the semiconductor substrate 10, and the semiconductor substrate 1
0 is in a potential floating state, and furthermore, in order to ensure insulation separation between elements, insulation is achieved by applying a potential (1V or more) slightly lower than the above-mentioned fixed potential to the semiconductor substrate ₁₀ via a forward diode D1. The charging and discharging current to the parasitic capacitance for isolation can be extremely reduced.

In the embodiment, a PN junction separated type AC plasma display driver circuit using a P-type substrate has been described, but the present invention can be similarly applied to circuits such as analog switches. Furthermore, when using an N-type substrate,
A similar effect can be obtained by connecting D ₁ to the highest potential.

[Brief explanation of drawings]

FIG. 1 shows a part of an equivalent circuit of a conventional semiconductor integrated circuit for an AC plasma display driver, FIG. 2 shows a part of an equivalent circuit of a semiconductor integrated circuit for an AC plasma display driver according to an embodiment of the present invention, and FIG. is a part of the cross-sectional view of the integrated circuit of the above embodiment, FIG. 4 is a waveform diagram of each part, V _IN is the input pulse voltage of the AC plasma display driver,
V _GATE is the gate voltage, V _OUT is the output voltage, V _SUB is
The substrate potential, I _CHG(a) , indicates the current of charging and discharging the substrate capacitance in the embodiment of FIG. 2, and I _CHG(b) indicates the current of charging and discharging the substrate in the conventional circuit, respectively. 1... Drive pulse input terminal, 2... Gate terminal, 3... Output terminal, 4... Board terminal, 5, 5'
...ground terminal, 6...terminal that supplies −V _S voltage,
10... P-type semiconductor substrate, 11, 12... Island.

Claims (1)

[Claims] 1 A semiconductor substrate has a plurality of island regions separated by PN junctions, circuit elements formed in each island region are wired to form a predetermined circuit, and the island region is used as a collector region in the circuit element. In a semiconductor integrated circuit having a transistor, a signal voltage whose voltage level changes between a reference potential and a first potential is supplied to the collector region of the transistor, and is connected to a reference potential point of the circuit via the semiconductor substrate. The reference potential is applied without any change, and a constant potential is supplied to the semiconductor substrate via a diode, and the diode is turned on or off depending on the change in the signal voltage, and the semiconductor substrate is supplied with a constant potential through a diode. A semiconductor integrated circuit characterized in that the potential of a semiconductor substrate is varied within a voltage range that does not forward bias the PN junction.