JPH0144329B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a heart rate circuit that digitally measures the heartbeat cycle from the output of a heartbeat sensor that discards the heartbeat timing from the surface potential of the human body, converts it into a predetermined heartbeat rate, and displays the result. .

Conventional heart rate counting circuits add a count clock with a certain frequency of ₁ to a counter during one cycle of pulses synchronized with heartbeats output from a heartbeat sensor (hereinafter referred to as heartbeat pulses), and then later calculate the count clock. A process was performed to calculate what heart rate corresponds to the content of the data. However, the method of calculating the heart rate in one cycle of the heartbeat pulse as described above has the following problems. In other words, even in a normal healthy person who does not have an arrhythmia with a human heartbeat,
Because there is some variation between adjacent pulse cycles, if you convert the heart rate based on just one cycle of the heartbeat pulse, the value of the previous heart rate and the subsequent heart rate may be significantly different. This resulted in a loss of credibility as a measuring instrument.

Therefore, as a solution to the above problem, when converting the heart rate equivalent to one minute from the heartbeat cycle, there is a method of measuring heartbeat pulses of a predetermined plurality of cycles (for example, two cycles) and converting them. However, with this method, the heart rate is not displayed until a predetermined number of heartbeat pulses are input from the time the measurement starts, and during that time, the user is not informed whether or not the real meter is working. The result was a feeling of anxiety.

The present invention eliminates all of the above-mentioned drawbacks, and has a configuration in which the heart rate is calculated from the first cycle of the heartbeat pulse input after the start of measurement, and thereafter the heart rate is calculated from the heartbeat pulses of multiple cycles. . The present invention will be described in detail below based on the accompanying drawings.

FIG. 1 shows a circuit embodiment of the present invention, in which a heartbeat pulse 9 output from a heartbeat sensor is passed through a one-shot pulse generation circuit 1 in order to match it with the circuit of the present invention, and a shaped one-shot pulse 1 is generated.
0 into the main control section 2. A count gate signal 14 for controlling the timing of the count clock 17 input to the counter section 5 is outputted from the main control section 2 and inputted to the count frequency selection circuit 3 and the sub-control section 4. An initialization signal 11 is inputted to the main control section 2 when the power of the apparatus is turned on, and the main control section 2 is thereby set to a measurement start state. In the measurement start state, the count frequency select signal 15 is input to the count frequency selection circuit 3 so that the count frequency signal 16 becomes 256 Hz18. Furthermore, in order to add a clock to the counter section 5 for one heartbeat cycle,
The main control section 2 receives a one-shot pulse 10 synchronized with the heartbeat pulse 9, and outputs a count gate signal 14 to open the count gate for one heartbeat cycle, and the counter section 5 receives a one-shot pulse 10 that is synchronized with the heartbeat pulse 9. It only comes in during the cycle. Therefore, by looking at the count data 21 that is the output of the counter section 5, the time width of one heartbeat cycle can be determined, and then the heart rate conversion circuit 6 outputs heart rate conversion data 22 corresponding to that time width.
When the heart rate value is captured by the latch clock 12 and the latch data 23 is input to the display circuit, the heart rate measurement for one cycle of the first heartbeat is completed. During the first measurement, when the latch clock 12 is activated, the level at point a in the main control section 2 becomes "L", and for the second and subsequent measurements, the count gate signal is sent to open the count gate for two heartbeat cycles. 14
is output from the main control section 2, the count frequency signal 16 becomes 128 Hz, and eventually the count clock 17 of 128 Hz is input to the counter section 5 for two cycles of heartbeat. In this case, the relationship between the content of the count data 21 and the heartbeat conversion value is that the count time has doubled from 1 heartbeat cycle to 2 heartbeat cycles, but the count frequency has been halved from 256Hz to 128Hz, so once Since this is the same as in the second measurement, the heart rate conversion circuit 6 can be used for both purposes. In this way, the heart rate conversion circuit 6 converts the count data 21
If you configure it with a combinational circuit that can output heart rate data commensurate with the value of
No calculation time is required, and no period is ignored among the periods of successive heartbeat pulses. In order to increase the accuracy of the conversion, it is sufficient to increase the frequency of the count clock 17, increase the number of BITs in the counter accordingly, and change the contents of the conversion circuit, regardless of the size of the counter and conversion circuit. It is possible to increase the accuracy to a degree that is more than sufficient. 2, 3, 4, and 5 show the operation timing of the circuit of the present invention. In FIG. 2, a strobe signal 27 is shown which provides the basic timing of the circuit. FIG. 3 shows a one-shot pulse 10 generated by the one-shot pulse generating circuit 1 in synchronization with a heartbeat pulse. FIG. 4 shows the circuit operation after the initialization signal 11, which is input when the power is turned on, is output, and from when the one-shot pulse 10 is input at timing b until the next one-shot pulse 10 is input, In other words, the count gate signal 14 is at "L" level during one heartbeat cycle, and 256
A Hz count clock 17 is sent to the counter section 5. When the count gate signal 14 returns to the "H" level at timing e, the latch clock 12 is immediately output. At this time, the heart rate conversion circuit 6 outputs heart rate conversion data 22 according to the contents of the count data 21, and the latch circuit 7 reads the contents at the same time as the latch clock 12 goes out, holds it, and displays it in the display circuit. indicate. After latch clock 12 appears, reset pulse 1 follows.
3 is output, the counter section 5 is reset, and the main control section 2 is set to display the next count as an average of two heartbeat cycles. At the same time as the reset pulse 13 is output, the count gate signal 14
becomes "L" level again, and returns to "H" level when one shot pulse 10 is applied twice. At this time, the 128Hz count clock 1 is set for 2 heartbeat cycles.
7 is sent to the counter section 5, and count data 2
The heart rate conversion data output according to the contents of 1 is displayed by clicking the latch clock 1 in the same way as when displaying it for the first time.
2, hold and display, reset pulse 1
3, the counter section 5 is reset and the count gate 14 is returned to the "L" level, and this cycle is repeated thereafter. FIG. 5 is a timing chart when the counter overflows because the measurer stops the measurement midway through and the one-shot pulse 10 is no longer received. After outputting the latch clock 12 at timing d and subsequently outputting the reset pulse 13, if it takes some time for the one-shot pulse 10 to be input, an overflow signal 20 is output from the counter, and the h terminal becomes "H" for one cycle of 256Hz. level. The count gate signal 14 is returned to the "H" level by the level of the h terminal, and the latch clock 12 attempts to output, but the level of the h terminal prohibits this, and the meaning of the count data 21 as a result of overflow is It prohibits the heart rate from being displayed, outputs only a reset pulse 13 to reset the counter, and puts the main control section 2 in a measurement standby state. When the one-shot pulse 10 is input at a later timing, measurement starts from the initial state, and at timing g, the latch clock 12 and then the reset pulse 13 are output to display the heart rate and continue the measurement. FIG. 6 shows an example of an input/output diagram of the heart rate conversion circuit. For example, if a 256Hz clock is input to the counter during one heartbeat cycle, the count data 21
becomes 191, then the corresponding heart rate is
81, so divide this into upper and lower digits and
If the BCD code is output, the display circuit 8 will display a heart rate of 81 based on this code.

As described above, according to the present invention, the first cycle of the heartbeat pulse input after the start of measurement is measured and the heart rate is converted for the time being, and after that, multiple cycles of the heartbeat pulse are measured and converted to the heart rate. As the heart rate value is displayed immediately after measurement, a more accurate heart rate is displayed without large variations, making it possible to create a heart rate meter that users can use with peace of mind. It is.

Furthermore, if the heart rate conversion circuit is configured with ROM, there is a possibility that the heart rate conversion circuit will become smaller due to future improvements in semiconductor integrated circuit technology.
When a heart rate counting circuit is incorporated into a single-chip IC, the circuit can be realized with a smaller mask layout.

In addition, when the heart rate counting circuit of the present invention is used as one of the functions of, for example, an electronic watch having a crystal oscillation circuit, each clock of the heart rate counting circuit can be configured with the very accurate frequency of the crystal oscillation circuit, and even more It has the effect of being able to accurately display heart rate.

[Brief explanation of drawings]

FIG. 1 shows an example of an implementation circuit of the present invention, and FIG.
3, 4, and 5 are timing charts for explaining the operation, and FIG. 6 is an example of a heart rate conversion chart. 1... One shot pulse generation circuit, 2... Main control section, 3... Count frequency selection circuit,
4...Sub control section, 5...Counter section, 6
...heart rate conversion circuit, 7...latch circuit, 8...display circuit, 9...heartbeat pulse, 10...one shot pulse, 11...initialize signal, 12...latch clock, 13...reset pulse, 14...count gate signal, 15...count Frequency select signal, 16...Count frequency signal, 17...Count clock, 18...256Hz, 19...128Hz, 20...Overflow signal, 21...Count data, 22
...Heart rate conversion data, 23...Latch data, 24
...Signal for creating one-shot pulse, 25...1024
Hz, 26...512Hz, 27...Strobe signal.

Claims (1)

[Claims] 1. A counter that inputs a heartbeat pulse and counts clock pulses that are input during the first period of the heartbeat pulse after the start of measurement and clock pulses that are input during a predetermined plurality of periods after the one period; a heart rate conversion circuit that inputs the count value of a counter, converts the heart rate equivalent to one minute according to the count value, and outputs heart rate conversion data; and a display circuit that displays the heart rate based on the heart rate conversion data. A heart rate counting circuit characterized by comprising: