JPH0139211B2 - - Google Patents
Info
- Publication number
- JPH0139211B2 JPH0139211B2 JP57110728A JP11072882A JPH0139211B2 JP H0139211 B2 JPH0139211 B2 JP H0139211B2 JP 57110728 A JP57110728 A JP 57110728A JP 11072882 A JP11072882 A JP 11072882A JP H0139211 B2 JPH0139211 B2 JP H0139211B2
- Authority
- JP
- Japan
- Prior art keywords
- loop
- height
- wire
- ball
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims abstract description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000001953 recrystallisation Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48644—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85444—Gold (Au) as principal constituent
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体に用いるワイヤボンダーに関す
るものである。フレーム上に形成されたチツプと
リード間を金線で接合する際、金線の先端部に電
圧を印加し、先端部にボールをつくり、このボー
ルを被接合部にあてて接合しており、接合が終る
とチツプとリード間にループが形成される。こゝ
でループの高さが高過ぎると無駄なスペースをと
ることになり、とくに小型化に対しては障害とな
り、また余り低過ぎると接触事故発生の原因とな
るなど、自ら適当なループの高さになることが必
要であり、この高さも被接合体が変るとそれぞれ
に応じて適当な値に変えなければならない。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a wire bonder used for semiconductors. When joining a chip formed on a frame and a lead with a gold wire, a voltage is applied to the tip of the gold wire to form a ball at the tip, and this ball is applied to the part to be joined to join. When bonding is complete, a loop is formed between the chip and the leads. If the height of the loop is too high, it will take up wasted space, which is an obstacle to miniaturization, and if it is too low, it may cause a collision accident. When the object to be bonded changes, this height must be changed to an appropriate value depending on the object to be joined.
本発明はかゝる点に鑑み、実験結果に基づきル
ープの高さを人為的に制御する方法を提供するも
ので、以下に図面を参照して詳細に説明する。 In view of the above, the present invention provides a method for artificially controlling the height of a loop based on experimental results, and will be described in detail below with reference to the drawings.
第1図は、従来の金線の先端にボールをつくる
場合の説明図で、ツール1に設けた孔を貫通した
金線2の先端に、0.2mm程度の間隔をおいて、ト
ーチロツド3を配置し、ツール1とトーチロツド
3の間に、1000ボルト程度の直流電圧を印加す
る。この場合、直流電源Eを充電抵抗R1を介し
コンデンサCに充電し、これを放電抵抗R2を通
して金線2とトーチロツド3間で放電させ、1回
のスパークだけでボールをつくつていた。 Figure 1 is an explanatory diagram of the conventional method of making a ball at the tip of a gold wire.A torch rod 3 is placed at the tip of a gold wire 2 that has passed through a hole provided in a tool 1, with an interval of about 0.2 mm. Then, a DC voltage of about 1000 volts is applied between the tool 1 and the torch rod 3. In this case, a capacitor C was charged with a DC power source E through a charging resistor R1 , and this was discharged between the gold wire 2 and the torch rod 3 through a discharging resistor R2, and a ball was created with just one spark.
第2図は、上述の如く金線にボールをつくり、
フレーム4に形成されたチツプ5とリード6とを
ワイヤ7で接合し、ワイヤ7が8を頂点として曲
り、高さlのループを形成している状態を示す。 Figure 2 shows a ball made of gold wire as described above.
A chip 5 formed on a frame 4 and a lead 6 are connected by a wire 7, and the wire 7 is bent at an apex 8 to form a loop having a height l.
こゝでワイヤ7が折り曲る点8は、ワイヤ7に
熱が加わつてボールをつくるとき、溶けたところ
に再結晶が起り、再結晶が進んでその終つた附近
に相当する。 Here, the point 8 where the wire 7 is bent corresponds to the vicinity where when the wire 7 is heated to form a ball, recrystallization occurs where it melts, and where the recrystallization progresses and ends.
ところでループの高さlは、適当な値になるこ
とが望まれるものであるから、その達成手段とし
て再結晶の長さを制御できればそれに伴い高さl
を制御できることになり、本発明においては、制
御手段としてボールをつくる際に交流電圧を印加
し、周期的にスパークを繰り返すことによつてル
ープの高さlが変ることを実験的に確かめたもの
である。 By the way, the height l of the loop is desired to be an appropriate value, so if the length of recrystallization can be controlled as a means to achieve this, the height l can be adjusted accordingly.
In the present invention, it has been experimentally confirmed that the height l of the loop changes by applying an alternating voltage as a control means when making the ball and periodically repeating sparks. It is.
第3図は径が30ミクロンの金線を用い、スパー
ク回数とループの高さlとの関係を求めた実験結
果であり、スパーク回数が多くなるに従つてほゞ
直線的にループ高さlが大きくなることが判る。 Figure 3 shows the experimental results of determining the relationship between the number of sparks and the loop height l using a gold wire with a diameter of 30 microns.As the number of sparks increases, the loop height l increases almost linearly. It can be seen that becomes larger.
この実験結果を基にすると、ループの高さlを
一定時間に所望の値にするには、周波数をいくら
に選べばよいかが決まり、また周波数を決めてお
けば何回スパークさせればよいか、したがつて印
加時間をいくらに制御するかが決まり、いづれの
場合でも容易に時間制御できるので、必要に応じ
てループの高さlの値を予め設定した値にするこ
とが可能であり、ワイヤボンデイング作業に極め
て好都合である。 Based on this experimental result, it is determined how much frequency should be selected in order to make the loop height l the desired value in a certain period of time, and once the frequency is determined, how many times should sparks be generated? , Therefore, it is determined how much the application time should be controlled, and in any case, the time can be easily controlled, so it is possible to set the value of the loop height l to a preset value as necessary, Extremely convenient for wire bonding work.
第1図は従来の金線先端にボールをつくる場合
の説明図。第2図はループの説明図。第3図は実
験結果。
1……ツール、2……金線、3……トーチロツ
ド、4……フレーム、5……チツプ、6……リー
ド、7……ワイヤ。
Figure 1 is an explanatory diagram of the conventional method of creating a ball at the tip of a gold wire. FIG. 2 is an explanatory diagram of the loop. Figure 3 shows the experimental results. 1... Tool, 2... Gold wire, 3... Torch rod, 4... Frame, 5... Chip, 6... Lead, 7... Wire.
Claims (1)
を行うワイヤボンダーにおいて、予め設定した所
定の時間又は回数だけ、適宜に決めた周波数の交
流電圧を金線に印加するように制御し、金線の先
端にボールを形成することを特徴とするワイヤボ
ンダーにおけるループの高さの制御方法。1. In a wire bonder that performs bonding by forming a ball at the tip of a gold wire, control is applied so that an alternating current voltage of an appropriately determined frequency is applied to the gold wire for a preset predetermined time or number of times. A method for controlling the height of a loop in a wire bonder characterized by forming a ball at the tip.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57110728A JPS593939A (en) | 1982-06-29 | 1982-06-29 | Control of loop height at wire bonder |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57110728A JPS593939A (en) | 1982-06-29 | 1982-06-29 | Control of loop height at wire bonder |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS593939A JPS593939A (en) | 1984-01-10 |
JPH0139211B2 true JPH0139211B2 (en) | 1989-08-18 |
Family
ID=14542990
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57110728A Granted JPS593939A (en) | 1982-06-29 | 1982-06-29 | Control of loop height at wire bonder |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS593939A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2572388B1 (en) * | 1984-10-29 | 1986-12-26 | Saint Gobain Vitrage | SUPPORT FRAME FOR A GLASS SHEET DURING THE TEMPERING |
JPS6345138A (en) * | 1986-08-08 | 1988-02-26 | Asahi Glass Co Ltd | Bending method for glass plate |
-
1982
- 1982-06-29 JP JP57110728A patent/JPS593939A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS593939A (en) | 1984-01-10 |
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