JPH0136172B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a magnetic reproducing device, which detects the peak value of an amplitude modulated wave reproduced from a control track every one or half cycles and determines the detection pattern. The operation of the servo circuit to which the control signal detected from the modulated wave is supplied can be performed stably even against dropouts, noises, etc., and the wow and flutter components of the reproduced audio signal, for example, can be lowered from the amplitude modulated wave. It is an object of the present invention to provide a magnetic reproducing device capable of reproducing even the pilot signal of the present invention.

As is well known, a helical scan type magnetic recording/reproducing device (hereinafter referred to as "VTR") uses a capstan servo to keep the magnetic tape traveling speed constant during recording and reproduction, but in recent years, recording and reproduction times have become longer. Therefore, the running speed of the magnetic tape is slowed down, so the speed changes due to disturbances are large, and the influence of wow and flutter on the length of elongation and contraction of the magnetic tape becomes large. This wow and flutter is caused by the relative linear velocity of the audio track (and control track) along the longitudinal direction of the magnetic tape and the audio head (and control head 5) being faster than the relative linear velocity between the video track and the rotary head, which are inclined with respect to the longitudinal direction of the magnetic tape. Since the linear velocity is much smaller because the audio head (and control head) is fixed, it has a greater adverse effect on the reproduced audio signal (and the reproduced control signal).

In order to reduce this wow and flutter, it is conceivable to increase the number of pulses generated per one revolution of the capstan from the FG pulse generator in the speed control circuit of the capstan servo system, but due to manufacturing constraints, It is not possible to obtain the pulse necessary for the above-mentioned wow and flutter low range, and on the other hand, it is possible to achieve the wow and flutter low range by increasing the diameter of the flywheel fixed to the capstan shaft.
The drawback was that it limited the ability to make VCRs smaller and lighter.

The present invention eliminates the above drawbacks without adversely affecting the capstan servo due to dropouts, noise, etc., and one embodiment thereof will be described below.

Before explaining the apparatus of the present invention, an example of a signal recording system previously proposed by the applicant, which can be reproduced by the apparatus of the present invention, will be explained with reference to FIGS. 1 to 4. In the block diagram shown in Figure 1, the field frequency to be recorded that comes into input terminal 1 is 60Hz.
The composite video signal of FIG.
Only the vertical synchronization signal shown in is extracted. This vertical synchronizing signal is supplied to the frequency divider 4, where the frequency is divided by 1/2 to produce pulses with a repetition frequency of 30 Hz as shown in FIGS. 2B and 3B (this becomes the control signal described later). After that, the signals are supplied to monostable multivibrators (hereinafter referred to as "monomulti") 5 and 6 and a phase comparator 7, respectively.

The monomulti 5 is triggered by the rising edge of the pulse and applies a narrow pulse as shown in FIG. . Moreover, the monomulti 6 is triggered by the rising edge of the pulse from the frequency divider 4, and as shown in FIG. 2D and FIG. 3C, for example, the output pulse of the counter 10 (shown in FIG. 2E)
A pulse with a width T of about three periods is output. In addition,
2A to 2F and 3A to 3C are illustrated with different time axes, respectively.

On the other hand, the phase comparator 7 is a well-known phase locked loop (hereinafter referred to as ``PLL'') together with a voltage controlled oscillator (hereinafter referred to as ``VCO'') 8 and a frequency divider 9 consisting of a 14-bit counter.
The oscillation frequency is variably controlled by the output phase error voltage of the phase comparator 7, and the VCO 8 outputs a repetition frequency of 491.52kHz (=30×
2 ¹⁴ ) pulses are taken out and applied to the counter 10 as clock pulses.

The counter 10 is a 10-bit counter, and starts counting the clock pulses from the VCO ⁸ from the rising edge of the pulse shown in FIG. A pulse whose polarity is inverted, that is, a pulse with a repetition frequency of 480 Hz and a constant amplitude as shown in FIG. After converting the signal into a sine wave, the signal is supplied to the modulator 12. Here, the reason why the signal waveform supplied to the modulator 12 as a carrier wave by the low-pass filter 11 is a sine wave is because the band that can be transmitted in magnetic recording and reproduction is low. Since it contains pulse harmonics, all of its frequency components cannot be transmitted through magnetic tape, which is recorded and played back at a slow tape running speed, and in addition, the transmission band becomes narrower as the signal amplitude increases. Therefore, when the carrier wave is a pulse, the band of the amplitude modulated wave differs depending on the level, and the way distortion is generated differs depending on the level.
This is because the low-frequency effects of wow and flutter cannot be fully expected. On the other hand, by using a sine wave, the frequency to be transmitted can be made single, so the above-mentioned disadvantages can be prevented.

The modulator 12 is supplied with a pulse having a repetition frequency of 30 Hz as shown in FIG. 2D and FIG.
A 480 Hz sine wave is supplied as a carrier wave to perform amplitude modulation, and from this, amplitude modulated waves having waveforms as shown in FIG. 2F and FIG. 4 are output. Here, by varying the delay time of the monomulti 5, the reset timing of the counter 10 (i.e., the second
The falling point of the output pulse of the monomulti 5 shown in Figure C can be varied, and the output pulse of the counter 10 shown in Figure 2 E can be moved to the left or right in E of the same figure. Accordingly, the phase of the amplitude change point of the amplitude modulated wave shown in FIG. 2F is changed. Furthermore, by changing the delay time of the monomulti 6, it is possible to change the phase of the amplitude change point of the amplitude modulated wave shown in FIG. 2F. Furthermore, modulator 1
The amplitude of the amplitude modulated wave shown in FIG. 2F can be varied by adjusting the volume in FIG.

The amplitude modulated wave generated in this way is amplified to an appropriate level by an amplifier 13, and then a mixer 14
After being superimposed with a bias signal from a bias oscillator 15, the signal is supplied to a fixed control head 16 and recorded on a control track along the longitudinal direction of a magnetic tape 17. Meanwhile, at the same time, input terminals 18a and 18b
The input audio signals of the first and second channels pass through amplifiers 19a and 19b, and mixer 20a,
20b, where it is superimposed with the bias signal from the bias oscillator 15, and then applied to the fixed audio heads 21c, 21b.
recorded on the respective audio tracks. In addition,
The composite video signal input to the input terminal 1 is recorded on a tilted video track on the magnetic tape 17 by a rotary head (not shown) through a recording system (not shown), as is well known.

Next, one embodiment of the apparatus of the present invention will be explained with reference to FIGS. 5 to 7. FIG. 5 shows a circuit diagram of a main part of an embodiment of the device of the present invention. In the figure, a control head 23 reproduces the amplitude modulated wave recorded on the control track of the magnetic tape 17. The output reproduction signal of the control head 23 is amplified by an amplifier 24 and then supplied to a low-pass filter 25, where unnecessary high frequency components are removed in order to improve the S/N ratio, resulting in a reproduction signal as shown in FIG. 6A. After being made into an amplitude modulated wave a, it is supplied to a comparator 26 and sampling and hold circuits 28 and 29, respectively. The comparator 26 outputs from an output terminal 27 a pulse b shown in FIG. 6B, which is inverted to positive or negative each time the reproduced amplitude modulated wave a crosses the zero level, to a circuit shown in FIG. 7, which will be described later. This pulse b
has a repetition frequency of 480Hz, and the time axis fluctuation component of the reproduced audio signal due to wow and flutter (hereinafter referred to as
This is used for the low range (referred to as the "wow/flatter component").

Further, the above-mentioned pulse b is supplied to the monomulti 30, which is triggered at its rising edge and converted into the pulse c shown in FIG. 6C, which is then applied to the monomulti 32 and triggered at its fall. Figure D
The pulse d shown in FIG. At the same time, pulse b
is supplied to the monomulti 31, which is triggered at the falling edge of the signal and converted into the pulse e shown in FIG. 6E.
is triggered and converted into a pulse f shown in F of the same figure. The above-mentioned pulses d and f obtained in this way are respectively pulses delayed by a phase of π/2 rad from the predetermined zero crossing point of the reproduced amplitude modulated wave a, and the pulse d is a positive pulse of the reproduced amplitude modulated wave a. It becomes high level only near the peak point, and the pulse f becomes the reproduced amplitude modulated wave a.
It becomes high level only near the negative peak point of . The pulse d is supplied to a sampling and holding circuit 28, where the positive peak point of the reproduced amplitude modulated wave a is sampled and held for one cycle period. On the other hand, the pulse f is supplied to a sampling and holding circuit 29, where the negative peak point of the reproduced amplitude modulated wave a is sampled and held for one frequency period. After the average voltage of the output signals of the sampling and holding circuits 28 and 29 is determined by the integrating circuits 34 and 35, the output signals are supplied to a voltage dividing circuit 36 using resistors, where the positive amplitude determination reference voltage shown in FIG. 6A is determined.
It is converted into L _H and a reference voltage L _L for negative amplitude judgment.

The above reference voltage L _H is applied to the inverting input terminal of the comparator 37, and is compared in level with the output voltage of the sampling and holding circuit 28 applied to its non-inverting input terminal. On the other hand, the above reference voltage L _L
is applied to the non-inverting input terminal of the comparator 38, and compared in level with the output voltage of the sampling hold circuit 29 applied to its inverting input terminal. As a result, the comparator 37 outputs the pulse h shown in FIG. 6H and applies it to one input terminal of the two-input NAND circuit ₃₉ , while the diode D
Integrating circuit 40 consisting of resistor R ₁ and capacitor C ₁
to be applied. When the pulse h becomes high level, this integrating circuit 40 charges the capacitor C ₁ via the resistor R ₁ according to the charging time constant determined by the product of the respective values of the resistor R ₁ and the capacitor C ₁ , and then calculates the charging voltage. On the other hand, when the pulse h becomes low level, the charge in the capacitor _C1 is instantly discharged via the diode _D1 . Therefore, the output voltage of the integrating circuit 40 becomes a voltage j as shown in FIG. It continues to be reset during the high level period until the sampling hold point.

On the other hand, the comparator 38 outputs the output voltage i shown in FIG. 6I and applies it to the other input terminal of the NAND circuit 39. As a result, the NAND circuit 39
From there, a pulse k as shown in FIG. 6K is taken out and applied to the data terminal of the shift register 41. This shift register 41 shifts the pulse k applied to its data terminal in synchronization with the rise of the pulse g having a repetition frequency of 960 Hz as shown in FIG. Outputs sequentially from bit output terminals _Q1 to _Q8 . Here, the sixth wave of the reproduced amplitude modulated wave a is
The points indicated by and in FIG.
It is uncertain what the level comparison result will be based on No. 38. Therefore, there is an uncertain part in the output voltage h of the comparator 37 corresponding to the amplitude change point, as shown by the x mark _h1 in FIG. Cross mark I ₁
As shown in , there is an uncertain portion corresponding to the amplitude point.

Therefore, in the output pulse k of the NAND circuit 39, as _shown by _the cross mark in _{FIG .} Each will exist. This pulse k
As described above, is applied as data to the shift register 41 and shifted at the rising edge of the pulse g, but since the shift register 41 continues to be reset until the reset pulse j becomes low level, the above-mentioned uncertain part k ₁ is the shift register 41
It is not output to each output terminal of Q ₁ to Q ₈ and is unrelated.

As a result, pulses as shown in FIG. 6 L to S are taken out to each of the output terminals Q ₁ to _{Q 8} of the shift register 41, respectively. Among these output pulses, the _Q1 output pulse shown in FIG. 6L is applied to the 7-input AND circuit 45 through the inverter 43, and the _Q8 output pulse shown in FIG.
It is applied to the circuit 45, and each output pulse of Q ₃ to _{Q 7} is also applied to the AND circuit 45, respectively.
The _Q2 output pulse shown in is not applied to the AND circuit 45. As a result, the AND circuit 45 outputs the sixth
A pulse t as shown in FIG. T is taken out and outputted from the output terminal 46 as a control signal.

Incidentally, during recording, the control signal matches the phase of the vertical synchronization signal, but this playback control signal t has a phase difference between the vertical synchronization signal and the vertical synchronization signal T _S
The phase is delayed for the period indicated by . However, the pulses (control signals) shown in FIG. 2D and FIG. Since these are managed to have a constant phase relationship, it is possible to manage the shift period T _S to a constant value, and it is possible to perform tracking servo operation with the same accuracy as before.

Further, according to this embodiment, the peak point of the reproduced amplitude modulated wave a delayed by phase π/2 (rad) from the zero cross point of the reproduced amplitude modulated wave a is sampled and held, and its voltage is checked. Since the pattern that appears is examined, dropouts and noises are not detected erroneously (note that the amplitude peak point of each cycle of the reproduced amplitude modulated wave a may be detected). Rather than erroneously detecting dropouts and noise as control pulses, it is better for the servo circuit not to detect and output them as control pulses. Furthermore, in this embodiment, the AND circuit 45 checks the coincidence of the seven output pulses of the shift register 41, but the detection accuracy can be set arbitrarily by increasing or decreasing the number of stages of the shift register 41, etc. .

Next, the operation of reducing the wow and flutter components of the reproduced audio signal by the apparatus of the present invention will be explained with reference to the block system diagram shown in FIG. In the figure, the pulse b shown in FIG. 6B, which entered the terminal 27 as a pilot signal, is
They are applied to terminal A of PLL 47 and changeover switch SW, respectively. Pulse b is a signal reproduced from the control track of the magnetic tape 17, and has the same wow and flutter components as the audio signal reproduced from the audio track formed along the longitudinal direction of the tape like the control track. There is. The PLL 47 is designed to follow the frequency fluctuations of the input pulse b, and even when the input pulse b has many dropouts, the PLL 47 continues to oscillate within the variable range of the VCO inside the PLL 47 and is phase-locked to the input pulse b. It is possible to output pulses and prevent malfunctions of subsequent circuits.

However, since PLL47 cannot completely follow the frequency fluctuation of input pulse b, PLL47
The effect of reducing wow and flutter is slightly inferior to the case where 7 is not passed. Therefore, the changeover switch SW connects terminals ``RO'' and ``C'' only when there is a lot of dropout in the input pulse "b" and takes out the pulse "b" which has passed through the PLL 47, and when there is no dropout in the input pulse "b" (actually, there is no dropout). Terminals A and C are connected to prevent the PLL 47 from passing through. The pulse b taken out from the terminal C of the changeover switch SW is supplied to a frequency divider 48 and a bucket brigade device (BBD) 49 constituting a variable delay circuit, respectively.

The repetition frequency of input pulse b is 480Hz,
Since it is difficult to directly detect wow and flutter components lower than this, the frequency divider 48 divides the pulse b from the changeover switch SW by 1/6, for example, to 80Hz.
After that, it is supplied to the PLL 50, where wow and flutter components of 1 Hz or more are detected and extracted as voltage changes. The output voltage of this PLL 50 is applied as an oscillation control voltage of the VCO 51. VCO51 is BBD49, 61 and 61b, which constitute a variable delay circuit.
This is an oscillator for generating clock pulses, and its output oscillation frequency is controlled by clock drive circuits 52 and 5.
3, and here they are shaped into BBD clock pulses. BBDs 49, 61a and 61b each have the same number of stages, but many stages are used because it is necessary to widen the variable range of delay time in order to improve wow and flutter components of 1 Hz or more. Further, the clock drive circuits 52 and 53 may be used in common as long as they can simultaneously drive the three BBDs 49, 61a and 61b.

The delay time of the BBD 49 is varied by the clock pulse from the clock drive circuit 52 according to the wow and flutter components of input pulse b of 1 Hz or more. (not shown), the zero-cross detector 5
4, where it is shaped into a pulse with sharp rises and falls. Similarly, BBD61a,6
The delay time 1b is varied by the clock pulse from the clock drive circuit 53 according to the wow and flutter components of input pulse b of 1 Hz or more, thereby converting the reproduced audio signal in which the low frequency wow component has been reduced to the low frequency range described below. Output to filters 62a and 62b. Here, since the BBDs 49, 61a and 61b have a long delay time in order to reduce especially low frequency wah components, their input pulses b and high frequency flutter components in the reproduced audio signal have a phase lag due to the delay. becomes large and cannot be reduced. This flutter component that cannot be reduced is BBD4.
It is included in each output signal of 9, 61a and 61b.

The pulse that contains the flutter component that cannot be reduced and is extracted from the zero-cross detector 54 is
The signal is supplied to the PLL 55, where a flutter component of 10 Hz or more is detected, and then supplied to the VCO 56, where the output oscillation frequency is variably controlled in accordance with the detected flutter component. The output oscillation frequency of the VCO 56 is waveform-shaped into a BBD clock pulse by a clock drive circuit 57, and then supplied to BBDs 63a and 63b, which constitute a variable delay circuit, respectively.
The delay time is variably controlled. Since the BBDs 63a and 63b only need to reduce flutter components of 10 Hz or higher, the variable range of the delay time can be narrow, and therefore the delay time can be shortened, and even high frequency flutter components can be reduced.

On the other hand, the audio signals of the first and second channels respectively reproduced by the two audio tracks from the first and second audio tracks of the magnetic tape 17 that have entered the input terminals 58a and 58b are used for input sensitivity adjustment. It is supplied to low-pass filters 60a, 60b via variable resistors 59a, 59b, and after removing high-frequency components that cannot be transferred by BBD61a, 61b which performs sampling operation here, BBD61a,
61b. As mentioned above, BBD61
The reproduced audio signals of the first and second channels, in which the wah component has been lowered by the filters a and 61b, are passed through the low-pass filter 6.
After the clock components are removed by 2a and 62b
It is supplied to BBD63a, 63b, and here BBD6
1a and 61b, the flutter components of 10 Hz or higher, which could not be completely reduced, are reduced.

As a result, BBD63a and 63b produce wah sounds.
The reproduced audio signals of the first and second channels with reduced flutter components are extracted, and after the clock components are removed by low-pass filters 64a and 64b, the reproduced audio signals are amplified to an appropriate level by amplifiers 65a and 65b. and further output terminals 67a, 67a, 66b via variable resistors 66a, 66b for adjusting the output voltage.
It is output from 67b.

FIG. 8 shows an example of the wow and flutter reduction characteristics of this embodiment. In the figure, the vertical axis indicates wow and flutter, and the horizontal axis indicates the frequency of the wow and flutter component to be reduced. Input wah/fluttering 7%pp
The wow and flutter reduction characteristic of the circuit shown in FIG. 7 when the value is constant is as shown by 1, which shows a characteristic in which the wow and flutter components are reduced over a wide band.

In addition to BBD, there are other variable delay circuits available.
Of course, a charge transfer device such as a CCD or the like may be used.

As described above, the magnetic reproducing device according to the present invention includes a control head that reproduces an amplitude modulated wave from a control track, and a control head that reproduces the amplitude modulated wave reproduced from the control head every cycle or half cycle. a detection means for detecting;
The detected peak value is reproduced and the level is compared with a reference voltage selected at an intermediate level between the large amplitude portion and the small amplitude portion of the amplitude modulated wave, and the level changes near the amplitude change point of the amplitude modulated wave. digital signal generating means for generating a digital signal that corresponds to the frequency of the carrier wave; pulse generating means that generates a pulse having a repetition frequency substantially equal to that of the carrier wave by detecting the zero cross of the reproduced amplitude modulated wave; It consists of a memory element that sequentially stores data based on the pulses from the pulse generating means, and a logic circuit that determines the pattern of the digital signal stored in the memory element, and takes out the reproduced output of the control signal from the logic circuit and sends it to the servo circuit. At the same time, the pulse generated by the pulse generating means is used as a signal for controlling the delay time of a variable delay circuit provided in the transmission path of the reproduced audio signal of the audio track, thereby reducing the wah and wah signals contained in the reproduced audio signal. By reducing the flutter component,
When simply AM detecting the reproduced amplitude modulated wave, the reproduced output of the control signal could be erroneously extracted due to dropout or noise, but this can be prevented, and therefore the erroneously generated output can be detected. It is possible to prevent the servo circuit from being adversely affected by the control signal.Although the reproduction phase of the present invention is important information, the control signal operates so that the control signal appears at the zero-crossing point of the reproduced amplitude modulated wave, so it has extremely high accuracy. In addition, not only the control signal but also the wah and wah signals of the playback audio signal can be obtained from the control track.
It has features such as being able to reproduce signals for reducing flutter components.

[Brief explanation of drawings]

FIG. 1 is a block system diagram showing an example of a signal recording system previously proposed by the applicant that can be reproduced by the apparatus of the present invention, and FIGS. 2A to 3F and 3A to C respectively show the operation of FIG. Explanatory signal waveform diagram; FIG. 4 is a waveform diagram of an example of an amplitude modulated wave recorded by the signal recording system of FIG. 1;
FIG. 5 is a circuit system diagram showing a control signal reproducing system of an embodiment of the apparatus of the present invention, FIGS. 6A to 6T are signal waveform diagrams for explaining the operation of FIG. 5, and FIG. FIG. 8 is a block system diagram showing the signal reproducing system for reducing wow and flutter according to the embodiment. FIG. 8 is a diagram showing an example of the characteristics of FIG. 7. 1... Composite video signal input terminal, 12... Modulator, 16, 23... Control head, 17...
...Magnetic tape, 18a, 18b...Audio signal input terminal, 21a, 21b...Audio head, 2
6, 37, 38... Comparator, 27... Pilot signal output terminal, 28, 29... Sampling hold circuit, 36... Voltage dividing circuit, 41...
Shift register, 46... Reproduction control signal output terminal, 47, 50, 55... Phase locked loop (PLL), 49, 61a, 61b,
63a, 63b...bucket bridge device (BBD), 58a, 58b...playback audio signal input terminal, 67a, 67b...playback audio signal output terminal.

Claims (1)

[Claims] 1. Amplitude modulation of a carrier wave of a constant frequency higher than the control signal using a constant frequency control signal for causing a rotating head to perform tracking scanning on a track inclined with respect to the longitudinal direction of the magnetic tape. A magnetic reproducing device for reproducing a previously recorded signal of a magnetic tape in which an amplitude modulated wave obtained by the above-mentioned method is recorded on a control track along the longitudinal direction, and an audio signal is recorded on an audio track along the longitudinal direction, a control head for reproducing the amplitude modulated wave from the control track; a detection means for detecting the peak value of the amplitude of the amplitude modulated wave reproduced from the control head every cycle or half cycle; and the detected peak value. A digital signal whose level changes near the amplitude change point of the amplitude modulated wave is obtained by comparing the level with a reference voltage selected to be at an intermediate level between the large amplitude portion and the small amplitude portion of the reproduced amplitude modulated wave. a digital signal generating means for generating a digital signal; a pulse generating means for generating a pulse having a repetition frequency substantially equal to that of the carrier wave by detecting a zero cross of the reproduced amplitude modulated wave; and a pulse generating means for generating a pulse having a repetition frequency substantially equal to that of the carrier wave; a memory element that sequentially stores data based on pulses from the digital signal, and a logic circuit that determines the pattern of the digital signal stored in the memory element, and extracts the reproduced output of the control signal from the logic circuit and sends it to the servo circuit. At the same time, by using the pulses generated by the pulse generating means as a delay time control signal of a variable delay circuit provided in the transmission path of the reproduced audio signal of the audio track, the wah signal contained in the reproduced audio signal is reduced.
A magnetic reproducing device characterized by suppressing flutter components in a low frequency range.