JPH0135305B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a detection device that detects a target position using correlation calculation.

Conventional devices of this type include the following.

FIG. 1 is a diagram showing an example of the configuration of a conventional device, in which 1 is a video signal, 2 is an A/D converter, 3 is a switch, 4 and 5 are gate circuits, 6 and 7 are memories, and 8
9 is a correlation calculation circuit, 9 is a correlation coefficient signal, 10 is a gate shift circuit, 11 is a gate position signal, 12 is a correlation coefficient determination circuit, and 13 is a target position signal.

A video signal 1 is converted into a digital signal by an A/D converter 2. On the initial screen, the switch 3 is connected to the terminal 1 side, and the image within the gate is cut out by the manually set gate circuit 4 surrounding the target and stored in the memory 6.

From the next screen, the switch 3 is connected to the terminal 2 side.

FIG. 2 is a diagram showing the relationship between the screen and the first and second gates, where 14 is the screen, 15 is the first gate, 16 is an image cut out by the first gate, and 17 is a diagram showing the relationship between the screen and the first and second gates. is the second gate, and 18 is the image cut out by the second gate.

In the subsequent screen, the next correlation coefficient is calculated using the image 18 cut out at one setting position of the second gate 17.

Now, the image 16 extracted by the first gate is {ai, j|1≦i≦m, 1≦j≦n}, and the image 18 extracted by the second gate is {bi+k, j+e|1
≦i≦m, 1≦j≦n}. Here, (k,
l) represents the position of the second gate, e.g.
(k,l)=(0,0) indicates that the second gate is in the upper left corner of the diagram.

At this time, the next correlation coefficients Ck and e are calculated by the correlation calculation circuit 8.

Ck, e= _o 〓 ^j=1 _n 〓 ⁱ⁼¹ |bi+k,j+e−ai,j|
......(1) When Ck and e are obtained for one (k, e), the gate shift circuit 10 shifts the second gate position from l to l+1, or shifts the second gate position to the screen When you reach the right end of 14, k→k+
The second gate position is moved from 1, l to 0, and the correlation coefficient is similarly determined at the new position.

FIG. 3 is a diagram showing an example of the distribution of Ck, e at each (k, e) position. At k=k ₁ , l=l ₁ , the image 18 matches the image 16 best, and in this case,
Ck and e indicate the arithmetic value.

The correlation coefficient signal representing Ck, e is input to the correlation coefficient determination circuit 12, and at the same time, the gate position signal 11 representing (k, e) is input, where:
(k, e) at which Ck, e is the minimum is detected and output as the target position signal 13.

This target position signal 13 is a signal indicating the position of the image that most closely matches the image 16 of the target to be tracked, so if this signal is inputted to, for example, a servo mechanism that controls the optical axis direction of the imager, it is possible to will be tracked.

By the way, in the conventional device of this kind, the calculation of equation (1) requires (n x m) additions and subtractions and absolute value conversion, and also (k x e) times.
It is necessary to calculate equation (1).

For example, if m=n=30, k=e=30,
8.1×10 ⁵ times (addition + subtraction + absolute value calculation) are required, and even if the time for each calculation is 1 microsecond, in order to calculate all Ck and e,
It takes 0.8 seconds to track the target in real time, making it extremely difficult or impossible to track the target in real time.

The present invention provides a means to eliminate these drawbacks through data compression, and includes the following:
This invention will be explained in detail using figures.

FIG. 4 is a diagram showing one embodiment of the configuration of the present invention, in which 19 and 20 are adder circuits, 21 and 22 are memories, which A/D convert the video signal 1, and gate circuits in the initial screen. 4, the process in which the image 16 is cut out by the first gate 15, and the process in which the image 18 is cut out by the second gate 17 in the subsequent screen by the gate circuit 5 are the same as those in the conventional device, and therefore will not be explained. omitted.

FIG. 5 is a diagram showing a data compression method, in which an image 16 {ai, j
|1≦i≦m, 1≦j≦n}, the addition circuit 19 calculates the next data {pi
|1≦i≦m} and {qj|1≦j≦n}.

p _i = _o 〓 ^j=1 a _i,j ………(2) q _j = _n 〓 ⁱ⁼¹ a _i,j ………(3) Similarly, the image 18 cut out by the gate circuit 5
{b _i+k,j+e |1≦i≦m, 1≦j≦n} is the next data {u _i |1≦i≦m, as shown in FIG. }, and {v _j |1≦j≦
n}.

u _i ^(k,e) = _o 〓 ^j=1 b _i+k,j+l ………(4) v _j ^(k,e) = _n 〓 ⁱ⁼¹ b _i+k,j+l …… (5) FIGS. 6a and 6b are diagrams showing an example of storing the compressed data in the memories 21 and 22, respectively. As a result of data compression, the capacity required for memory is reduced compared to the conventional (i×
It can be seen that the number of pixels decreases significantly from pixel j) to pixel (i+j).

In the correlation calculation circuit 8, the following calculation is executed using these compressed data.

Dk, e= _n 〓 ⁱ⁼¹ ｜u _i −p _i ｜+ _o 〓 ^j=1 ｜v _j −q _j ｜ ………(6) The correlation coefficient signal 9 obtained by the calculation of the above formula is As in the conventional device, the signal is input to the correlation coefficient determination circuit 12, and (k, e) for which Dk, e is the minimum is detected, and the target position is detected.

By the way, when we find the arithmetic circuit for the calculation of equation (6), we get
(m+n) x (k x e) times (addition + subtraction + absolute value calculation), therefore, the time required for correlation calculation is reduced to (m + n) / mn in the case of the conventional device. Recognize.

For example, if we use the above example m = n = 30, k = l = 30, the number of calculations will be 5.4 × 10 ⁴ and the calculation time will be 54 milliseconds, 1/15 of the conventional time, so in real time. It can be seen that the target tracking performance is significantly improved.

Note that since the addition operations in equations (2) to (5) can be executed in parallel with the pixel reading scan of the screen, the increase in calculation time due to this can be almost ignored.

As described above, according to the present invention, the correlation calculation time can be significantly reduced, so that the target detection speed can be increased and the target tracking performance can be improved.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of a conventional device, FIG. 2 is a diagram showing the relationship between the screen and the first and second gates,
FIG. 3 is a diagram showing correlation coefficients, FIG. 4 is a diagram showing an embodiment of the configuration according to the present invention, FIG. 5 is a diagram showing a data compression method, and FIG. 6 is a diagram showing a method for storing compressed data in memory. It is a figure showing one example. In the figure, 4 and 5 are gate circuits, 8 is a correlation calculation circuit, 10 is a gate shift circuit, 12 is a correlation coefficient determination circuit, 19 and 20 are adder circuits, and 21 and 22 are memories. In addition, in the drawings, the same or corresponding parts are denoted by the same reference numerals.

Claims (1)

[Claims] 1 The image cut out by the first gate surrounding the target is memorized in the initial screen, and in the subsequent screen,
In a target position detection device that detects a target position by determining the position of an image that most closely matches the image cut out by the first gate, the pixels of the image cut out by the first gate are horizontally and a first storage means for performing addition in the vertical direction and storing both addition results in a predetermined order; means for generating a second gate having the same dimensions as the first gate in a subsequent screen; The pixels of the image cut out by the gate are added horizontally and vertically, and the results of both additions are expressed as
a second storage means for storing in the predetermined order; a calculation means for calculating the degree of coincidence between the contents of the first storage means and the contents of the second storage means;
A method for shifting the second gate installation position in the horizontal or vertical direction by a pitch that is an integral multiple of one pixel, and a means for shifting the second gate installation position in the horizontal or vertical direction, and a method that determines the best match among the coincidence degrees calculated at each installation position of the second gate. The degree becomes higher,
A target position detection device comprising: means for detecting the installation position of the second gate.