JPH0134458Y2 - - Google Patents
Info
- Publication number
- JPH0134458Y2 JPH0134458Y2 JP5225582U JP5225582U JPH0134458Y2 JP H0134458 Y2 JPH0134458 Y2 JP H0134458Y2 JP 5225582 U JP5225582 U JP 5225582U JP 5225582 U JP5225582 U JP 5225582U JP H0134458 Y2 JPH0134458 Y2 JP H0134458Y2
- Authority
- JP
- Japan
- Prior art keywords
- mixer
- output terminal
- circuit
- series
- trap
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 10
- 230000005236 sound signal Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Television Signal Processing For Recording (AREA)
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
Description
【考案の詳細な説明】
この考案は例えばVTR（ビデオテープレコー
ダ）或は磁気デイスク再生装置等に利用して好適
なミクサ兼トラツプ回路に関し、特に信号の減衰
量を少なくしSN比のより混合信号を得ると共に
部品点数を少なくし安価に作ることができるミク
サ兼トラツプ回路を提供しようとするものであ
る。[Detailed description of the invention] This invention relates to a mixer/trap circuit suitable for use in, for example, a VTR (video tape recorder) or a magnetic disk playback device, and in particular, it reduces signal attenuation and improves the signal-to-noise ratio of mixed signals. The present invention aims to provide a mixer/trap circuit which can be manufactured at low cost by reducing the number of components.
〈考案の背景〉
VTR或はデイスク装置のような映像信号と音
声信号を別々のトラツクから再生し、これを混合
して受像機に供給する装置においては映像信号と
音声信号をミクサによつて混合し、受像機に供給
するようにしている。音声信号及び映像信号には
相互に例えばクロストーク等により不要信号が含
まれる場合が多い。従つて信号を混合すること
と、相互に含まれる不要信号を除去することが要
求される。<Background of the invention> In a device such as a VTR or disk device that reproduces video and audio signals from separate tracks, mixes them, and supplies them to a receiver, the video and audio signals are mixed by a mixer. and supplies it to the receiver. Audio signals and video signals often contain unnecessary signals due to crosstalk or the like. Therefore, it is required to mix the signals and remove unnecessary signals contained in each other.
〈従来の説明〉
このような理由から従来は第１図及び第２図に
示すように直列抵抗器１並列抵抗器３とによつて
構成したミクサMXと、コイルＬとコンデンサ
C1，C2と抵抗器２とによつて構成したトラツプ
回路Ｔを直列に接続している。<Conventional Description> For these reasons, conventionally, as shown in FIGS.
A trap circuit T composed of C 1 , C 2 and a resistor 2 is connected in series.
つまり第１図の例ではミクサMXによつて二つ
の信号を混合し、混合された信号から不要成分を
トラツプ回路Ｔによつて除去するようにした場合
を示す。 In other words, the example shown in FIG. 1 shows a case where two signals are mixed by mixer MX and unnecessary components are removed from the mixed signal by trap circuit T.
また第２図の例では二つの信号から予め不要信
号を除去しその後にミクサMXにより混合するよ
うにした場合を示す。 The example shown in FIG. 2 shows a case where unnecessary signals are removed from two signals in advance and then mixed by mixer MX.
このように従来はミクサMXとトラツプ回路Ｔ
とを直列接続して用いるものであるから入力端子
IN1及びIN2と出力端子OUTとの間に少なくとも
２本の抵抗器１と２が直列接続されることとな
る。 In this way, conventional mixer MX and trap circuit T
Since it is used by connecting in series, the input terminal
At least two resistors 1 and 2 are connected in series between IN 1 and IN 2 and the output terminal OUT.
〈従来回路の欠点〉
従来の回路はミクサMXとトラツプ回路Ｔとを
直列に接続するものであるため、信号伝送路上に
これらミクサMXとトラツプ回路Ｔを構成する２
本の抵抗器１と２が直列に挿入されることとなり
この部分で信号の減衰を受け、SN比を悪くして
いる。<Disadvantages of the conventional circuit> Since the conventional circuit connects the mixer MX and the trap circuit T in series, there are two
Since resistors 1 and 2 are inserted in series, the signal is attenuated in this part, worsening the S/N ratio.
このため第３図に示すような回路が与えられ
る。この回路によればトラツプ回路Ｔを構成する
抵抗器２が抵抗器３とによつてミクサMXを構成
する。従つてこの第３図の回路によれば入力と出
力端子IN1−OUT及びIN2−OUTとの各間には
直列抵抗器２が一本だけ存在するだけとなる。よ
つてSN比を改善することができる。 For this purpose, a circuit as shown in FIG. 3 is provided. According to this circuit, resistor 2 forming trap circuit T and resistor 3 form mixer MX. Therefore, according to the circuit of FIG. 3, only one series resistor 2 is present between the input and each of the output terminals IN 1 -OUT and IN 2 -OUT. Therefore, the signal-to-noise ratio can be improved.
この第３図の回路は第１図及び第２図の回路と
比較すれば抵抗器が二本分だけ少なくなつており
部品数を少なくできる利点が得られる。然しトラ
ツプ回路Ｔの双方にコイルＬを必要とし、部品点
数を充分少なくしたとは言い難い。またトラツプ
周波数の調整をコイルＬにおいて各別に行なわな
くてはならないため調整個所が多いためこの点で
人手を食いコスト高となる。 The circuit shown in FIG. 3 has two fewer resistors than the circuits shown in FIGS. 1 and 2, and has the advantage of reducing the number of components. However, the coils L are required on both sides of the trap circuit T, and it cannot be said that the number of parts has been sufficiently reduced. Further, since the trap frequency must be adjusted separately for each coil L, there are many adjustment points, which requires labor and increases costs.
〈考案の目的〉
この考案の目的はSN比のより、然も部品点数
を少なくでき、安価に作ることができることと、
調整個所を一点とし、調整の人手をも少なくでき
るミクサ兼トラツプ回路を提供するにある。<Purpose of the invention> The purpose of this invention is to improve the signal-to-noise ratio, reduce the number of parts, and make it inexpensive.
To provide a mixer/trap circuit which requires only one adjustment point and can reduce the amount of labor required for adjustment.
〈考案の実施例〉
第４図にこの考案の一実施例を示す。この考案
では一つのコイルＬを２つのトラツプ回路Ｔにお
いて兼用し、更にトラツプ回路Ｔを構成する抵抗
器２をミクサに兼用するように構成したものであ
る。<Example of the invention> Fig. 4 shows an example of the invention. In this invention, one coil L is used for two trap circuits T, and the resistor 2 constituting the trap circuit T is also used for a mixer.
つまり、入力端子IN1とIN2に２本の直列抵抗
器２の各一端を接続し、この２本の直列抵抗器２
の他端を共通接続して出力端子OUTに接続する。
出力端子OUTと共通電位点４との間に並列抵抗
器３を接続し、これら抵抗器２と抵抗器３とによ
つてミクサMXを構成するものである。 In other words, connect one end of each of two series resistors 2 to input terminals IN 1 and IN 2 , and connect these two series resistors 2
Connect the other ends in common and connect to the output terminal OUT.
A parallel resistor 3 is connected between the output terminal OUT and the common potential point 4, and these resistors 2 and 3 constitute a mixer MX.
更に入力端子IN1とIN2それぞれにコンデンサ
C1，C2の各一端を接続し、コンデンサC1，C2の
他端を共通接続し、その共通接続点と共通電位点
との間に一個のコイルＬを接続する。コンデンサ
C1，C2とコイルＬとの共通接続点と出力端子
OUTの間にコンデンサC3を接続する。 Furthermore, a capacitor is connected to each input terminal IN 1 and IN 2 .
One end of each of C 1 and C 2 is connected, the other ends of capacitors C 1 and C 2 are commonly connected, and one coil L is connected between the common connection point and the common potential point. capacitor
Common connection point between C 1 , C 2 and coil L and output terminal
Connect capacitor C3 between OUT.
〈考案の作用効果〉
このように構成することによりこの考案によれ
ば抵抗器２と３によつてミクサMXを構成すると
共に抵抗器２とコンデンサC1，C3及びC2，C3と
コイルＬによつて２つのトラツプ回路を構成する
ことができる。このトラツプ回路のトラツプ周波
数tは
t＝１／2π√（C1＋C2＋C3）Ｌ
により決められる。<Operation and Effect of the Invention> With this configuration, according to this invention, the mixer MX is configured by the resistors 2 and 3, and the resistor 2, the capacitors C 1 , C 3 , C 2 , C 3 and the coil Two trap circuits can be constructed by L. The trap frequency t of this trap circuit is determined by t = 1/2π√(C 1 +C 2 +C 3 )L.
従つてこの考案によれば入力端子IN1，IN2と
出力端子OUTとの間にはそれぞれに一本の抵抗
器２が存在するだけであるため信号の減衰を少な
くでき、SN比のよい混合出力を得ることができ
る。更に二つのラツプ回路は一つのコイルＬを兼
用したから部品点数を少なくできる。特にこの回
路中でコイルが最もコストが高い部品であるため
大幅なコストダウンが期待できる。然もコイルＬ
が一個で済むためトラツプ回路のトラツプ周波数
設定のための調整個所を一点にすることができ
る。よつて調整のための人手を少なくでき、この
点でもコストダウンを期待できる。 Therefore, according to this invention, since there is only one resistor 2 between each of the input terminals IN 1 and IN 2 and the output terminal OUT, signal attenuation can be reduced and mixing with a good S/N ratio can be achieved. You can get the output. Furthermore, since the two wrap circuits share one coil L, the number of parts can be reduced. In particular, since the coil is the most expensive component in this circuit, a significant cost reduction can be expected. Natural coil L
Since only one trap circuit is required, only one adjustment point is required for setting the trap frequency of the trap circuit. Therefore, it is possible to reduce the amount of labor required for adjustment, and in this respect, it is expected that costs will be reduced.
以上説明したようにこの考案によれば安価で然
もSN比のよいミクサ兼トラツプ回路を提供でき
る。 As explained above, according to this invention, it is possible to provide a mixer/trap circuit that is inexpensive and has a good signal-to-noise ratio.
第１図及び第２図は従来のミクサとトラツプ回
路の組合せを説明するための接続図、第３図は従
来の改良案を説明するための接続図、第４図はこ
の考案の一実施例を示す接続図である。
IN1，IN2：入力端子、OUT：出力端子、２：
直列抵抗器、３：並列抵抗器、C1，C2，C3：コ
ンデンサ、Ｌ：コイル。
Figures 1 and 2 are connection diagrams for explaining the combination of a conventional mixer and trap circuit, Figure 3 is a connection diagram for explaining a conventional improvement plan, and Figure 4 is an example of an embodiment of this invention. FIG. IN 1 , IN 2 : Input terminal, OUT: Output terminal, 2:
Series resistor, 3: parallel resistor, C 1 , C 2 , C 3 : capacitor, L: coil.
Claims (1)
ぞれ直列接続した複数の直列抵抗器と、 Ｂ 上記出力端子と共通電位点の間に接続した並
列抵抗器と、 Ｃ 上記複数の入力端子に各一端が接続され他端
が互に共通接続された複数のコンデンサと、 Ｄ 上記出力端子に一端が接続され他端が上記コ
ンデンサの共通接続点に接続されたコンデンサ
と、 Ｅ これらコンデンサの共通接続点と共通電位点
の間に接続したコイルと から成るミクサ兼トラツプ回路。[Claims for Utility Model Registration] A. A plurality of series resistors connected in series between a plurality of input terminals and a common output terminal, B. A parallel resistor connected between the above output terminal and a common potential point, C. a plurality of capacitors each having one end connected to the plurality of input terminals and the other ends commonly connected to each other; D a capacitor having one end connected to the output terminal and the other end connected to a common connection point of the capacitors; E A mixer/trap circuit consisting of a coil connected between the common connection point of these capacitors and the common potential point.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5225582U JPS58155618U (en) | 1982-04-09 | 1982-04-09 | mixer and trap circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5225582U JPS58155618U (en) | 1982-04-09 | 1982-04-09 | mixer and trap circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58155618U JPS58155618U (en) | 1983-10-18 |
| JPH0134458Y2 true JPH0134458Y2 (en) | 1989-10-19 |
Family
ID=30062966
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5225582U Granted JPS58155618U (en) | 1982-04-09 | 1982-04-09 | mixer and trap circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58155618U (en) |
-
1982
- 1982-04-09 JP JP5225582U patent/JPS58155618U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58155618U (en) | 1983-10-18 |
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