JPH0132519B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a monitoring device that displays changes in the status of monitored equipment using a dynamic lighting method, and particularly to improvements to its display control unit.

2. Description of the Related Art In monitoring devices for various types of equipment, when a change in the status of a monitored device is displayed using a flicker display or the like, the display is generally performed using a static lighting method. As shown in Fig. 1, this static lighting method uses a microprocessor MP to process the device state change signals from the input contacts X ₁ to Xn applied to the digital input section D ₁ , and then outputs the results to the digital output section DO. After storing the information in the memories M ₁ to Mn, the outputs of the memories M ₁ to Mn are given to the drivers (e.g. photocoupler) DR ₁ to PRn to light up the indicator lights (light emitting diodes) L ₁ to Ln. Therefore, there is a one-to-one correspondence between the monitored device and the memory.

In this configuration where devices and memories correspond one-to-one, as the number of input points increases, not only does the amount of output cables required increase, but it is also necessary to increase the number of display memories M ₁ to Mn. Problems arise such as an increase in the cost required for laying the cable and an increase in the installation space.

For this reason, instead of the static lighting method,
Recently, dynamic lighting methods are being adopted. As shown in Fig. 2, this lighting method consists of n row lines, each end of which is connected to the power supply (-) end for the indicator light via drivers _PRA1 to PRAn, and each end of which is connected to a current limiting resistor _R1 . ~Rm and driver DRB ₁ ~
Light emitting diodes L ₁₁ to Lmn as indicator lights are arranged at each intersection with m column lines connected to the power supply (+) end for indicator lights via PRBm, and row drivers DRA ₁ to DRAn are arranged as indicator lights. They are turned on sequentially at regular intervals, read out the memory contents, and use the data to operate the column drivers DRB ₁ to DRBm.

For example, when lighting the light emitting diode L ₁₁ , when the row driver DRA ₁ turns on, the memory contents are read out in a predetermined order and the column driver DRA 1 is turned on.
When _the driver DRB ₁ is turned on, the light emitting diode L ₁₁ lights up. in this case,
The values of the current limiting resistors R ₁ to Rm shall be selected so that a current that is a required multiple of the average current (current when continuously energized) flows through the light emitting diode L ₁₁ (the same applies to other light emitting diodes). . If the operation of the row driver is below the next column DRA ₂ , the light emitting diode will not light up, and when the driver DRA ₁ is turned on again and the column driver DRB ₁ is turned on, the light emitting diode L ₁₁ will light up. . That is, the light emitting diode _L11 is lit intermittently. However, even if the lighting is intermittent,
If the light continues more than 100 times per second, it will be perceived by the human eye as continuous light.

In such a dynamic lighting system, (m+
By controlling n) drivers, it is possible to light up (m x n) light emitting diodes, which requires less cable installation and installation space compared to a static lighting system in which drivers and light emitting diodes correspond one-to-one. It is advantageous.

However, the dynamic lighting method has the following drawbacks. That is, when all the light emitting diodes in one column are lit, the row driver DRA ₁ ~
When DRAn are turned on one after another, the driver in that column, for example DRB ₁ , is always on, which causes the light emitting diodes to continue lighting up. At this time, if a failure occurs in one of the row drivers, for example driver DRA ₁ , causing it to become conductive, a current that is a required multiple of the constant average current will flow through the light emitting diode L ₁₁ . The maximum current of the light emitting diode is determined by the frequency division ratio determined by the lighting time and the number of row drivers DRA ₁ to PRAn, and if a current considerably larger than the constant average current flows, the light emitting diode will be destroyed. Therefore, unless some measure is taken, equipment monitoring will be hindered and reliability will be reduced.

The present invention has been made in view of the above circumstances, and includes a circuit that detects an abnormality in a group of drivers that are turned on sequentially at regular intervals, and when an abnormality is detected, stops the operation of a group of drivers that operate according to the memory contents. , the purpose is to provide a highly reliable monitoring device.

Hereinafter, the present invention will be explained in detail based on illustrated embodiments.

FIG. 3 shows one embodiment of the present invention.
Components that are the same as those in the figures and FIG. 2 are given the same reference numerals. In the figure, MP is a microprocessor, _L11 to Lmn are light emitting diodes as indicator lights that indicate changes in the status of the monitored equipment, and as in Figure 2, there are n row lines and m column lines. are placed at each intersection. DRA ₁ -DRAn are drivers that are controlled to turn on sequentially at fixed time intervals, DRB ₁ -DRBm are drivers that are controlled according to memory contents, and the connections between both driver groups are the same as in FIG. 2.

Mo is a memory that records data such as lighting commands, flicker types, device status, etc. processed by the microprocessor MP, CO is a control circuit that controls according to the data contents when the contents of this memory Mo are read, and Md is the data memory, G ₁ is the driver PRB ₁ of the contents of this data memory Md
AR is a gate circuit that controls the application to PFBm, AR is an address register that determines the address when storing the calculation result of the microprocessor MP in the memory Mo, and AC is an address switching circuit.

CP is an oscillator that oscillates pulses with a constant period,
CT ₁ and CT ₂ are counters that frequency divide the output pulse of the oscillator CP, and the outputs of both counters CT ₁ and CT ₂ are applied to the address switching circuit AC as a read address signal. DE outputs the output of counter CT ₂ from said driver DRA ₁ ~DRAn accordingly
A decoder _G2 converting the decoder DE into an alternative selection signal is a gate circuit that controls the application of the output of the decoder DE to the drivers _DRA1 to DRAn, and receives a gate control signal from the counter _CT1 every predetermined count value.
TM is retrigger timer, Ml is latch memory,
Upon receiving an off signal due to time-up of the timer TM, it determines that an abnormality exists and sends a control signal to open the gate to the gate circuit _G1 and an abnormality detection signal to the microprocessor MP.

DRo is a driver (photocoupler) that generates a drive signal for the timer TM, and its light emitting part is connected between the (+) end of the power supply for the indicator light and each row line via diodes D ₁ to Dn, and section is when the light emitting section is not emitting light, that is, when the driver DRA ₁ ~ DRAn
The power supply and the timer TM are connected to the power supply and the timer TM so that a signal having a logic level "1" when the timer TM is turned off is applied to the timer TM as a drive signal.

Note that the retrigger timer TM is
Set the time to approximately 1.5 times the on time of DRA ₁ to DRAn.

Next, the operation will be explained with reference to the time chart shown in FIG. The device status input is processed by the microprocessor MP, and is written to the memory MO by specifying the write address in the address register AR.
Data such as lighting commands, flicker types, device status, etc. are stored one by one.

On the other hand, the oscillator CP oscillates a pulse with a constant period, which is frequency-divided by the pulse counters CT ₁ and CT ₂ and sent to the address switching circuit AC as a read address of the memory Mo. Therefore, the memory contents at this address are read. The read data is guided to the control circuit CO, controlled according to the data content, and stored in the data memory Md. The contents of this memory Md are applied to the drivers DRB ₁ to DRBm through the gate circuit G ₁ and the corresponding drivers are turned on.

Further, only one output of the counter _CT2 is outputted by the decoder DE, and is applied to the drivers _DRA1 to DRAn through the gate circuit _G2 . As a result,
One of the drivers DRA ₁ to DRAn is turned on, and a light emitting diode corresponding to the combination with the turned-on drivers DRB ₁ to DRBm is lit under the control of the above-mentioned memory contents. This lighting is for driver DRA ₁ ~
This is done continuously by sequential operation of DRAn.

In this case, when the drivers DRA ₁ to DRAn are sequentially switched, the driver DRo is turned on according to the on operation, and a drive signal for the timer TM is generated at the interval. This drive signal starts the operation of the timer TM, but since the next drive signal arrives before the set time elapses, there is no time-up. Therefore, the output of the latch memory Ml is also normal, the gate circuit _G1 is maintained in the closed state, and the device status is displayed normally.

Note that the gate circuit _G2 receives a gate "open" control signal every predetermined count value of the counter _CT1 . Therefore, there will be a time when none of the drivers DRA ₁ to DRAn are turned on.

By the way, if driver DRA ₁ does not turn on at the time when it should be turned on (position a in Figure 4), or if driver DRA ₁ does not turn off at the time when it should turn off (position b in Figure 4), , the arrival of the next timer drive signal is delayed and the retrigger timer TM times up. This time-up causes the abnormality to be stored in the latch memory Ml, which causes the gate circuit _G1 to become "open" and the drivers _DRB1 to DRBm to open.
is turned off, and destruction of the light emitting diodes L ₁₁ to Lmn is prevented. At the same time, an abnormality detection signal is sent to the microprocessor MP, and appropriate measures are taken.

The following failure modes are targeted for the protective operation accompanying the above abnormality detection.

(i) Oscillator stops oscillating (ii) Counter CT ₁ stops operating (iii) Counter CT ₂ circulates at a specific point (iv) Decoder cannot output (v) Gate circuit cannot output or loss of blocking function (vi) Inability to output or loss of output stop function of drivers DRA ₁ to DRAn As described above, according to the present invention, abnormalities in display control functions can be monitored over a wide range, and destruction of light emitting diodes, which would be a fatal defect, can be prevented. It becomes possible to reliably prevent this, and the reliability of display is greatly improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a static lighting type monitoring device, FIG. 2 is a circuit diagram showing an example of the configuration of a display circuit of a dynamic lighting type monitoring device, and FIG. 3 is an example of a monitoring device according to the present invention. FIG. 4 is a block circuit diagram showing the embodiment and a time chart for explaining the operation of the embodiment. DRA ₁ ~DRAn and DRB ₁ ~DRBm... Indicator light driver, PRo... Timer driver, TM...
...Retrigger timer, Ml...Latch memory, Mo
...Memory, Md...Data memory, CO...Control circuit, _G1 and _G2 ...Gate circuit, CP...Oscillator, _CT1 and _CT2 ...Counter, _L11 to Lmn...
Light emitting diode, MP...microprocessor.

Claims (1)

[Claims] 1 The light emitting diodes are intermittently activated by a first driver group that is controlled by the memory contents that are processed by a microprocessor and stored in the memory, and a second driver group that is turned on sequentially at regular intervals. In a monitoring device having a display control unit of a dynamic lighting type that displays a status by emitting light, a gate circuit for intermittently operating the driver group is provided at a stage before the second driver group, and a gate circuit for intermittently operating the driver group is provided, and A retrigger timer and latch memory are provided to monitor the continuation state, and the first
A monitoring device characterized in that a gate circuit which receives a control signal from the latch memory and becomes "open" when an abnormality is detected is provided in the front stage of the driver group.