JPH01310490A - Picture processor - Google Patents

Abstract

PURPOSE:To frame the contour part of a picture and to improve the emphasis of the picture and easiness to see by executing a color conversion to a color designated in the extracted contour part. CONSTITUTION:When an area is designated, whether the area designation is for a first contour processing or for a second contour processing is decided, and at the time of the area designation of the second contour processing, it is set. Data corresponding to the inputted designated area are set at a memory part in an area generating circuit 615. At the time of output area designation, whether or not the outside of the contour part is outputted is decided, and when it is not outputted, the outside of the contour part is prevented from being outputted by first and second contour processing circuit 68 and 617. Next, whether a red or a black is obtained for the contour is decided, at the time of the red, a forcible bit is decided as the read, and at the time of the black, the forcible bit is decided as the black.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image IA embedding device, and particularly to an image processing device that performs color conversion on an image.

[Prior Art] Conventionally, this type of device identifies a specified color as a color before conversion, and converts it to a specified second color.

Therefore, depending on the color, it is possible to perform color conversion for areas where areas cannot be specified, such as creating a frame of a desired color to emphasize the outline of a figure or making it easier to see, or adding shadows. There wasn't.

Therefore, in this type of device, for example, as shown in FIG.
The only way to obtain an output image like the one shown in FIG. 5(C) was to draw an outline on the document shown in FIG.

[Problems to be Solved by the Invention] The present invention provides an image processing device that eliminates the drawbacks of the conventional example and frames the outline of an image to enhance the image and improve visibility.

The present invention also provides an image processing device that emphasizes the image and improves its visibility by adding a shadow to the image.

Furthermore, the present invention provides an image processing device that enhances the image of a designated area and improves its visibility.

Specifically, if you have a normal manuscript like nest 5 (C),
Output images such as those shown in FIGS. 5(a) and 5(b) are obtained.

[Means for Solving the Problem] In order to solve this problem, the image processing device of the present invention has the following features:
Contour extracting means for extracting the contour of an image, conversion color specifying means for specifying a conversion color for the contour, and color conversion means for performing color conversion on the extracted contour to the specified conversion color. Equipped with.

The color conversion means includes conversion area changing means for changing the conversion area in accordance with the position of the outline.

The image forming apparatus further includes area specifying means for specifying an area of the image.

[Operation] In this configuration, the color conversion means performs color conversion on the contour extracted by the contour extracting means to the conversion color designated by the conversion color designation means.

Further, the conversion area changing means changes the conversion area in accordance with the position of the contour portion.

Further, the color conversion means performs color conversion on the outline within the area designated by the area designation means.

[Example] FIG. 1 is a block diagram of the image processing apparatus of this embodiment.

First, in this embodiment, processing using two colors, red and black, will be explained.

The image processing apparatus of this embodiment includes a reading section 61 that reads a document and outputs 7-bit image data including red and black bits that determine red and black output, a video data multiplexer 62 that determines the edge of the data. Four memory panchromators 3 to 66, an address multiplexer 67 that determines which address in which memory bank to store data, a write address counter 619, and a read address counter 620.
, a first contour processing circuit 68 that performs contour processing 1, and contour processing 2
a second contour processing circuit 617 that performs contour processing, a non-processing circuit 69 that does not perform contour processing, a CPU 610 for calculation and processing, an operation unit 611 operated by an operator such as a keyboard, a digitizer 614 that specifies an area, and an area that generates an area signal. A generation circuit 615, a ROM 616 for storing a processing program for the CPU 510, a RAM 618 for auxiliary storage, a non-processing circuit 69, a first contour processing circuit 68, and a second contour processing circuit 617.
It has a selector 612 that selects one of the outputs from the area generation circuit 615 in accordance with the output of the area generation circuit 615, a red/black determination circuit 70 that determines red and black, and a printer 613 that performs printing in two colors, red and black. The values of each processing section are set and controlled by the CPU 610 via a bus 609, and the video data multiplexer 62, each processing circuit, and the red/black judgment circuit 70 are connected to a communication line 614 through which data of one line before the line of interest passes. , a communication line 615 through which data of the line of interest passes, and a communication line 616 through which data one line after the line of interest passes, as shown in the figure.

The 7-bit image data including red and black bits sent from the reading section 61 is sequentially written into the memory panchromators 3 to 66 by one line of data by a video data multiplexer 62 and an address multiplexer 67. First, one line of data is written for three lines in each of the memory panchrographs 3 to 65, and when the next line starts to be written to the memory bank 66, the data in the memory panchros 3 to 65 is read out in synchronization with that. The processed data is sent to the first contour processing circuit 68 and the second contour processing circuit 617 via communication lines 614, 615, 616, and only the data of the line of interest is also sent to the non-processing circuit 69.

Then, when the writing to the memory bank 66 is finished and the writing to the memory panchromatic 3 starts, the data of the memory panchromatic 4 to 66 is read out, and the data from the memory panchromatic 4 is replaced with the data of the previous line and the memory panchrono 5
The data of the line of interest becomes the data of the line of interest, and the data of the memory bank 66 becomes the data of the next line. The above operation is performed sequentially for all lines using the four memory panchromatics 3 to 66.

On the other hand, the selection of contour processing 1/contour processing 2/no processing and the area thereof are determined by human power from the digitizer 614 and the operation unit 611.

When performing contour processing 1.2, the density slice level and whether or not to output parts other than the color 2 contour after contour processing are determined.If no processing is performed, negative/positive etc. are determined, and the image data 714 and The red and black bit data 108 is the printer 613
will be forwarded to.

FIG. 3 is a flowchart showing the operation of the CPU 610 in this embodiment. Note that the flowchart only shows steps that are particularly relevant to this embodiment.
Negative/Positive Setting 2 Slice level settings for contour processing, etc. are lumped together as other processing and are not shown in detail.

First, by operating the operation unit 611, step SIO
Specify the area with , or specify the output area with step Sho ``t'',
In step S30, it is determined whether the output color is specified.

In the case of area specification, proceed to step Sll, determine whether it is area specification for the first outline processing or area specification for the second outline processing,
In the case of specifying an area for S2 contour processing, it is set in step S12 that it is second contour processing. Here, if the second contour process is not performed, the first contour process is performed, and if neither the first nor the second contour process is performed, no process is performed. Next, in step S13, a designated area is input using the digitizer 614. In order to simplify the operation, it is preferable to input this area using two points. In step 314, the data corresponding to the specified area manually input is set in the storage section in the area generation circuit 615. Setting to the storage section in the area generation circuit 615 will be explained in detail in the explanation of the area generation circuit 615 below.

In the case of specifying the output area, the process proceeds to step S21 to determine whether or not to output the area outside the contour area, and if not to output, the process proceeds to step S22 where the first and second ring 5IS processing circuits 68, which will be explained in detail later, In step 617, output outside the contour is prevented.

Here, it is assumed that the setting is normally set to output outside the contour.

If the output color is specified, the process advances to step S31, and the red/black determination circuit 70, which will be described in detail later, is set to forced bit mode.

Next, in step S32, it is determined whether the outline is red or black. If the outline is red, the compulsory bit is set to red in step S33, and if it is black, the compulsory bit is set to black in step S34.

If the above-mentioned area designation, output region designation, or output color designation is not specified, the process proceeds to step S40, and, for example, designation of a slice level for negative/positive designation 1 contour determination and other operations are performed.

FIGS. 2A to 2F are diagrams for explaining the operation of the area generation circuit 104.

The area referred to here is, for example, the shaded area 20 in FIG. 2(E).
This refers to the ARE timing chart shown in the timing chart of Figure 2 (E) for each line in the sub-scanning direction, or in other words, for each horizontal synchronization signal (H3YNC).
It is distinguished from other areas by a signal like A. Note that such an area is designated by the digitizer 106.

Figures 2 (A) to (D) show the generation position 1 of this area signal °.
In the one-line configuration, in which the number of sections with one section length is programmable and can be obtained in large numbers by cpueio, one-tree area signal is constituted by one bit of RAM accessible by the CPU 810, and for example, one In order to obtain the area signals AREAI~AREAn, the second
As shown in Figure (D), each RA has an n-bit configuration.
It has M21.22.

Now, the area signal AREAI as shown in FIG. 2(B)
.about.AREAn, the addresses χ1. Set 1” to bit O of χ3, and set all bits O of the remaining addresses to “
Set it to 0”.

On the other hand, addresses 1. of RAM21 and 22. χ1゜χ2. χ
The bit (n-1) of address 4 is set to "1", and the bits (n-1) of other addresses are all set to "0".

Here, when the data in the RAMs 21 and 22 is read sequentially in synchronization with a constant clock using the H3YNC signal 27 as a reference, the address χ is obtained, for example, as shown in FIG. 2(C).

The data “E” is read at the χ3 portion.

This read data is shown in FIG. 2(D) 28-1 to 28.
The n number of J- indicated by -n is input to both terminals of the flip-flop J. Therefore, the output of each flip-flop is toggled, that is, RAM21 (22)
When 1" is read out and VCLK is input, the outputs of those flip-flops are 0"-'1", "i"→"0
”, and an interval signal, ie, an area signal, such as AREA1 shown in FIG. 2(C) is generated.
If the data is set to "0" over all addresses 21 and 22, no area section is generated and no area is set.

In addition, in order to switch the area section at high speed, for example, RA
While data is being read line by line from the MA21, the CPU 610 performs a memory write operation for setting a different area in the RAM22.
21 and 22 alternately to output the area signal and C
Switch memory writing from PU610.

Therefore, when specifying the shaded area shown in Figure 2 (F),
RAM like A→B→A→B→A (A) 21 and RAM
(B) 22 is switched, which means that in FIG. 2 (D), if (C3, C4, C3) = (0, 1, O),
The output of address counter 30 counted by VCLK is given to RAM 21 through selector 31 as address 25 of RAM 21 .

Also, at this time, the gate 32 is open and the gate 33 is closed, and n-bit data is read from the RAM 21.
n J- flip-flops 28-1 to 28-n are manually operated. In this way, AREAI depending on the set value
~AREAn interval signals are generated.

Furthermore, writing from the CPU 610 to the RAM 22 during this period is performed using the address bus A-BtJS1, the data bus B-BUS, and the access signal R/W 34.

Conversely, when generating a section signal based on data set in the RAM 22, (Cs, C4.

By setting Cs ) = (1, 0, 1), the gate 33 is opened, the output of the address counter 30 is input to the address 26 of the RAM 22, and the n-bit data read from the RAM 22 is transferred to the n flip-flops 28-. 1-28
-Output to n. In this way, the flip-flop can be inverted by VCLK and a region signal can be output as in the case of RAM2t. Also, at this time, A-BUS and B
- Data can be written from the CPU 610 to the RAM 21 via the BUS.

FIG. 4 shows the first contour processing circuit 68 and the second contour processing circuit 68 in this embodiment.
7 is a block diagram showing details of a contour processing circuit 617 and a non-processing circuit 69. FIG.

In FIG. 4, the first contour processing circuit 68 consists of a block for detecting the contour portion and a block for outputting only the contour portion in a different color from the character portion. Specifically, an output image as shown in FIG. 5(a) is obtained from an original as shown in FIG. 5(c).

The block that detects the outline has a filter circuit 74 and a comparator 78, while the block that outputs only the outline in a color different from the character part has a selector 81 and performs the following processing.

For three lines of data 614, 615, and 616, the filter circuit 74 generates a filter C having the characteristics shown in FIG. 6(C).
multiply. Here, β is! /4 to 178 coefficients. The calculation result is sent to slice level 7 by comparator 78.
9 and binarize it. The contour part is the comparator 78
The output cuff 12 becomes 1tgh, and the selector 81 selects 8.
Manual power or D input (3FH) is selected. signal 71
Reference numeral 5 is a signal for determining whether or not to output pixels other than the contour portion, and this can be set freely by the operator. When the signal 715 is Low, the A input is selected for pixels other than contour pixels and unprocessed data from the non-processing circuit 75 is output, and when the signal 715 is High, the C input (OOH) is selected. In this embodiment, all contour parts are output in 3FH, but this density can also be freely set by the operator.

The second contour processing circuit 617 also includes a block for detecting the contour portion and a block for outputting only the contour portion in a different color from the character portion. Specifically, an output image as shown in FIG. 5(a) is obtained from an original as shown in FIG. 5(e).

The block for finding the outline includes a filter circuit 71, a filter circuit 72, a condition circuit 73, an addition circuit 76, and a comparator 77, and the block for outputting only the outline in a different color from the character part has a selector 80. In this contour processing 2, two filters A and B having different characteristics are combined to output the rising edge portion and the falling edge portion with different thicknesses. The operation is shown in detail below.

Filter circuit 71. filters A and B having the characteristics shown in FIGS. 6(a) and 6(b) are applied to the data of three lines 614, 615, and 616, respectively. It is multiplied by a filter circuit 72. here,
α is a coefficient of 1/4 to 1/8. Next, the addition circuit 76
Then, the result of applying filter A and the result of applying filter B to the result of passing through a conditional circuit 73 (zero is output if the input takes a negative value, otherwise outputs as is) are added. This addition result is compared with the slice level 79 by a comparator 77 to obtain a binary output cuff 11. If the contour part is 0, the selector 80 outputs 3FH, and if it is not a contour part, the pixel data of interest is output. In this mode, as described above, it is also possible to output only the outline part. Based on the 2-bit area signal 135, non-processing 1 contour processing 11 contour processing 2 is activated by the operator's operation unit 61 according to the area.
It becomes possible by the operation from step 1.

That is, the CPtJ 810 changes the level of the area signal 135 in accordance with the operation of the operation unit 611 and is selected by the selector 612 so as to perform the processing desired by the operator, and the density information 714 is sent to the printer 613.

FIG. 7 is a block diagram of the red/black determination circuit.

This allows the operator to freely select the output color of contour information (for example, red or black), and includes a timing circuit 101, a selector 102, and a selector 103.

Below, when the image data is recognized as red, the red and black bits are “
If the color is 1" black, set it to 'O'. When the image data is a contour, the output of the comparator 77 or 78 is "1". If it is not a contour, it is "O". In the case of 0 forced bit mode, the signal 104 is 1", and when the output of the comparator is "1" The output 107 of the selector becomes the force bit 105, and “
If the signal 104 is "0", it becomes the output 106 of the timing circuit. If the signal 104 is "1", the output 108 of the selector 103 becomes the output 107 of the selector 102, and if the signal 104 is "0", it becomes the output 106 of the timing circuit 101. I will explain based on this assumption.

The timing circuit 101 is a circuit for synchronizing the red and black signals of the bit of interest and the pixel of interest, and is composed of flip-flops. The selector 102 outputs a forced bit 105 when the pixel of interest is an outline, and outputs a red/black signal 106 of the attention bit delayed by the timing circuit 101 when it is not an outline. The selector 103 outputs the output 107° of the selector 102 when in the forced bit mode, and otherwise outputs the output 106 of the timing circuit as the red/black bit output 108.
Output as . According to this rule, red and black bit output 1
08 is the forced bit mode and if it is an outline, the forced bit 105 is output, otherwise the red/black signal 615 of the bit of interest is output as is. Therefore, the operator can freely specify the outline color.

Next, the process up to printing will be described according to the configuration diagram of the printing section of the printer shown in FIG.

FIG. 8 shows a pulse width modulation circuit 700 for red toner, a laser driver 702. Semiconductor laser 704, polygon mirror 707. f/θ lens 708, mirror 710. A developing device 711 and a pulse width modulation circuit 701 for black toner. Laser driver 703. Semiconductor laser 705. Polygon mirror 706. f/θ lens 709. It consists of a developing device 712 and a photosensitive drum 713.

Laser light LB+ for red development modulated in accordance with image data is scanned horizontally at high speed in the width of arrow A-B in FIG. 8 by a polygon mirror 707 rotating at high speed, and
One horizontal scan of the laser beam, which forms an image on the surface of the photosensitive drum 713 through the θ lens 708 and the mirror 710 to perform dot exposure corresponding to image data, corresponds to one horizontal scan of the original image. Exactly the same configuration is used for black development, except for the mirror 710.

On the other hand, since the photosensitive drum 713 is rotating at a constant speed in the direction of the arrow in the figure, the above-described laser beam is scanned in the main scanning direction of the drum, and the scanning of the photosensitive drum 713 is performed in the sub-scanning direction of the drum. Since constant speed rotation (velocity V) is performed, planar images are sequentially exposed and latent images are formed. Prior to this exposure, red and black toner images are formed by uniform charging by a charger, the above-mentioned exposure, and toner development by a developing sleeve.

Further, on the photosensitive drum 713, the distances between the red latent image and the black latent image are crossed. FIG. 9 is a timing chart showing this time difference. As you can see from this diagram, the red V
Black VSYNC llV after SYNC rises
is rising. To achieve this, a line buffer (not shown) is provided during processing of the black signal.

FIG. 10(a) shows the pulse width modulation circuit 700 or 701 of FIG. 8 in detail.

FIG. 10(a) is a block diagram of the pulse width modulation circuit,
Figures 0(b) and 0(c) are timing diagrams.

The manually input video data (density information) 714 is latched by the latch circuit 900 at the rising edge of VCLK 801.
Synchronization is achieved with respect to the clock. The video data 815 output from the latch is subjected to gradation correction by an LUT (look-up table) 901 composed of ROM or RAM, and converted into D/A (digital-to-analog) converter 902.
/A conversion to generate one analog video signal,
The generated analog signal is sent to the next stage comparator 910,
911 and is compared with a triangular wave which will be described later.

The signals 808 and 809 input to the other comparator are triangular waves that are synchronized to VCLK and generated individually. In other words, a synchronous clock 2VCLK803 with twice the frequency of VCLK801 is used, and one is
The triangular wave 808 (W 1) is generated by the triangular wave generating circuit 908 according to the reference signal 806 for triangular wave generation whose frequency is divided by 2 by the flip-flop 906, and the other is 2VCLK.
A triangular wave 809 (WV
2).

Each triangular wave 808, 809 and video data 714 are
All the signals are generated in synchronization with VCLK as shown in FIG. 0 (b). Furthermore, each triangular wave 808.809 is VCLK
The H3YNC802 generated in synchronization with the inverter 9
The signal is inverted at 04 and is initialized by circuits 905 and 906. With the above operation, the comparator 910. Output 810 (PWI) of comparator 911, 811 (
10 (PW2) according to the input video data 714 and the value of the red/black bit output 108 obtained in FIG.
A signal with a pulse width as shown in C) is obtained.

That is, in this system, the AND gate 91 in FIG. 10(a)
When the output 816 of 3 is 1", the laser is turned on and a dot is printed on the print paper, and when it is "0", the laser is turned off and nothing is printed on the print paper. Therefore, the control signal LO
You can control turning off the light with N805. FIG. 10(C) shows the situation when the level of the image signal is converted from "black" to "white" from left to right.

Since the input to the pulse modulation circuit is manually inputted as "FF" for "white" and "00" for "black," the output of the D/A converter 902 changes as shown in Di (8i7) in Figure 10(c). On the other hand, the triangular wave is W V l (808), W
V x (809), the outputs of comparators 910 and 911 are respectively PWI (
810), PW2 (81 Rinodoku "black" → "white"
As it moves to , the pulse width becomes narrower. Also, as is clear from the figure, when PW is selected, the dots on the print paper are PI, Pa, P3, and so on. P4, and the amount of change in pulse width has a dynamic range of W. On the other hand, when PW2 is selected, a dot is formed between Ps and Pa, the dynamic range of the pulse width becomes W2, and PWl
Each is three times as large as the previous year.

By the way, for example, the printing density (resolution) is about 4 at pw+
00 lines/inch, pw, it is set to about 133 lines/inch, etc. Also, if you select PW, the resolution will be pw,
On the other hand, when pw2 is selected, the dynamic range of the pulse width is improved by about 3 times compared to PWI.
Since it is twice as wide, the gradation is significantly improved. Therefore, for example, when high resolution is required, PW1 is selected, and when high gradation is required, PW2 is selected.
RSEL 804 is provided.

That is, the selector 912 in FIG. 10(a) is 5CR3E.
When L804 is “O” +7), A input is selected and pw,
is output, and when it is "1", the B input is selected and PW2 is output from the output terminal. The laser is turned on for the final pulse width and a dot is printed.

LUT 901 is a table conversion ROM for gradation correction, and when video data 815 is input, corrected video data is obtained from the output. For example, when the 5CRESEL 804 is set to "0" to select pw, all outputs of the ternary counter 903 become "0" and the PWI correction table in the LUT 901 is selected.

The video signal converted into a pulse width as described above is applied to laser drivers 702 and 703 to modulate laser light.

[Embodiment 2] FIG. 11 is a block diagram of an image processing apparatus of this embodiment.

The image processing device of this embodiment includes a digitizer 111 for specifying colors for color conversion, a CPU 112 for calculation and processing, a ROM 113 containing processing programs, etc., and a RAM for auxiliary storage.
114, a region generation circuit 116 that generates a region signal, a contour extraction circuit 118 that extracts a contour from the input image data 120, a color conversion circuit that converts the contour into an arbitrary color and outputs the output image data 121; 119, C
It is connected by a PU bus 115.

FIG. 12 is a specific circuit diagram of the outline extraction circuit 118 and color conversion circuit 119 shown in FIG. 11.

The contour extraction circuit 118 and the color conversion circuit 119 of this embodiment are a contour extraction circuit 1 that extracts contours using color separation data R.
31, contour extraction circuit 132 that extracts contours using color separation data G, contour extraction circuit 133 that extracts contours using color separation data B, NOR gate 134, inverter 140
, a register 137 that stores the R data of the contour pixel, a register 138 that stores the G data of the contour pixel, a data 139 that stores the B data of the contour pixel, and a selector 141 (R data), 142 (G data).

143 (B data), selectors 145 (R data) for selecting contour color conversion data and through data, 146 (G
data), 147 ('B data).

The contour extraction circuits 131, 132, and 133 extract contour information of the color separation data R, G, and B data, respectively.
Specifically, these are all circuits as shown in FIG.

Figure 13 shows a FIFO that delays input image data by one line.
151, 152, inverter 153, 157, 159,
163, adder 161, 164, 166, D flip-flop 155, 156, 158, 162° 165.16
9,170, a multiplier 159, a register 167 for storing a threshold value for determining whether it is a contour or not, and a comparator 168.

The write clock WCK and read clock RCK of 11FO151 and 152 are common to other clocks, and the write reset WRST and read reset RR5T are used.
(horizontal synchronization signal) uses an inverted signal of ISYNC. This allows the input data and the output data of FIFO151 to
A signal that is shifted by exactly one line from the output data of the IFO 152 is output. In contrast to these, Figure 6 (
Contour information is extracted by applying a filter such as C) and comparing the calculation result with a set threshold value. Further, the through data 172 of the pixel of interest is output after timing adjustment by D flip-flops 169 and 170.

Returning to the explanation of FIG. 12 again. Figure 13 Contour extraction circuit 13
1,132.133, R, G, H contour information 171R, 171G, respectively.

171B% and R, G, and B through data information 172R, 172G, and 171B synchronized with the contour information are output. When even one of the R, G, and B contour information is recognized as a contour, the NOR gate 134 determines that the pixel of interest is a contour, and the selectors 141, 142, and 143 write into the register 137 from the cput 12. ,13
Select the data of 8°139. Selector 145°14
Reference numeral 6.147 is a selector for determining whether or not to perform rf@huang color change conversion processing, and is controlled by the area signal 135. and outputs ROLIT * aout + 13ou'r.

Although this embodiment uses FL, G, and B as color separation data, it goes without saying that equivalent color separation data may be used.

As described above, this embodiment is effective in enhancing characters, especially titles, making OHP color characters easier to see, and more advanced image processing can be easily performed.

[Effects of the Invention] According to the present invention, it is possible to provide an image processing device that frames the outline of an image to enhance the image and improve visibility.

Furthermore, it is possible to provide an image processing device that emphasizes the image and improves its visibility by adding a shadow to the image.

Furthermore, it is possible to provide an image processing device that enhances the image of a designated area and improves its visibility.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the image processing device of this embodiment, FIGS. 2(A) to (F) are diagrams for explaining the operation of the area signal generation circuit, and FIG. 3 is the operation of the CPU 610 in this embodiment. FIG. 4 is a block diagram of the first contour processing circuit, second contour processing circuit, and non-processing circuit of this embodiment, and FIGS. 6(a) to 6(C) are diagrams showing examples of filter matrices. FIG. 7 is a block diagram of the contour color conversion circuit of this embodiment. FIG. 8 is a diagram of the printer of this embodiment. FIG. 9 is a diagram showing the relationship between the vertical synchronizing signals of the red signal and black signal in this embodiment. FIG. 10(a) is a diagram showing an example of the pulse width modulation circuit. b) and (C) are timing charts showing signals of each part of the pulse width modulation circuit, FIG. 11 is a block diagram of the image processing device of the second embodiment, and FIG. 12 is the contour extraction circuit and color conversion circuit of the second embodiment. FIG. 13 is a diagram showing a circuit example of the contour extraction circuit of the second embodiment. In the figure, 61...Reading unit, 62...Video data multiplexer, 63-66...Memory bank, 67...
...Address multiplexer, 68...First contour processing circuit, 69...No processing circuit, 70...Red/black judgment circuit, 609...Bus, 610...CPU, 611...
・611.612... Selector, 613... Printer, 614... Digitizer, 615... Area generation circuit, 616... ROM, 61... Second contour processing circuit, 618...- RAM, 619...Write address counter, 620...Read address counter, 11
1... Digitizer, 112... CPU, 113...
・ROM. 114...RAM, 115...CPU bus, 116
...Area generation circuit, 118...Contour extraction circuit, 119.
...It is a color conversion circuit.

Claims (3)

[Claims] (1) Contour extracting means for extracting the contour of an image; Conversion color specifying means for specifying a conversion color for the contour; and a color for converting the extracted contour to the specified conversion color. An image processing device comprising: converting means. (2) The image processing apparatus according to claim 1, wherein the color conversion means includes conversion area changing means for changing the conversion area in accordance with the position of the outline. (3) The image processing apparatus according to claim 1, further comprising area specifying means for specifying an area of the image, and wherein the color converting means performs color conversion on an outline within the specified area. .